tg3: Enhance firmware download code to support fragmented firmware
This lays the ground work to download the 57766 fragmented firmware. We loop until we've written data equal to tp->fw->size minus headers. Reviewed-by: Benjamin Li <benli@broadcom.com> Signed-off-by: Nithin Nayak Sujir <nsujir@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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1 changed files with 42 additions and 6 deletions
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@ -3536,6 +3536,33 @@ static int tg3_halt_cpu(struct tg3 *tp, u32 cpu_base)
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return 0;
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}
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static int tg3_fw_data_len(struct tg3 *tp,
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const struct tg3_firmware_hdr *fw_hdr)
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{
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int fw_len;
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/* Non fragmented firmware have one firmware header followed by a
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* contiguous chunk of data to be written. The length field in that
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* header is not the length of data to be written but the complete
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* length of the bss. The data length is determined based on
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* tp->fw->size minus headers.
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*
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* Fragmented firmware have a main header followed by multiple
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* fragments. Each fragment is identical to non fragmented firmware
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* with a firmware header followed by a contiguous chunk of data. In
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* the main header, the length field is unused and set to 0xffffffff.
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* In each fragment header the length is the entire size of that
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* fragment i.e. fragment data + header length. Data length is
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* therefore length field in the header minus TG3_FW_HDR_LEN.
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*/
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if (tp->fw_len == 0xffffffff)
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fw_len = be32_to_cpu(fw_hdr->len);
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else
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fw_len = tp->fw->size;
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return (fw_len - TG3_FW_HDR_LEN) / sizeof(u32);
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}
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/* tp->lock is held. */
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static int tg3_load_firmware_cpu(struct tg3 *tp, u32 cpu_base,
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u32 cpu_scratch_base, int cpu_scratch_size,
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@ -3543,7 +3570,7 @@ static int tg3_load_firmware_cpu(struct tg3 *tp, u32 cpu_base,
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{
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int err, lock_err, i;
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void (*write_op)(struct tg3 *, u32, u32);
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u32 *fw_data = (u32 *)(fw_hdr + 1);
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int total_len = tp->fw->size;
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if (cpu_base == TX_CPU_BASE && tg3_flag(tp, 5705_PLUS)) {
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netdev_err(tp->dev,
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@ -3571,12 +3598,21 @@ static int tg3_load_firmware_cpu(struct tg3 *tp, u32 cpu_base,
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write_op(tp, cpu_scratch_base + i, 0);
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tw32(cpu_base + CPU_STATE, 0xffffffff);
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tw32(cpu_base + CPU_MODE, tr32(cpu_base+CPU_MODE)|CPU_MODE_HALT);
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for (i = 0; i < (tp->fw->size - TG3_FW_HDR_LEN) / sizeof(u32); i++)
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write_op(tp, cpu_scratch_base +
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(be32_to_cpu(fw_hdr->base_addr) & 0xffff) +
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(i * sizeof(u32)),
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be32_to_cpu(fw_data[i]));
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do {
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u32 *fw_data = (u32 *)(fw_hdr + 1);
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for (i = 0; i < tg3_fw_data_len(tp, fw_hdr); i++)
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write_op(tp, cpu_scratch_base +
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(be32_to_cpu(fw_hdr->base_addr) & 0xffff) +
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(i * sizeof(u32)),
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be32_to_cpu(fw_data[i]));
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total_len -= be32_to_cpu(fw_hdr->len);
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/* Advance to next fragment */
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fw_hdr = (struct tg3_firmware_hdr *)
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((void *)fw_hdr + be32_to_cpu(fw_hdr->len));
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} while (total_len > 0);
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err = 0;
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