Merge "clk: msm: clock: Remove controlling some graphics clocks in Linux"

This commit is contained in:
Linux Build Service Account 2016-10-27 15:49:00 -07:00 committed by Gerrit - the friendly Code Review server
commit 35021f91c8
3 changed files with 0 additions and 29 deletions

View file

@ -1707,17 +1707,6 @@ static struct branch_clk gcc_gpu_bimc_gfx_clk = {
},
};
static struct branch_clk gcc_gpu_bimc_gfx_src_clk = {
.cbcr_reg = GCC_GPU_BIMC_GFX_SRC_CBCR,
.has_sibling = 1,
.base = &virt_base,
.c = {
.dbg_name = "gcc_gpu_bimc_gfx_src_clk",
.ops = &clk_ops_branch,
CLK_INIT(gcc_gpu_bimc_gfx_src_clk.c),
},
};
static struct branch_clk gcc_gpu_cfg_ahb_clk = {
.cbcr_reg = GCC_GPU_CFG_AHB_CBCR,
.has_sibling = 1,
@ -1731,17 +1720,6 @@ static struct branch_clk gcc_gpu_cfg_ahb_clk = {
},
};
static struct branch_clk gcc_gpu_snoc_dvm_gfx_clk = {
.cbcr_reg = GCC_GPU_SNOC_DVM_GFX_CBCR,
.has_sibling = 1,
.base = &virt_base,
.c = {
.dbg_name = "gcc_gpu_snoc_dvm_gfx_clk",
.ops = &clk_ops_branch,
CLK_INIT(gcc_gpu_snoc_dvm_gfx_clk.c),
},
};
static struct branch_clk gcc_gpu_iref_clk = {
.cbcr_reg = GCC_GPU_IREF_EN,
.has_sibling = 1,
@ -2454,7 +2432,6 @@ static struct mux_clk gcc_debug_mux = {
{ &gcc_mss_mnoc_bimc_axi_clk.c, 0x0120 },
{ &gcc_mss_snoc_axi_clk.c, 0x0123 },
{ &gcc_gpu_cfg_ahb_clk.c, 0x013b },
{ &gcc_gpu_bimc_gfx_src_clk.c, 0x013e },
{ &gcc_gpu_bimc_gfx_clk.c, 0x013f },
{ &gcc_qspi_ahb_clk.c, 0x0156 },
{ &gcc_qspi_ref_clk.c, 0x0157 },
@ -2649,9 +2626,7 @@ static struct clk_lookup msm_clocks_gcc_cobalt[] = {
CLK_LIST(gcc_gp2_clk),
CLK_LIST(gcc_gp3_clk),
CLK_LIST(gcc_gpu_bimc_gfx_clk),
CLK_LIST(gcc_gpu_bimc_gfx_src_clk),
CLK_LIST(gcc_gpu_cfg_ahb_clk),
CLK_LIST(gcc_gpu_snoc_dvm_gfx_clk),
CLK_LIST(gcc_gpu_iref_clk),
CLK_LIST(gcc_hmss_ahb_clk),
CLK_LIST(gcc_hmss_dvm_bus_clk),

View file

@ -198,9 +198,7 @@
#define clk_gcc_gp1_clk 0x057f7b69
#define clk_gcc_gp2_clk 0x9bf83ffd
#define clk_gcc_gp3_clk 0xec6539ee
#define clk_gcc_gpu_snoc_dvm_gfx_clk 0xc9147451
#define clk_gcc_gpu_bimc_gfx_clk 0x3909459b
#define clk_gcc_gpu_bimc_gfx_src_clk 0x377cb748
#define clk_gcc_gpu_cfg_ahb_clk 0x72f20a57
#define clk_gcc_gpu_iref_clk 0xfd82abad
#define clk_gcc_hmss_ahb_clk 0x62818713

View file

@ -167,9 +167,7 @@
#define GCC_GP2_CBCR 0x65000
#define GCC_GP3_CBCR 0x66000
#define GCC_GPU_BIMC_GFX_CBCR 0x71010
#define GCC_GPU_BIMC_GFX_SRC_CBCR 0x7100C
#define GCC_GPU_CFG_AHB_CBCR 0x71004
#define GCC_GPU_SNOC_DVM_GFX_CBCR 0x71018
#define GCC_GPU_IREF_EN 0x88010
#define GCC_HMSS_AHB_CBCR 0x48000
#define GCC_HMSS_DVM_BUS_CBCR 0x4808C