clk: msm: clock-osm: Set the HMSS GPLL0 RCG to run at 300MHz

The default settings of the gcc_hmss_gpll0_clk_src make it
run at 600 MHz. Call set rate on the clock so that its
divider settings can be programmed.

CRs-Fixed: 989118
Change-Id: I49aee860dd3f0f4f7ecb024228f182d126424906
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
This commit is contained in:
Deepak Katragadda 2016-03-08 11:53:32 -08:00 committed by David Keitel
parent b03a78230b
commit 3969b42ea5

View file

@ -1856,6 +1856,12 @@ static int cpu_clock_osm_driver_probe(struct platform_device *pdev)
* frequency before enabling OSM. LUT index 0 is always sourced from
* this clock.
*/
rc = clk_set_rate(&sys_apcsaux_clk_gcc.c, init_rate);
if (rc) {
dev_err(&pdev->dev, "Unable to set init rate on hmss_gpll0, rc=%d\n",
rc);
return rc;
}
clk_prepare_enable(&sys_apcsaux_clk_gcc.c);
/* Set 300MHz index */
@ -1863,6 +1869,7 @@ static int cpu_clock_osm_driver_probe(struct platform_device *pdev)
if (rc) {
dev_err(&pdev->dev, "Unable to set init rate on pwr cluster, rc=%d\n",
rc);
clk_disable_unprepare(&sys_apcsaux_clk_gcc.c);
return rc;
}
@ -1870,6 +1877,7 @@ static int cpu_clock_osm_driver_probe(struct platform_device *pdev)
if (rc) {
dev_err(&pdev->dev, "Unable to set init rate on perf cluster, rc=%d\n",
rc);
clk_disable_unprepare(&sys_apcsaux_clk_gcc.c);
return rc;
}