MIPS: perf: Split the Kconfig option CONFIG_MIPS_MT_SMP
Split the Kconfig option CONFIG_MIPS_MT_SMP into CONFIG_MIPS_MT_SMP and CONFIG_MIPS_PERF_SHARED_TC_COUNTERS so some of the code used for performance counters that are shared between threads can be used for MIPS cores that are not MT_SMP. Signed-off-by: Al Cooper <alcooperx@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/4108/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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2 changed files with 12 additions and 8 deletions
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@ -1928,6 +1928,7 @@ config MIPS_MT_SMP
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select SYS_SUPPORTS_SCHED_SMT if SMP
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select SYS_SUPPORTS_SCHED_SMT if SMP
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select SYS_SUPPORTS_SMP
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select SYS_SUPPORTS_SMP
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select SMP_UP
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select SMP_UP
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select MIPS_PERF_SHARED_TC_COUNTERS
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help
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help
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This is a kernel model which is known a VSMP but lately has been
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This is a kernel model which is known a VSMP but lately has been
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marketesed into SMVP.
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marketesed into SMVP.
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@ -2277,6 +2278,9 @@ config NR_CPUS
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performance should round up your number of processors to the next
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performance should round up your number of processors to the next
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power of two.
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power of two.
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config MIPS_PERF_SHARED_TC_COUNTERS
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bool
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#
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#
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# Timer Interrupt Frequency Configuration
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# Timer Interrupt Frequency Configuration
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#
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#
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@ -130,7 +130,7 @@ static struct mips_pmu mipspmu;
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#define M_PERFCTL_EVENT_MASK 0xfe0
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#define M_PERFCTL_EVENT_MASK 0xfe0
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#ifdef CONFIG_MIPS_MT_SMP
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#ifdef CONFIG_MIPS_PERF_SHARED_TC_COUNTERS
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static int cpu_has_mipsmt_pertccounters;
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static int cpu_has_mipsmt_pertccounters;
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static DEFINE_RWLOCK(pmuint_rwlock);
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static DEFINE_RWLOCK(pmuint_rwlock);
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@ -156,10 +156,10 @@ static unsigned int counters_total_to_per_cpu(unsigned int counters)
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return counters >> vpe_shift();
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return counters >> vpe_shift();
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}
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}
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#else /* !CONFIG_MIPS_MT_SMP */
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#else /* !CONFIG_MIPS_PERF_SHARED_TC_COUNTERS */
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#define vpe_id() 0
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#define vpe_id() 0
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#endif /* CONFIG_MIPS_MT_SMP */
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#endif /* CONFIG_MIPS_PERF_SHARED_TC_COUNTERS */
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static void resume_local_counters(void);
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static void resume_local_counters(void);
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static void pause_local_counters(void);
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static void pause_local_counters(void);
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@ -503,7 +503,7 @@ static void mipspmu_read(struct perf_event *event)
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static void mipspmu_enable(struct pmu *pmu)
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static void mipspmu_enable(struct pmu *pmu)
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{
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{
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#ifdef CONFIG_MIPS_MT_SMP
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#ifdef CONFIG_MIPS_PERF_SHARED_TC_COUNTERS
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write_unlock(&pmuint_rwlock);
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write_unlock(&pmuint_rwlock);
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#endif
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#endif
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resume_local_counters();
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resume_local_counters();
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@ -523,7 +523,7 @@ static void mipspmu_enable(struct pmu *pmu)
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static void mipspmu_disable(struct pmu *pmu)
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static void mipspmu_disable(struct pmu *pmu)
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{
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{
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pause_local_counters();
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pause_local_counters();
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#ifdef CONFIG_MIPS_MT_SMP
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#ifdef CONFIG_MIPS_PERF_SHARED_TC_COUNTERS
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write_lock(&pmuint_rwlock);
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write_lock(&pmuint_rwlock);
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#endif
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#endif
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}
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}
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@ -1163,7 +1163,7 @@ static int mipsxx_pmu_handle_shared_irq(void)
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* See also mipsxx_pmu_start().
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* See also mipsxx_pmu_start().
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*/
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*/
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pause_local_counters();
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pause_local_counters();
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#ifdef CONFIG_MIPS_MT_SMP
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#ifdef CONFIG_MIPS_PERF_SHARED_TC_COUNTERS
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read_lock(&pmuint_rwlock);
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read_lock(&pmuint_rwlock);
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#endif
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#endif
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@ -1195,7 +1195,7 @@ static int mipsxx_pmu_handle_shared_irq(void)
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if (handled == IRQ_HANDLED)
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if (handled == IRQ_HANDLED)
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irq_work_run();
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irq_work_run();
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#ifdef CONFIG_MIPS_MT_SMP
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#ifdef CONFIG_MIPS_PERF_SHARED_TC_COUNTERS
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read_unlock(&pmuint_rwlock);
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read_unlock(&pmuint_rwlock);
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#endif
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#endif
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resume_local_counters();
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resume_local_counters();
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@ -1362,7 +1362,7 @@ init_hw_perf_events(void)
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return -ENODEV;
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return -ENODEV;
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}
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}
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#ifdef CONFIG_MIPS_MT_SMP
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#ifdef CONFIG_MIPS_PERF_SHARED_TC_COUNTERS
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cpu_has_mipsmt_pertccounters = read_c0_config7() & (1<<19);
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cpu_has_mipsmt_pertccounters = read_c0_config7() & (1<<19);
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if (!cpu_has_mipsmt_pertccounters)
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if (!cpu_has_mipsmt_pertccounters)
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counters = counters_total_to_per_cpu(counters);
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counters = counters_total_to_per_cpu(counters);
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