ARM: dts: msm: Add audio nodes for msmfalcon internal codec

Add device tree nodes for  audio digital, analog, soundwire codecs.
Also add internal codec sound node for msmfalcon. Add LPI pinctrl instance
to support audio related LPI GPIOs. Update clock-ids and controllers
for PMI, AP and LNBB audio related clocks.

Change-Id: Idf6f56a365fdd57f4b0b191ee7bfb5e831abf443
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
This commit is contained in:
Laxminath Kasam 2016-11-30 15:26:01 +05:30
parent 69898f6728
commit 3a4e5da048
10 changed files with 663 additions and 36 deletions

View file

@ -619,7 +619,9 @@
qcom,msm-mbhc-hphl-swh = <1>;
qcom,msm-mbhc-gnd-swh = <1>;
qcom,us-euro-gpios = <&us_euro_gpio>;
qcom,tasha-mclk-clk-freq = <9600000>;
qcom,hph-en0-gpio = <&tasha_hph_en0>;
qcom,hph-en1-gpio = <&tasha_hph_en1>;
qcom,msm-mclk-freq = <9600000>;
asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>,
<&loopback>, <&compress>, <&hostless>,
<&afe>, <&lsm>, <&routing>, <&cpe>, <&compr>,
@ -674,8 +676,8 @@
asoc-codec = <&stub_codec>;
asoc-codec-names = "msm-stub-codec.1";
qcom,wsa-max-devs = <2>;
qcom,wsa-devs = <&wsa881x_0211>, <&wsa881x_0212>,
<&wsa881x_0213>, <&wsa881x_0214>;
qcom,wsa-devs = <&wsa881x_211>, <&wsa881x_212>,
<&wsa881x_213>, <&wsa881x_214>;
qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrRight",
"SpkrLeft", "SpkrRight";
};
@ -728,7 +730,7 @@
qcom,us-euro-gpios = <&tavil_us_euro_sw>;
qcom,hph-en0-gpio = <&tavil_hph_en0>;
qcom,hph-en1-gpio = <&tavil_hph_en1>;
qcom,tavil-mclk-clk-freq = <9600000>;
qcom,msm-mclk-freq = <9600000>;
asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>,
<&loopback>, <&compress>, <&hostless>,
<&afe>, <&lsm>, <&routing>, <&cpe>, <&compr>,
@ -788,6 +790,111 @@
"SpkrLeft", "SpkrRight";
};
int_codec: sound {
status = "disabled";
compatible = "qcom,msmfalcon-asoc-snd";
qcom,model = "msmfalcon-snd-card";
qcom,wcn-btfm;
qcom,mi2s-audio-intf;
qcom,auxpcm-audio-intf;
qcom,msm-mi2s-master = <1>, <1>, <1>, <1>;
reg = <0x1508a000 0x4>,
<0x1508b000 0x4>,
<0x1508c000 0x4>,
<0x1508d000 0x4>;
reg-names = "lpaif_pri_mode_muxsel",
"lpaif_sec_mode_muxsel",
"lpaif_tert_mode_muxsel",
"lpaif_quat_mode_muxsel";
qcom,msm-mclk-freq = <9600000>;
qcom,msm-mbhc-hphl-swh = <1>;
qcom,msm-mbhc-gnd-swh = <1>;
qcom,msm-hs-micbias-type = "external";
qcom,us-euro-gpios = <&us_euro_gpio>;
qcom,cdc-pdm-gpios = <&cdc_pdm_gpios>;
qcom,cdc-comp-gpios = <&cdc_comp_gpios>;
qcom,cdc-dmic-gpios = <&cdc_dmic_gpios>;
qcom,cdc-sdw-gpios = <&cdc_sdw_gpios>;
qcom,audio-routing =
"RX_BIAS", "INT_MCLK0",
"SPK_RX_BIAS", "INT_MCLK0",
"INT_LDO_H", "INT_MCLK0",
"MIC BIAS External", "Handset Mic",
"MIC BIAS External2", "Headset Mic",
"MIC BIAS External", "Secondary Mic",
"AMIC1", "MIC BIAS External",
"AMIC2", "MIC BIAS External2",
"AMIC3", "MIC BIAS External",
"DMIC1", "MIC BIAS External",
"MIC BIAS External", "Digital Mic1",
"DMIC2", "MIC BIAS External",
"MIC BIAS External", "Digital Mic2",
"DMIC3", "MIC BIAS External",
"MIC BIAS External", "Digital Mic3",
"DMIC4", "MIC BIAS External",
"MIC BIAS External", "Digital Mic4",
"SpkrLeft IN", "SPK1 OUT",
"SpkrRight IN", "SPK2 OUT";
asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>,
<&loopback>, <&compress>, <&hostless>,
<&afe>, <&lsm>, <&routing>, <&compr>,
<&pcm_noirq>;
asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1",
"msm-pcm-dsp.2", "msm-voip-dsp",
"msm-pcm-voice", "msm-pcm-loopback",
"msm-compress-dsp", "msm-pcm-hostless",
"msm-pcm-afe", "msm-lsm-client",
"msm-pcm-routing", "msm-compr-dsp",
"msm-pcm-dsp-noirq";
asoc-cpu = <&dai_mi2s0>, <&dai_mi2s1>,
<&dai_mi2s2>, <&dai_mi2s3>,
<&dai_int_mi2s0>, <&dai_int_mi2s1>,
<&dai_int_mi2s2>, <&dai_int_mi2s3>,
<&dai_int_mi2s4>, <&dai_int_mi2s5>,
<&dai_pri_auxpcm>, <&dai_sec_auxpcm>,
<&dai_tert_auxpcm>, <&dai_quat_auxpcm>,
<&afe_pcm_rx>, <&afe_pcm_tx>, <&afe_proxy_rx>,
<&afe_proxy_tx>, <&incall_record_rx>,
<&incall_record_tx>, <&incall_music_rx>,
<&incall_music_2_rx>, <&sb_7_rx>, <&sb_7_tx>,
<&sb_8_tx>, <&sb_8_rx>,
<&usb_audio_rx>, <&usb_audio_tx>,
<&dai_pri_tdm_rx_0>, <&dai_pri_tdm_tx_0>,
<&dai_sec_tdm_rx_0>, <&dai_sec_tdm_tx_0>,
<&dai_tert_tdm_rx_0>, <&dai_tert_tdm_tx_0>,
<&dai_quat_tdm_rx_0>, <&dai_quat_tdm_tx_0>;
asoc-cpu-names = "msm-dai-q6-mi2s.0", "msm-dai-q6-mi2s.1",
"msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3",
"msm-dai-q6-mi2s.7", "msm-dai-q6-mi2s.8",
"msm-dai-q6-mi2s.9", "msm-dai-q6-mi2s.10",
"msm-dai-q6-mi2s.11", "msm-dai-q6-mi2s.12",
"msm-dai-q6-auxpcm.1", "msm-dai-q6-auxpcm.2",
"msm-dai-q6-auxpcm.3", "msm-dai-q6-auxpcm.4",
"msm-dai-q6-dev.224", "msm-dai-q6-dev.225",
"msm-dai-q6-dev.241", "msm-dai-q6-dev.240",
"msm-dai-q6-dev.32771", "msm-dai-q6-dev.32772",
"msm-dai-q6-dev.32773", "msm-dai-q6-dev.32770",
"msm-dai-q6-dev.16398", "msm-dai-q6-dev.16399",
"msm-dai-q6-dev.16401", "msm-dai-q6-dev.16400",
"msm-dai-q6-dev.28672", "msm-dai-q6-dev.28673",
"msm-dai-q6-tdm.36864", "msm-dai-q6-tdm.36865",
"msm-dai-q6-tdm.36880", "msm-dai-q6-tdm.36881",
"msm-dai-q6-tdm.36896", "msm-dai-q6-tdm.36897",
"msm-dai-q6-tdm.36912", "msm-dai-q6-tdm.36913";
asoc-codec = <&stub_codec>, <&msm_digital_codec>,
<&pmic_analog_codec>, <&msm_sdw_codec>;
asoc-codec-names = "msm-stub-codec.1", "msm-dig-codec",
"analog-codec", "msm_sdw_codec";
qcom,wsa-max-devs = <2>;
qcom,wsa-devs = <&wsa881x_211_en>, <&wsa881x_212_en>,
<&wsa881x_213_en>, <&wsa881x_214_en>;
qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrRight",
"SpkrLeft", "SpkrRight";
};
us_euro_gpio: msm_cdc_pinctrl@75 {
compatible = "qcom,msm-cdc-pinctrl";
@ -800,38 +907,36 @@
compatible = "qcom,wcd9xxx-irq";
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&tlmm>;
qcom,gpio-connect = <&tlmm 54 0>;
pinctrl-names = "default";
pinctrl-0 = <&wcd_intr_default>;
interrupts = <0 177 0>;
interrupt-names = "wcd_irq";
};
clock_audio: audio_ext_clk {
compatible = "qcom,audio-ref-clk";
qcom,audio-ref-clk-gpio = <&pmfalcon_gpios 3 0>;
clock-names = "osr_clk";
clocks = <&clock_gcc clk_div_clk1>;
clocks = <&clock_rpmcc AUDIO_PMI_CLK>;
qcom,node_has_rpm_clock;
#clock-cells = <1>;
pinctrl-names = "sleep", "active";
pinctrl-0 = <&spkr_i2s_clk_sleep>;
pinctrl-1 = <&spkr_i2s_clk_active>;
pinctrl-0 = <&lpi_mclk0_sleep>;
pinctrl-1 = <&lpi_mclk0_active>;
};
clock_audio_lnbb: audio_ext_clk_lnbb {
compatible = "qcom,audio-ref-clk";
clock-names = "osr_clk";
clocks = <&clock_gcc clk_ln_bb_clk2>;
clocks = <&clock_rpmcc AUDIO_PMIC_LNBB_CLK>;
qcom,node_has_rpm_clock;
#clock-cells = <1>;
};
wcd_rst_gpio: msm_cdc_pinctrl@64 {
compatible = "qcom,msm-cdc-pinctrl";
qcom,cdc-rst-n-gpio = <&tlmm 64 0>;
qcom,cdc-rst-n-gpio = <&lpi_tlmm 24 0>;
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&cdc_reset_active>;
pinctrl-1 = <&cdc_reset_sleep>;
pinctrl-0 = <&lpi_cdc_reset_active>;
pinctrl-1 = <&lpi_cdc_reset_sleep>;
};
};

View file

@ -117,7 +117,7 @@
};
};
qcom,pm2falcon@3 {
pm2falcon_3: qcom,pm2falcon@3 {
compatible ="qcom,spmi-pmic";
reg = <0x3 SPMI_USID>;
#address-cells = <2>;

View file

@ -10,18 +10,60 @@
* GNU General Public License for more details.
*/
&clock_audio {
qcom,audio-ref-clk-gpio = <&pmfalcon_gpios 3 0>;
#include "msm-audio.dtsi"
#include "msmfalcon-audio.dtsi"
&pm2falcon_3 {
/delete-node/analog-codec;
};
&pmfalcon_gpios {
gpio@c200 {
status = "ok";
qcom,mode = <1>;
qcom,pull = <5>;
qcom,vin-sel = <0>;
qcom,src-sel = <2>;
qcom,master-en = <1>;
qcom,out-strength = <2>;
&soc {
/delete-node/msm-sdw-codec@152c1000;
/delete-node/sound;
};
&slim_aud {
tasha_codec {
clocks = <&clock_audio clk_audio_pmi_clk>,
<&clock_audio clk_audio_ap_clk2>;
};
tavil_codec {
clocks = <&clock_audio_lnbb clk_audio_pmi_lnbb_clk>;
};
};
&tasha_hph_en0 {
/delete-property/pinctrl-0;
/delete-property/pinctrl-1;
};
&tasha_hph_en1 {
/delete-property/pinctrl-0;
/delete-property/pinctrl-1;
};
&clock_audio {
qcom,audio-ref-clk-gpio = <&pmfalcon_gpios 3 0>;
clocks = <&clock_gcc clk_div_clk1>;
pinctrl-0 = <&spkr_i2s_clk_sleep>;
pinctrl-1 = <&spkr_i2s_clk_active>;
};
&clock_audio_lnbb {
clocks = <&clock_gcc clk_ln_bb_clk2>;
};
&wcd_rst_gpio {
qcom,cdc-rst-n-gpio = <&tlmm 64 0>;
pinctrl-0 = <&cdc_reset_active>;
pinctrl-1 = <&cdc_reset_sleep>;
};
&wcd9xxx_intc {
interrupt-parent = <&tlmm>;
qcom,gpio-connect = <&tlmm 54 0>;
pinctrl-names = "default";
pinctrl-0 = <&wcd_intr_default>;
/delete-property/interrupts;
/delete-property/interrupt-names;
};

View file

@ -3085,8 +3085,6 @@
#include "msm8998-mdss.dtsi"
#include "msm8998-mdss-pll.dtsi"
#include "msm8998-blsp.dtsi"
#include "msm-audio.dtsi"
#include "msmfalcon-audio.dtsi"
#include "msm-smb138x.dtsi"
/* GPU overrides */

View file

@ -10,10 +10,6 @@
* GNU General Public License for more details.
*/
&clock_audio {
/delete-property/qcom,audio-ref-clk-gpio;
};
&slim_aud {
tasha_codec {
/delete-property/cdc-vdd-buck-supply;

View file

@ -12,6 +12,7 @@
*/
#include "msmfalcon-wsa881x.dtsi"
#include "msmfalcon-lpi.dtsi"
&slim_aud {
msm_dai_slim {
@ -31,8 +32,8 @@
qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>;
clock-names = "wcd_clk", "wcd_native_clk";
clocks = <&clock_audio clk_audio_pmi_clk>,
<&clock_audio clk_audio_ap_clk2>;
clocks = <&clock_audio AUDIO_PMI_CLK>,
<&clock_audio AUDIO_AP_CLK2>;
cdc-vdd-mic-bias-supply = <&pm2falcon_bob>;
qcom,cdc-vdd-mic-bias-voltage = <3300000 3300000>;
@ -64,7 +65,7 @@
qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>;
clock-names = "wcd_clk";
clocks = <&clock_audio_lnbb clk_audio_pmi_lnbb_clk>;
clocks = <&clock_audio_lnbb AUDIO_PMIC_LNBB_CLK>;
cdc-vdd-mic-bias-supply = <&pm2falcon_bob>;
qcom,cdc-vdd-mic-bias-voltage = <3300000 3300000>;
@ -94,3 +95,153 @@
};
};
};
&pm2falcon_3 {
pmic_analog_codec: analog-codec@f000 {
status = "disabled";
compatible = "qcom,pmic-analog-codec";
reg = <0xf000 0x200>;
interrupt-parent = <&spmi_bus>;
interrupts = <0x1 0xf0 0x0>,
<0x1 0xf0 0x1>,
<0x1 0xf0 0x2>,
<0x1 0xf0 0x3>,
<0x1 0xf0 0x4>,
<0x1 0xf0 0x5>,
<0x1 0xf0 0x6>,
<0x1 0xf0 0x7>;
interrupt-names = "spk_cnp_int",
"spk_clip_int",
"spk_ocp_int",
"ins_rem_det1",
"but_rel_det",
"but_press_det",
"ins_rem_det",
"mbhc_int";
cdc-vdda-cp-supply = <&pmfalcon_s4>;
qcom,cdc-vdda-cp-voltage = <1900000 2050000>;
qcom,cdc-vdda-cp-current = <50000>;
cdc-vdd-pa-supply = <&pmfalcon_s4>;
qcom,cdc-vdd-pa-voltage = <2040000 2040000>;
qcom,cdc-vdd-pa-current = <260000>;
cdc-vdd-mic-bias-supply = <&pm2falcon_l7>;
qcom,cdc-vdd-mic-bias-voltage = <3125000 3125000>;
qcom,cdc-vdd-mic-bias-current = <5000>;
qcom,cdc-mclk-clk-rate = <9600000>;
qcom,cdc-static-supplies = "cdc-vdda-cp",
"cdc-vdd-pa";
qcom,cdc-on-demand-supplies = "cdc-vdd-mic-bias";
cdc_pdm_gpios: cdc_pdm_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&cdc_pdm_gpios_active>;
pinctrl-1 = <&cdc_pdm_gpios_sleep>;
qcom,lpi-gpios;
};
cdc_comp_gpios: cdc_comp_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&cdc_comp_gpios_active>;
pinctrl-1 = <&cdc_comp_gpios_sleep>;
qcom,lpi-gpios;
};
/*
* Not marking address @ as driver searches this child
* with name msm-dig-codec
*/
msm_digital_codec: msm-dig-codec {
compatible = "qcom,msm-digital-codec";
reg = <0x152c0000 0x0>;
cdc_dmic_gpios: cdc_dmic_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&cdc_dmic12_gpios_active
&cdc_dmic34_gpios_active>;
pinctrl-1 = <&cdc_dmic12_gpios_sleep
&cdc_dmic34_gpios_sleep>;
qcom,lpi-gpios;
};
};
};
};
&soc {
msm_sdw_codec: msm-sdw-codec@152c1000 {
status = "disabled";
compatible = "qcom,msm-sdw-codec";
reg = <0x152c1000 0x0>;
interrupts = <0 161 0>;
interrupt-names = "swr_master_irq";
cdc_sdw_gpios: sdw_clk_data_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&sdw_clk_active &sdw_data_active>;
pinctrl-1 = <&sdw_clk_sleep &sdw_data_sleep>;
};
wsa_spkr_en1: wsa_spkr_en1_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&spkr_1_sd_n_active>;
pinctrl-1 = <&spkr_1_sd_n_sleep>;
};
wsa_spkr_en2: wsa_spkr_en2_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&spkr_2_sd_n_active>;
pinctrl-1 = <&spkr_2_sd_n_sleep>;
};
swr_master {
compatible = "qcom,swr-wcd";
#address-cells = <2>;
#size-cells = <0>;
wsa881x_211_en: wsa881x_en@20170211 {
compatible = "qcom,wsa881x";
reg = <0x0 0x20170211>;
qcom,spkr-sd-n-node = <&wsa_spkr_en1>;
};
wsa881x_212_en: wsa881x_en@20170212 {
compatible = "qcom,wsa881x";
reg = <0x0 0x20170212>;
qcom,spkr-sd-n-node = <&wsa_spkr_en2>;
};
wsa881x_213_en: wsa881x_en@21170213 {
compatible = "qcom,wsa881x";
reg = <0x0 0x21170213>;
qcom,spkr-sd-n-node = <&wsa_spkr_en1>;
};
wsa881x_214_en: wsa881x_en@21170214 {
compatible = "qcom,wsa881x";
reg = <0x0 0x21170214>;
qcom,spkr-sd-n-node = <&wsa_spkr_en2>;
};
};
};
};
&pmfalcon_gpios {
gpio@c200 {
status = "ok";
qcom,mode = <1>;
qcom,pull = <5>;
qcom,vin-sel = <0>;
qcom,src-sel = <2>;
qcom,master-en = <1>;
qcom,out-strength = <2>;
};
};

View file

@ -0,0 +1,182 @@
/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&soc {
lpi_tlmm: lpi_pinctrl@15070000 {
compatible = "qcom,lpi-pinctrl";
reg = <0x15070000 0x0>;
qcom,num-gpios = <32>;
gpio-controller;
#gpio-cells = <2>;
lpi_mclk0_active: lpi_mclk0_active {
mux {
pins = "gpio18";
function = "func2";
};
config {
pins = "gpio18";
drive-strength = <8>;
bias-disable;
};
};
lpi_mclk0_sleep: lpi_mclk0_sleep {
mux {
pins = "gpio18";
function = "func2";
};
config {
pins = "gpio18";
drive-strength = <2>;
bias-pull-down;
};
};
cdc_pdm_gpios_active: cdc_pdm_gpios_active {
mux {
pins = "gpio18", "gpio19",
"gpio20", "gpio21",
"gpio23", "gpio25";
function = "func1";
};
config {
pins = "gpio18", "gpio19",
"gpio20", "gpio21",
"gpio23", "gpio25";
drive-strength = <8>;
};
};
cdc_pdm_gpios_sleep: cdc_pdm_gpios_sleep {
mux {
pins = "gpio18", "gpio19",
"gpio20", "gpio21",
"gpio23", "gpio25";
function = "func1";
};
config {
pins = "gpio18", "gpio19",
"gpio20", "gpio21",
"gpio23", "gpio25";
drive-strength = <2>;
bias-disable;
};
};
cdc_comp_gpios_active: cdc_pdm_comp_gpios_active {
mux {
pins = "gpio22", "gpio24";
function = "func1";
};
config {
pins = "gpio22", "gpio24";
drive-strength = <8>;
};
};
cdc_comp_gpios_sleep: cdc_pdm_comp_gpios_sleep {
mux {
pins = "gpio22", "gpio24";
function = "func1";
};
config {
pins = "gpio22", "gpio24";
drive-strength = <2>;
bias-disable;
};
};
lpi_cdc_reset_active: lpi_cdc_reset_active {
mux {
pins = "gpio24";
function = "func2";
};
config {
pins = "gpio24";
drive-strength = <16>;
bias-pull-down;
output-high;
};
};
lpi_cdc_reset_sleep: lpi_cdc_reset_sleep {
mux {
pins = "gpio24";
function = "func2";
};
config {
pins = "gpio24";
drive-strength = <16>;
bias-disable;
output-low;
};
};
cdc_dmic12_gpios_active: dmic12_gpios_active {
mux {
pins = "gpio26", "gpio27";
function = "func1";
};
config {
pins = "gpio26", "gpio27";
drive-strength = <8>;
};
};
cdc_dmic12_gpios_sleep: dmic12_gpios_sleep {
mux {
pins = "gpio26", "gpio27";
function = "func1";
};
config {
pins = "gpio26", "gpio27";
drive-strength = <2>;
bias-disable;
};
};
cdc_dmic34_gpios_active: dmic34_gpios_active {
mux {
pins = "gpio28", "gpio29";
function = "func1";
};
config {
pins = "gpio28", "gpio29";
drive-strength = <8>;
};
};
cdc_dmic34_gpios_sleep: dmic34_gpios_sleep {
mux {
pins = "gpio28", "gpio29";
function = "func1";
};
config {
pins = "gpio28", "gpio29";
drive-strength = <2>;
bias-disable;
};
};
};
};

View file

@ -595,6 +595,62 @@
};
};
sdw_clk_pin {
sdw_clk_sleep: sdw_clk_sleep {
mux {
pins = "gpio24";
function = "sndwire_clk";
};
config {
pins = "gpio24";
drive-strength = <2>;
bias-pull-down;
};
};
sdw_clk_active: sdw_clk_active {
mux {
pins = "gpio24";
function = "sndwire_clk";
};
config {
pins = "gpio24";
drive-strength = <16>;
bias-disable;
};
};
};
sdw_clk_data {
sdw_data_sleep: sdw_data_sleep {
mux {
pins = "gpio25";
function = "sndwire_data";
};
config {
pins = "gpio25";
drive-strength = <2>;
bias-pull-down;
};
};
sdw_data_active: sdw_data_active {
mux {
pins = "gpio25";
function = "sndwire_data";
};
config {
pins = "gpio25";
drive-strength = <16>;
bias-disable;
};
};
};
/* WSA speaker reset pins */
spkr_1_sd_n {
spkr_1_sd_n_sleep: spkr_1_sd_n_sleep {
@ -656,6 +712,86 @@
};
};
wcd_gnd_mic_swap {
wcd_gnd_mic_swap_idle: wcd_gnd_mic_swap_idle {
mux {
pins = "gpio63";
function = "gpio";
};
config {
pins = "gpio63";
drive-strength = <2>;
bias-pull-down;
output-low;
};
};
wcd_gnd_mic_swap_active: wcd_gnd_mic_swap_active {
mux {
pins = "gpio63";
function = "gpio";
};
config {
pins = "gpio63";
drive-strength = <2>;
bias-disable;
output-high;
};
};
};
msm_hph_en0 {
hph_en0_sleep: hph_en0_sleep {
mux {
pins = "gpio24";
function = "gpio";
};
config {
pins = "gpio24";
output-low;
};
};
hph_en0_active: hph_en0_active {
mux {
pins = "gpio24";
function = "gpio";
};
config {
pins = "gpio24";
output-high;
};
};
};
msm_hph_en1 {
hph_en1_sleep: hph_en1_sleep {
mux {
pins = "gpio25";
function = "gpio";
};
config {
pins = "gpio25";
output-low;
};
};
hph_en1_active: hph_en1_active {
mux {
pins = "gpio25";
function = "gpio";
};
config {
pins = "gpio25";
output-high;
};
};
};
/* HS UART CONFIGURATION */
blsp1_uart1_active: blsp1_uart1_active {
mux {

View file

@ -25,6 +25,20 @@
pinctrl-0 = <&spkr_2_sd_n_active>;
pinctrl-1 = <&spkr_2_sd_n_sleep>;
};
tasha_hph_en0: msm_cdc_pinctrl_hph_en0 {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&hph_en0_active>;
pinctrl-1 = <&hph_en0_sleep>;
};
tasha_hph_en1: msm_cdc_pinctrl_hph_en1 {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
pinctrl-0 = <&hph_en1_active>;
pinctrl-1 = <&hph_en1_sleep>;
};
};
tavil_codec {

View file

@ -15,6 +15,7 @@
#include <dt-bindings/clock/qcom,gpu-msmfalcon.h>
#include <dt-bindings/clock/qcom,mmcc-msmfalcon.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/clock/audio-ext-clk.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/regulator/qcom,rpm-smd-regulator.h>
@ -1596,6 +1597,8 @@
#include "msm-gdsc-falcon.dtsi"
#include "msmfalcon-gpu.dtsi"
#include "msmfalcon-pm.dtsi"
#include "msm-audio.dtsi"
#include "msmfalcon-audio.dtsi"
&gdsc_usb30 {
status = "ok";