ARM: dts: msm: Add audio nodes for msmfalcon internal codec
Add device tree nodes for audio digital, analog, soundwire codecs. Also add internal codec sound node for msmfalcon. Add LPI pinctrl instance to support audio related LPI GPIOs. Update clock-ids and controllers for PMI, AP and LNBB audio related clocks. Change-Id: Idf6f56a365fdd57f4b0b191ee7bfb5e831abf443 Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
This commit is contained in:
parent
69898f6728
commit
3a4e5da048
10 changed files with 663 additions and 36 deletions
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@ -619,7 +619,9 @@
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qcom,msm-mbhc-hphl-swh = <1>;
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qcom,msm-mbhc-gnd-swh = <1>;
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qcom,us-euro-gpios = <&us_euro_gpio>;
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qcom,tasha-mclk-clk-freq = <9600000>;
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qcom,hph-en0-gpio = <&tasha_hph_en0>;
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qcom,hph-en1-gpio = <&tasha_hph_en1>;
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qcom,msm-mclk-freq = <9600000>;
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asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>,
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<&loopback>, <&compress>, <&hostless>,
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<&afe>, <&lsm>, <&routing>, <&cpe>, <&compr>,
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@ -674,8 +676,8 @@
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asoc-codec = <&stub_codec>;
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asoc-codec-names = "msm-stub-codec.1";
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qcom,wsa-max-devs = <2>;
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qcom,wsa-devs = <&wsa881x_0211>, <&wsa881x_0212>,
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<&wsa881x_0213>, <&wsa881x_0214>;
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qcom,wsa-devs = <&wsa881x_211>, <&wsa881x_212>,
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<&wsa881x_213>, <&wsa881x_214>;
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qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrRight",
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"SpkrLeft", "SpkrRight";
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};
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@ -728,7 +730,7 @@
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qcom,us-euro-gpios = <&tavil_us_euro_sw>;
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qcom,hph-en0-gpio = <&tavil_hph_en0>;
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qcom,hph-en1-gpio = <&tavil_hph_en1>;
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qcom,tavil-mclk-clk-freq = <9600000>;
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qcom,msm-mclk-freq = <9600000>;
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asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>,
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<&loopback>, <&compress>, <&hostless>,
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<&afe>, <&lsm>, <&routing>, <&cpe>, <&compr>,
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@ -788,6 +790,111 @@
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"SpkrLeft", "SpkrRight";
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};
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int_codec: sound {
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status = "disabled";
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compatible = "qcom,msmfalcon-asoc-snd";
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qcom,model = "msmfalcon-snd-card";
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qcom,wcn-btfm;
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qcom,mi2s-audio-intf;
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qcom,auxpcm-audio-intf;
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qcom,msm-mi2s-master = <1>, <1>, <1>, <1>;
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reg = <0x1508a000 0x4>,
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<0x1508b000 0x4>,
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<0x1508c000 0x4>,
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<0x1508d000 0x4>;
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reg-names = "lpaif_pri_mode_muxsel",
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"lpaif_sec_mode_muxsel",
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"lpaif_tert_mode_muxsel",
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"lpaif_quat_mode_muxsel";
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qcom,msm-mclk-freq = <9600000>;
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qcom,msm-mbhc-hphl-swh = <1>;
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qcom,msm-mbhc-gnd-swh = <1>;
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qcom,msm-hs-micbias-type = "external";
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qcom,us-euro-gpios = <&us_euro_gpio>;
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qcom,cdc-pdm-gpios = <&cdc_pdm_gpios>;
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qcom,cdc-comp-gpios = <&cdc_comp_gpios>;
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qcom,cdc-dmic-gpios = <&cdc_dmic_gpios>;
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qcom,cdc-sdw-gpios = <&cdc_sdw_gpios>;
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qcom,audio-routing =
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"RX_BIAS", "INT_MCLK0",
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"SPK_RX_BIAS", "INT_MCLK0",
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"INT_LDO_H", "INT_MCLK0",
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"MIC BIAS External", "Handset Mic",
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"MIC BIAS External2", "Headset Mic",
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"MIC BIAS External", "Secondary Mic",
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"AMIC1", "MIC BIAS External",
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"AMIC2", "MIC BIAS External2",
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"AMIC3", "MIC BIAS External",
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"DMIC1", "MIC BIAS External",
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"MIC BIAS External", "Digital Mic1",
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"DMIC2", "MIC BIAS External",
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"MIC BIAS External", "Digital Mic2",
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"DMIC3", "MIC BIAS External",
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"MIC BIAS External", "Digital Mic3",
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"DMIC4", "MIC BIAS External",
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"MIC BIAS External", "Digital Mic4",
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"SpkrLeft IN", "SPK1 OUT",
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"SpkrRight IN", "SPK2 OUT";
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asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>,
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<&loopback>, <&compress>, <&hostless>,
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<&afe>, <&lsm>, <&routing>, <&compr>,
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<&pcm_noirq>;
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asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1",
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"msm-pcm-dsp.2", "msm-voip-dsp",
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"msm-pcm-voice", "msm-pcm-loopback",
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"msm-compress-dsp", "msm-pcm-hostless",
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"msm-pcm-afe", "msm-lsm-client",
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"msm-pcm-routing", "msm-compr-dsp",
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"msm-pcm-dsp-noirq";
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asoc-cpu = <&dai_mi2s0>, <&dai_mi2s1>,
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<&dai_mi2s2>, <&dai_mi2s3>,
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<&dai_int_mi2s0>, <&dai_int_mi2s1>,
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<&dai_int_mi2s2>, <&dai_int_mi2s3>,
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<&dai_int_mi2s4>, <&dai_int_mi2s5>,
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<&dai_pri_auxpcm>, <&dai_sec_auxpcm>,
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<&dai_tert_auxpcm>, <&dai_quat_auxpcm>,
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<&afe_pcm_rx>, <&afe_pcm_tx>, <&afe_proxy_rx>,
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<&afe_proxy_tx>, <&incall_record_rx>,
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<&incall_record_tx>, <&incall_music_rx>,
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<&incall_music_2_rx>, <&sb_7_rx>, <&sb_7_tx>,
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<&sb_8_tx>, <&sb_8_rx>,
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<&usb_audio_rx>, <&usb_audio_tx>,
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<&dai_pri_tdm_rx_0>, <&dai_pri_tdm_tx_0>,
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<&dai_sec_tdm_rx_0>, <&dai_sec_tdm_tx_0>,
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<&dai_tert_tdm_rx_0>, <&dai_tert_tdm_tx_0>,
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<&dai_quat_tdm_rx_0>, <&dai_quat_tdm_tx_0>;
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asoc-cpu-names = "msm-dai-q6-mi2s.0", "msm-dai-q6-mi2s.1",
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"msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3",
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"msm-dai-q6-mi2s.7", "msm-dai-q6-mi2s.8",
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"msm-dai-q6-mi2s.9", "msm-dai-q6-mi2s.10",
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"msm-dai-q6-mi2s.11", "msm-dai-q6-mi2s.12",
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"msm-dai-q6-auxpcm.1", "msm-dai-q6-auxpcm.2",
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"msm-dai-q6-auxpcm.3", "msm-dai-q6-auxpcm.4",
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"msm-dai-q6-dev.224", "msm-dai-q6-dev.225",
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"msm-dai-q6-dev.241", "msm-dai-q6-dev.240",
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"msm-dai-q6-dev.32771", "msm-dai-q6-dev.32772",
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"msm-dai-q6-dev.32773", "msm-dai-q6-dev.32770",
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"msm-dai-q6-dev.16398", "msm-dai-q6-dev.16399",
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"msm-dai-q6-dev.16401", "msm-dai-q6-dev.16400",
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"msm-dai-q6-dev.28672", "msm-dai-q6-dev.28673",
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"msm-dai-q6-tdm.36864", "msm-dai-q6-tdm.36865",
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"msm-dai-q6-tdm.36880", "msm-dai-q6-tdm.36881",
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"msm-dai-q6-tdm.36896", "msm-dai-q6-tdm.36897",
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"msm-dai-q6-tdm.36912", "msm-dai-q6-tdm.36913";
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asoc-codec = <&stub_codec>, <&msm_digital_codec>,
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<&pmic_analog_codec>, <&msm_sdw_codec>;
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asoc-codec-names = "msm-stub-codec.1", "msm-dig-codec",
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"analog-codec", "msm_sdw_codec";
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qcom,wsa-max-devs = <2>;
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qcom,wsa-devs = <&wsa881x_211_en>, <&wsa881x_212_en>,
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<&wsa881x_213_en>, <&wsa881x_214_en>;
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qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrRight",
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"SpkrLeft", "SpkrRight";
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};
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us_euro_gpio: msm_cdc_pinctrl@75 {
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compatible = "qcom,msm-cdc-pinctrl";
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@ -800,38 +907,36 @@
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compatible = "qcom,wcd9xxx-irq";
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&tlmm>;
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qcom,gpio-connect = <&tlmm 54 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&wcd_intr_default>;
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interrupts = <0 177 0>;
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interrupt-names = "wcd_irq";
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};
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clock_audio: audio_ext_clk {
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compatible = "qcom,audio-ref-clk";
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qcom,audio-ref-clk-gpio = <&pmfalcon_gpios 3 0>;
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clock-names = "osr_clk";
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clocks = <&clock_gcc clk_div_clk1>;
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clocks = <&clock_rpmcc AUDIO_PMI_CLK>;
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qcom,node_has_rpm_clock;
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#clock-cells = <1>;
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pinctrl-names = "sleep", "active";
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pinctrl-0 = <&spkr_i2s_clk_sleep>;
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pinctrl-1 = <&spkr_i2s_clk_active>;
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pinctrl-0 = <&lpi_mclk0_sleep>;
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pinctrl-1 = <&lpi_mclk0_active>;
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};
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clock_audio_lnbb: audio_ext_clk_lnbb {
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compatible = "qcom,audio-ref-clk";
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clock-names = "osr_clk";
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clocks = <&clock_gcc clk_ln_bb_clk2>;
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clocks = <&clock_rpmcc AUDIO_PMIC_LNBB_CLK>;
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qcom,node_has_rpm_clock;
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#clock-cells = <1>;
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};
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wcd_rst_gpio: msm_cdc_pinctrl@64 {
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compatible = "qcom,msm-cdc-pinctrl";
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qcom,cdc-rst-n-gpio = <&tlmm 64 0>;
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qcom,cdc-rst-n-gpio = <&lpi_tlmm 24 0>;
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pinctrl-names = "aud_active", "aud_sleep";
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pinctrl-0 = <&cdc_reset_active>;
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pinctrl-1 = <&cdc_reset_sleep>;
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pinctrl-0 = <&lpi_cdc_reset_active>;
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pinctrl-1 = <&lpi_cdc_reset_sleep>;
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};
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};
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@ -117,7 +117,7 @@
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};
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};
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qcom,pm2falcon@3 {
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pm2falcon_3: qcom,pm2falcon@3 {
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compatible ="qcom,spmi-pmic";
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reg = <0x3 SPMI_USID>;
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#address-cells = <2>;
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@ -10,18 +10,60 @@
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* GNU General Public License for more details.
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*/
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&clock_audio {
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qcom,audio-ref-clk-gpio = <&pmfalcon_gpios 3 0>;
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#include "msm-audio.dtsi"
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#include "msmfalcon-audio.dtsi"
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&pm2falcon_3 {
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/delete-node/analog-codec;
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};
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&pmfalcon_gpios {
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gpio@c200 {
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status = "ok";
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qcom,mode = <1>;
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qcom,pull = <5>;
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qcom,vin-sel = <0>;
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qcom,src-sel = <2>;
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qcom,master-en = <1>;
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qcom,out-strength = <2>;
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&soc {
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/delete-node/msm-sdw-codec@152c1000;
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/delete-node/sound;
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};
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&slim_aud {
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tasha_codec {
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clocks = <&clock_audio clk_audio_pmi_clk>,
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<&clock_audio clk_audio_ap_clk2>;
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};
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tavil_codec {
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clocks = <&clock_audio_lnbb clk_audio_pmi_lnbb_clk>;
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};
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};
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&tasha_hph_en0 {
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/delete-property/pinctrl-0;
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/delete-property/pinctrl-1;
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};
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&tasha_hph_en1 {
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/delete-property/pinctrl-0;
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/delete-property/pinctrl-1;
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};
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&clock_audio {
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qcom,audio-ref-clk-gpio = <&pmfalcon_gpios 3 0>;
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clocks = <&clock_gcc clk_div_clk1>;
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pinctrl-0 = <&spkr_i2s_clk_sleep>;
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pinctrl-1 = <&spkr_i2s_clk_active>;
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};
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&clock_audio_lnbb {
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clocks = <&clock_gcc clk_ln_bb_clk2>;
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};
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&wcd_rst_gpio {
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qcom,cdc-rst-n-gpio = <&tlmm 64 0>;
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pinctrl-0 = <&cdc_reset_active>;
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pinctrl-1 = <&cdc_reset_sleep>;
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};
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&wcd9xxx_intc {
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interrupt-parent = <&tlmm>;
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qcom,gpio-connect = <&tlmm 54 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&wcd_intr_default>;
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/delete-property/interrupts;
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/delete-property/interrupt-names;
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};
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@ -3085,8 +3085,6 @@
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#include "msm8998-mdss.dtsi"
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#include "msm8998-mdss-pll.dtsi"
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#include "msm8998-blsp.dtsi"
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#include "msm-audio.dtsi"
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#include "msmfalcon-audio.dtsi"
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#include "msm-smb138x.dtsi"
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/* GPU overrides */
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@ -10,10 +10,6 @@
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* GNU General Public License for more details.
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*/
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&clock_audio {
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/delete-property/qcom,audio-ref-clk-gpio;
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};
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&slim_aud {
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tasha_codec {
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/delete-property/cdc-vdd-buck-supply;
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@ -12,6 +12,7 @@
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*/
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#include "msmfalcon-wsa881x.dtsi"
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#include "msmfalcon-lpi.dtsi"
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&slim_aud {
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msm_dai_slim {
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qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>;
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clock-names = "wcd_clk", "wcd_native_clk";
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clocks = <&clock_audio clk_audio_pmi_clk>,
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<&clock_audio clk_audio_ap_clk2>;
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clocks = <&clock_audio AUDIO_PMI_CLK>,
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<&clock_audio AUDIO_AP_CLK2>;
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cdc-vdd-mic-bias-supply = <&pm2falcon_bob>;
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qcom,cdc-vdd-mic-bias-voltage = <3300000 3300000>;
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qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>;
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clock-names = "wcd_clk";
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clocks = <&clock_audio_lnbb clk_audio_pmi_lnbb_clk>;
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clocks = <&clock_audio_lnbb AUDIO_PMIC_LNBB_CLK>;
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cdc-vdd-mic-bias-supply = <&pm2falcon_bob>;
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qcom,cdc-vdd-mic-bias-voltage = <3300000 3300000>;
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};
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};
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};
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&pm2falcon_3 {
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pmic_analog_codec: analog-codec@f000 {
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status = "disabled";
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compatible = "qcom,pmic-analog-codec";
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reg = <0xf000 0x200>;
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interrupt-parent = <&spmi_bus>;
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interrupts = <0x1 0xf0 0x0>,
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<0x1 0xf0 0x1>,
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<0x1 0xf0 0x2>,
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<0x1 0xf0 0x3>,
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<0x1 0xf0 0x4>,
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<0x1 0xf0 0x5>,
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<0x1 0xf0 0x6>,
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<0x1 0xf0 0x7>;
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interrupt-names = "spk_cnp_int",
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"spk_clip_int",
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"spk_ocp_int",
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"ins_rem_det1",
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"but_rel_det",
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"but_press_det",
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"ins_rem_det",
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"mbhc_int";
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cdc-vdda-cp-supply = <&pmfalcon_s4>;
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qcom,cdc-vdda-cp-voltage = <1900000 2050000>;
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qcom,cdc-vdda-cp-current = <50000>;
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cdc-vdd-pa-supply = <&pmfalcon_s4>;
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qcom,cdc-vdd-pa-voltage = <2040000 2040000>;
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qcom,cdc-vdd-pa-current = <260000>;
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cdc-vdd-mic-bias-supply = <&pm2falcon_l7>;
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qcom,cdc-vdd-mic-bias-voltage = <3125000 3125000>;
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qcom,cdc-vdd-mic-bias-current = <5000>;
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qcom,cdc-mclk-clk-rate = <9600000>;
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qcom,cdc-static-supplies = "cdc-vdda-cp",
|
||||
"cdc-vdd-pa";
|
||||
|
||||
qcom,cdc-on-demand-supplies = "cdc-vdd-mic-bias";
|
||||
|
||||
cdc_pdm_gpios: cdc_pdm_pinctrl {
|
||||
compatible = "qcom,msm-cdc-pinctrl";
|
||||
pinctrl-names = "aud_active", "aud_sleep";
|
||||
pinctrl-0 = <&cdc_pdm_gpios_active>;
|
||||
pinctrl-1 = <&cdc_pdm_gpios_sleep>;
|
||||
qcom,lpi-gpios;
|
||||
};
|
||||
|
||||
cdc_comp_gpios: cdc_comp_pinctrl {
|
||||
compatible = "qcom,msm-cdc-pinctrl";
|
||||
pinctrl-names = "aud_active", "aud_sleep";
|
||||
pinctrl-0 = <&cdc_comp_gpios_active>;
|
||||
pinctrl-1 = <&cdc_comp_gpios_sleep>;
|
||||
qcom,lpi-gpios;
|
||||
};
|
||||
/*
|
||||
* Not marking address @ as driver searches this child
|
||||
* with name msm-dig-codec
|
||||
*/
|
||||
msm_digital_codec: msm-dig-codec {
|
||||
compatible = "qcom,msm-digital-codec";
|
||||
reg = <0x152c0000 0x0>;
|
||||
cdc_dmic_gpios: cdc_dmic_pinctrl {
|
||||
compatible = "qcom,msm-cdc-pinctrl";
|
||||
pinctrl-names = "aud_active", "aud_sleep";
|
||||
pinctrl-0 = <&cdc_dmic12_gpios_active
|
||||
&cdc_dmic34_gpios_active>;
|
||||
pinctrl-1 = <&cdc_dmic12_gpios_sleep
|
||||
&cdc_dmic34_gpios_sleep>;
|
||||
qcom,lpi-gpios;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
msm_sdw_codec: msm-sdw-codec@152c1000 {
|
||||
status = "disabled";
|
||||
compatible = "qcom,msm-sdw-codec";
|
||||
reg = <0x152c1000 0x0>;
|
||||
interrupts = <0 161 0>;
|
||||
interrupt-names = "swr_master_irq";
|
||||
|
||||
cdc_sdw_gpios: sdw_clk_data_pinctrl {
|
||||
compatible = "qcom,msm-cdc-pinctrl";
|
||||
pinctrl-names = "aud_active", "aud_sleep";
|
||||
pinctrl-0 = <&sdw_clk_active &sdw_data_active>;
|
||||
pinctrl-1 = <&sdw_clk_sleep &sdw_data_sleep>;
|
||||
};
|
||||
|
||||
wsa_spkr_en1: wsa_spkr_en1_pinctrl {
|
||||
compatible = "qcom,msm-cdc-pinctrl";
|
||||
pinctrl-names = "aud_active", "aud_sleep";
|
||||
pinctrl-0 = <&spkr_1_sd_n_active>;
|
||||
pinctrl-1 = <&spkr_1_sd_n_sleep>;
|
||||
};
|
||||
|
||||
wsa_spkr_en2: wsa_spkr_en2_pinctrl {
|
||||
compatible = "qcom,msm-cdc-pinctrl";
|
||||
pinctrl-names = "aud_active", "aud_sleep";
|
||||
pinctrl-0 = <&spkr_2_sd_n_active>;
|
||||
pinctrl-1 = <&spkr_2_sd_n_sleep>;
|
||||
};
|
||||
|
||||
swr_master {
|
||||
compatible = "qcom,swr-wcd";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
|
||||
wsa881x_211_en: wsa881x_en@20170211 {
|
||||
compatible = "qcom,wsa881x";
|
||||
reg = <0x0 0x20170211>;
|
||||
qcom,spkr-sd-n-node = <&wsa_spkr_en1>;
|
||||
};
|
||||
|
||||
wsa881x_212_en: wsa881x_en@20170212 {
|
||||
compatible = "qcom,wsa881x";
|
||||
reg = <0x0 0x20170212>;
|
||||
qcom,spkr-sd-n-node = <&wsa_spkr_en2>;
|
||||
};
|
||||
|
||||
wsa881x_213_en: wsa881x_en@21170213 {
|
||||
compatible = "qcom,wsa881x";
|
||||
reg = <0x0 0x21170213>;
|
||||
qcom,spkr-sd-n-node = <&wsa_spkr_en1>;
|
||||
};
|
||||
|
||||
wsa881x_214_en: wsa881x_en@21170214 {
|
||||
compatible = "qcom,wsa881x";
|
||||
reg = <0x0 0x21170214>;
|
||||
qcom,spkr-sd-n-node = <&wsa_spkr_en2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pmfalcon_gpios {
|
||||
gpio@c200 {
|
||||
status = "ok";
|
||||
qcom,mode = <1>;
|
||||
qcom,pull = <5>;
|
||||
qcom,vin-sel = <0>;
|
||||
qcom,src-sel = <2>;
|
||||
qcom,master-en = <1>;
|
||||
qcom,out-strength = <2>;
|
||||
};
|
||||
};
|
||||
|
|
182
arch/arm/boot/dts/qcom/msmfalcon-lpi.dtsi
Normal file
182
arch/arm/boot/dts/qcom/msmfalcon-lpi.dtsi
Normal file
|
@ -0,0 +1,182 @@
|
|||
/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
&soc {
|
||||
lpi_tlmm: lpi_pinctrl@15070000 {
|
||||
compatible = "qcom,lpi-pinctrl";
|
||||
reg = <0x15070000 0x0>;
|
||||
qcom,num-gpios = <32>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
lpi_mclk0_active: lpi_mclk0_active {
|
||||
mux {
|
||||
pins = "gpio18";
|
||||
function = "func2";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio18";
|
||||
drive-strength = <8>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
lpi_mclk0_sleep: lpi_mclk0_sleep {
|
||||
mux {
|
||||
pins = "gpio18";
|
||||
function = "func2";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio18";
|
||||
drive-strength = <2>;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
cdc_pdm_gpios_active: cdc_pdm_gpios_active {
|
||||
mux {
|
||||
pins = "gpio18", "gpio19",
|
||||
"gpio20", "gpio21",
|
||||
"gpio23", "gpio25";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio18", "gpio19",
|
||||
"gpio20", "gpio21",
|
||||
"gpio23", "gpio25";
|
||||
drive-strength = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
cdc_pdm_gpios_sleep: cdc_pdm_gpios_sleep {
|
||||
mux {
|
||||
pins = "gpio18", "gpio19",
|
||||
"gpio20", "gpio21",
|
||||
"gpio23", "gpio25";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio18", "gpio19",
|
||||
"gpio20", "gpio21",
|
||||
"gpio23", "gpio25";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
cdc_comp_gpios_active: cdc_pdm_comp_gpios_active {
|
||||
mux {
|
||||
pins = "gpio22", "gpio24";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio22", "gpio24";
|
||||
drive-strength = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
cdc_comp_gpios_sleep: cdc_pdm_comp_gpios_sleep {
|
||||
mux {
|
||||
pins = "gpio22", "gpio24";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio22", "gpio24";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
lpi_cdc_reset_active: lpi_cdc_reset_active {
|
||||
mux {
|
||||
pins = "gpio24";
|
||||
function = "func2";
|
||||
};
|
||||
config {
|
||||
pins = "gpio24";
|
||||
drive-strength = <16>;
|
||||
bias-pull-down;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
|
||||
lpi_cdc_reset_sleep: lpi_cdc_reset_sleep {
|
||||
mux {
|
||||
pins = "gpio24";
|
||||
function = "func2";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio24";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
|
||||
cdc_dmic12_gpios_active: dmic12_gpios_active {
|
||||
mux {
|
||||
pins = "gpio26", "gpio27";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio26", "gpio27";
|
||||
drive-strength = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
cdc_dmic12_gpios_sleep: dmic12_gpios_sleep {
|
||||
mux {
|
||||
pins = "gpio26", "gpio27";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio26", "gpio27";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
|
||||
cdc_dmic34_gpios_active: dmic34_gpios_active {
|
||||
mux {
|
||||
pins = "gpio28", "gpio29";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio28", "gpio29";
|
||||
drive-strength = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
cdc_dmic34_gpios_sleep: dmic34_gpios_sleep {
|
||||
mux {
|
||||
pins = "gpio28", "gpio29";
|
||||
function = "func1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio28", "gpio29";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
|
@ -595,6 +595,62 @@
|
|||
};
|
||||
};
|
||||
|
||||
sdw_clk_pin {
|
||||
sdw_clk_sleep: sdw_clk_sleep {
|
||||
mux {
|
||||
pins = "gpio24";
|
||||
function = "sndwire_clk";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio24";
|
||||
drive-strength = <2>;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
sdw_clk_active: sdw_clk_active {
|
||||
mux {
|
||||
pins = "gpio24";
|
||||
function = "sndwire_clk";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio24";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sdw_clk_data {
|
||||
sdw_data_sleep: sdw_data_sleep {
|
||||
mux {
|
||||
pins = "gpio25";
|
||||
function = "sndwire_data";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio25";
|
||||
drive-strength = <2>;
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
sdw_data_active: sdw_data_active {
|
||||
mux {
|
||||
pins = "gpio25";
|
||||
function = "sndwire_data";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio25";
|
||||
drive-strength = <16>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* WSA speaker reset pins */
|
||||
spkr_1_sd_n {
|
||||
spkr_1_sd_n_sleep: spkr_1_sd_n_sleep {
|
||||
|
@ -656,6 +712,86 @@
|
|||
};
|
||||
};
|
||||
|
||||
wcd_gnd_mic_swap {
|
||||
wcd_gnd_mic_swap_idle: wcd_gnd_mic_swap_idle {
|
||||
mux {
|
||||
pins = "gpio63";
|
||||
function = "gpio";
|
||||
};
|
||||
config {
|
||||
pins = "gpio63";
|
||||
drive-strength = <2>;
|
||||
bias-pull-down;
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
|
||||
wcd_gnd_mic_swap_active: wcd_gnd_mic_swap_active {
|
||||
mux {
|
||||
pins = "gpio63";
|
||||
function = "gpio";
|
||||
};
|
||||
config {
|
||||
pins = "gpio63";
|
||||
drive-strength = <2>;
|
||||
bias-disable;
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
msm_hph_en0 {
|
||||
hph_en0_sleep: hph_en0_sleep {
|
||||
mux {
|
||||
pins = "gpio24";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio24";
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
|
||||
hph_en0_active: hph_en0_active {
|
||||
mux {
|
||||
pins = "gpio24";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio24";
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
msm_hph_en1 {
|
||||
hph_en1_sleep: hph_en1_sleep {
|
||||
mux {
|
||||
pins = "gpio25";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio25";
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
|
||||
hph_en1_active: hph_en1_active {
|
||||
mux {
|
||||
pins = "gpio25";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio25";
|
||||
output-high;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* HS UART CONFIGURATION */
|
||||
blsp1_uart1_active: blsp1_uart1_active {
|
||||
mux {
|
||||
|
|
|
@ -25,6 +25,20 @@
|
|||
pinctrl-0 = <&spkr_2_sd_n_active>;
|
||||
pinctrl-1 = <&spkr_2_sd_n_sleep>;
|
||||
};
|
||||
|
||||
tasha_hph_en0: msm_cdc_pinctrl_hph_en0 {
|
||||
compatible = "qcom,msm-cdc-pinctrl";
|
||||
pinctrl-names = "aud_active", "aud_sleep";
|
||||
pinctrl-0 = <&hph_en0_active>;
|
||||
pinctrl-1 = <&hph_en0_sleep>;
|
||||
};
|
||||
|
||||
tasha_hph_en1: msm_cdc_pinctrl_hph_en1 {
|
||||
compatible = "qcom,msm-cdc-pinctrl";
|
||||
pinctrl-names = "aud_active", "aud_sleep";
|
||||
pinctrl-0 = <&hph_en1_active>;
|
||||
pinctrl-1 = <&hph_en1_sleep>;
|
||||
};
|
||||
};
|
||||
|
||||
tavil_codec {
|
||||
|
|
|
@ -15,6 +15,7 @@
|
|||
#include <dt-bindings/clock/qcom,gpu-msmfalcon.h>
|
||||
#include <dt-bindings/clock/qcom,mmcc-msmfalcon.h>
|
||||
#include <dt-bindings/clock/qcom,rpmcc.h>
|
||||
#include <dt-bindings/clock/audio-ext-clk.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/regulator/qcom,rpm-smd-regulator.h>
|
||||
|
||||
|
@ -1596,6 +1597,8 @@
|
|||
#include "msm-gdsc-falcon.dtsi"
|
||||
#include "msmfalcon-gpu.dtsi"
|
||||
#include "msmfalcon-pm.dtsi"
|
||||
#include "msm-audio.dtsi"
|
||||
#include "msmfalcon-audio.dtsi"
|
||||
|
||||
&gdsc_usb30 {
|
||||
status = "ok";
|
||||
|
|
Loading…
Add table
Reference in a new issue