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[PATCH] intelfb: extend partial support of i915G to include i915GM

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Add partial support for GMA900 within the i915GM chipset.

Signed-off-by: Scott MacKenzie <irrational@poboxes.com>
Cc: "Antonino A. Daplas" <adaplas@pol.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Scott MacKenzie 2005-11-07 01:00:33 -08:00 • committed by Linus Torvalds
parent b8c49ef6ae
commit 3a59026ba1
3 changed files with 14 additions and 5 deletions
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6
drivers/video/intelfb/intelfb.h
View file

@ -10,7 +10,7 @@
/*** Version/name ***/ /*** Version/name ***/
#define INTELFB_VERSION "0.9.2" #define INTELFB_VERSION "0.9.2"
#define INTELFB_MODULE_NAME "intelfb" #define INTELFB_MODULE_NAME "intelfb"
#define SUPPORTED_CHIPSETS "830M/845G/852GM/855GM/865G/915G" #define SUPPORTED_CHIPSETS "830M/845G/852GM/855GM/865G/915G/915GM"
/*** Debug/feature defines ***/ /*** Debug/feature defines ***/
@ -47,6 +47,7 @@
#define PCI_DEVICE_ID_INTEL_85XGM 0x3582 #define PCI_DEVICE_ID_INTEL_85XGM 0x3582
#define PCI_DEVICE_ID_INTEL_865G 0x2572 #define PCI_DEVICE_ID_INTEL_865G 0x2572
#define PCI_DEVICE_ID_INTEL_915G 0x2582 #define PCI_DEVICE_ID_INTEL_915G 0x2582
#define PCI_DEVICE_ID_INTEL_915GM 0x2592
/* Size of MMIO region */ /* Size of MMIO region */
#define INTEL_REG_SIZE 0x80000 #define INTEL_REG_SIZE 0x80000
@ -119,7 +120,8 @@ enum intel_chips {
INTEL_855GM, INTEL_855GM,
INTEL_855GME, INTEL_855GME,
INTEL_865G, INTEL_865G,
INTEL_915G INTEL_915G,
INTEL_915GM
}; };
struct intelfb_hwstate { struct intelfb_hwstate {

8
drivers/video/intelfb/intelfbdrv.c
View file

@ -1,7 +1,7 @@
/* /*
* intelfb * intelfb
* *
* Linux framebuffer driver for Intel(R) 830M/845G/852GM/855GM/865G/915G * Linux framebuffer driver for Intel(R) 830M/845G/852GM/855GM/865G/915G/915GM
* integrated graphics chips. * integrated graphics chips.
* *
* Copyright © 2002, 2003 David Dawes <dawes@xfree86.org> * Copyright © 2002, 2003 David Dawes <dawes@xfree86.org>
@ -186,6 +186,7 @@ static struct pci_device_id intelfb_pci_table[] __devinitdata = {
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_85XGM, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_85XGM }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_85XGM, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_85XGM },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_865G, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_865G }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_865G, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_865G },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_915G, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_915G }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_915G, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_915G },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_915GM, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_915GM },
{ 0, } { 0, }
}; };
@ -549,10 +550,11 @@ intelfb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent)
} }
/* Set base addresses. */ /* Set base addresses. */
if (ent->device == PCI_DEVICE_ID_INTEL_915G) { if ((ent->device == PCI_DEVICE_ID_INTEL_915G) ||
(ent->device == PCI_DEVICE_ID_INTEL_915GM)) {
aperture_bar = 2; aperture_bar = 2;
mmio_bar = 0; mmio_bar = 0;
/* Disable HW cursor on 915G (not implemented yet) */ /* Disable HW cursor on 915G/M (not implemented yet) */
hwcursor = 0; hwcursor = 0;
} }
dinfo->aperture.physical = pci_resource_start(pdev, aperture_bar); dinfo->aperture.physical = pci_resource_start(pdev, aperture_bar);

5
drivers/video/intelfb/intelfbhw.c
View file

@ -99,6 +99,11 @@ intelfbhw_get_chipset(struct pci_dev *pdev, const char **name, int *chipset,
*chipset = INTEL_915G; *chipset = INTEL_915G;
*mobile = 0; *mobile = 0;
return 0; return 0;
case PCI_DEVICE_ID_INTEL_915GM:
*name = "Intel(R) 915GM";
*chipset = INTEL_915GM;
*mobile = 1;
return 0;
default: default:
return 1; return 1;
} }