ARM: dts: msm: rename mdss_mdp to sde_kms and add HDMI TX device node

Rename mdss_mdp to sde_kms in the device tree to reflect the
new display DRM driver terminology and add support for HDMI TX
device node

Change-Id: Ide5dc6a5939945a3e993eca650c66a56f3955140
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
This commit is contained in:
Abhinav Kumar 2017-01-26 23:18:41 -08:00
parent 9a0a010c8e
commit 3cc4d79452
3 changed files with 80 additions and 4 deletions

View file

@ -0,0 +1,22 @@
Qualcomm Technologies,Inc. Adreno/Snapdragon hdmi display manager
Required properties:
- compatible: "qcom,hdmi-display"
- label: label of this display manager
Optional properties:
- qcom,display-type: display type of this manager. It could be "primary",
"secondary", "tertiary", etc.
Example:
/ {
...
hdmi_display: qcom,hdmi-display {
compatible = "qcom,hdmi-display";
label = "hdmi_display";
qcom,display-type = "secondary";
};
};

View file

@ -17,8 +17,15 @@
cell-index = <0>;
label = "wb_display";
};
sde_hdmi: qcom,hdmi-display {
compatible = "qcom,hdmi-display";
label = "sde_hdmi";
qcom,display-type = "secondary";
};
};
&mdss_mdp {
connectors = <&sde_wb>;
&sde_kms {
connectors = <&sde_hdmi_tx &sde_hdmi &sde_wb>;
};

View file

@ -11,7 +11,7 @@
*/
&soc {
mdss_mdp: qcom,mdss_mdp@c900000 {
sde_kms: qcom,sde_kms@c900000 {
compatible = "qcom,sde-kms";
reg = <0x0c900000 0x90000>,
<0x0c9b0000 0x1040>;
@ -136,7 +136,7 @@
};
};
smmu_mdp_unsec: qcom,smmu_mdp_unsec_cb {
smmu_kms_unsec: qcom,smmu_kms_unsec_cb {
compatible = "qcom,smmu_mdp_unsec";
iommus = <&mmss_smmu 0>;
};
@ -163,5 +163,52 @@
<1 590 0 320000>;
};
};
sde_hdmi_tx: qcom,hdmi_tx_8998@c9a0000 {
cell-index = <0>;
compatible = "qcom,hdmi-tx-8998";
reg = <0xc9a0000 0x50c>,
<0x780000 0x621c>,
<0xc9e0000 0x28>;
reg-names = "core_physical", "qfprom_physical", "hdcp_physical";
interrupt-parent = <&sde_kms>;
interrupts = <8 0>;
qcom,hdmi-tx-ddc-clk-gpio = <&tlmm 32 0>;
qcom,hdmi-tx-ddc-data-gpio = <&tlmm 33 0>;
qcom,hdmi-tx-hpd-gpio = <&tlmm 34 0>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&mdss_hdmi_hpd_active
&mdss_hdmi_ddc_active
&mdss_hdmi_cec_active>;
pinctrl-1 = <&mdss_hdmi_hpd_suspend
&mdss_hdmi_ddc_suspend
&mdss_hdmi_cec_suspend>;
hpd-gdsc-supply = <&gdsc_mdss>;
qcom,supply-names = "hpd-gdsc";
qcom,min-voltage-level = <0>;
qcom,max-voltage-level = <0>;
qcom,enable-load = <0>;
qcom,disable-load = <0>;
qcom,msm_ext_disp = <&msm_ext_disp>;
clocks = <&clock_mmss clk_mmss_mnoc_ahb_clk>,
<&clock_mmss clk_mmss_mdss_ahb_clk>,
<&clock_mmss clk_mmss_mdss_hdmi_clk>,
<&clock_mmss clk_mmss_mdss_mdp_clk>,
<&clock_mmss clk_mmss_mdss_hdmi_dp_ahb_clk>,
<&clock_mmss clk_mmss_mdss_extpclk_clk>,
<&clock_mmss clk_mmss_mnoc_ahb_clk>,
<&clock_mmss clk_mmss_misc_ahb_clk>,
<&clock_mmss clk_mmss_mdss_axi_clk>;
clock-names = "hpd_mnoc_clk", "hpd_iface_clk",
"hpd_core_clk", "hpd_mdp_core_clk",
"hpd_alt_iface_clk", "core_extp_clk",
"mnoc_clk","hpd_misc_ahb_clk",
"hpd_bus_clk";
/*qcom,mdss-fb-map = <&mdss_fb2>;*/
qcom,pluggable;
};
};
#include "msm8998-sde-display.dtsi"