staging: comedi: ni_tio_internal.h: replace NITIO_Gi_Input_Select_Reg()
The "Input Select" registers are sequential in the enum ni_gpct_register. Replace this inline CamelCase function with a simple define. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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3 changed files with 11 additions and 25 deletions
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@ -393,7 +393,7 @@ void ni_tio_init_counter(struct ni_gpct *counter)
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regs[NITIO_LOADB_REG(counter->counter_index)],
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regs[NITIO_LOADB_REG(counter->counter_index)],
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NITIO_LOADB_REG(counter->counter_index));
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NITIO_LOADB_REG(counter->counter_index));
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ni_tio_set_bits(counter,
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ni_tio_set_bits(counter,
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NITIO_Gi_Input_Select_Reg(counter->counter_index), ~0,
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NITIO_INPUT_SEL_REG(counter->counter_index), ~0,
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0);
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0);
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if (ni_tio_counting_mode_registers_present(counter_dev)) {
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if (ni_tio_counting_mode_registers_present(counter_dev)) {
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ni_tio_set_bits(counter,
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ni_tio_set_bits(counter,
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@ -533,7 +533,7 @@ static int ni_tio_set_counter_mode(struct ni_gpct *counter, unsigned mode)
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if (mode & NI_GPCT_INVERT_OUTPUT_BIT)
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if (mode & NI_GPCT_INVERT_OUTPUT_BIT)
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input_select_bits |= Gi_Output_Polarity_Bit;
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input_select_bits |= Gi_Output_Polarity_Bit;
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ni_tio_set_bits(counter,
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ni_tio_set_bits(counter,
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NITIO_Gi_Input_Select_Reg(counter->counter_index),
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NITIO_INPUT_SEL_REG(counter->counter_index),
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Gi_Gate_Select_Load_Source_Bit | Gi_Or_Gate_Bit |
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Gi_Gate_Select_Load_Source_Bit | Gi_Or_Gate_Bit |
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Gi_Output_Polarity_Bit, input_select_bits);
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Gi_Output_Polarity_Bit, input_select_bits);
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@ -767,7 +767,7 @@ static int ni_tio_set_clock_src(struct ni_gpct *counter,
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if (clock_source & NI_GPCT_INVERT_CLOCK_SRC_BIT)
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if (clock_source & NI_GPCT_INVERT_CLOCK_SRC_BIT)
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input_select_bits |= Gi_Source_Polarity_Bit;
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input_select_bits |= Gi_Source_Polarity_Bit;
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ni_tio_set_bits(counter,
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ni_tio_set_bits(counter,
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NITIO_Gi_Input_Select_Reg(counter->counter_index),
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NITIO_INPUT_SEL_REG(counter->counter_index),
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Gi_Source_Select_Mask | Gi_Source_Polarity_Bit,
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Gi_Source_Select_Mask | Gi_Source_Polarity_Bit,
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input_select_bits);
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input_select_bits);
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ni_tio_set_source_subselect(counter, clock_source);
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ni_tio_set_source_subselect(counter, clock_source);
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@ -813,7 +813,7 @@ static unsigned ni_tio_clock_src_modifiers(const struct ni_gpct *counter)
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unsigned bits = 0;
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unsigned bits = 0;
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if (ni_tio_get_soft_copy(counter,
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if (ni_tio_get_soft_copy(counter,
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NITIO_Gi_Input_Select_Reg
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NITIO_INPUT_SEL_REG
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(counter->counter_index)) &
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(counter->counter_index)) &
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Gi_Source_Polarity_Bit)
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Gi_Source_Polarity_Bit)
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bits |= NI_GPCT_INVERT_CLOCK_SRC_BIT;
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bits |= NI_GPCT_INVERT_CLOCK_SRC_BIT;
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@ -832,7 +832,7 @@ static unsigned ni_m_series_clock_src_select(const struct ni_gpct *counter)
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unsigned clock_source = 0;
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unsigned clock_source = 0;
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unsigned i;
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unsigned i;
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const unsigned input_select = (ni_tio_get_soft_copy(counter,
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const unsigned input_select = (ni_tio_get_soft_copy(counter,
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NITIO_Gi_Input_Select_Reg
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NITIO_INPUT_SEL_REG
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(counter->counter_index))
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(counter->counter_index))
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& Gi_Source_Select_Mask) >>
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& Gi_Source_Select_Mask) >>
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Gi_Source_Select_Shift;
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Gi_Source_Select_Shift;
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@ -897,7 +897,7 @@ static unsigned ni_660x_clock_src_select(const struct ni_gpct *counter)
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unsigned clock_source = 0;
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unsigned clock_source = 0;
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unsigned i;
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unsigned i;
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const unsigned input_select = (ni_tio_get_soft_copy(counter,
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const unsigned input_select = (ni_tio_get_soft_copy(counter,
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NITIO_Gi_Input_Select_Reg
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NITIO_INPUT_SEL_REG
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(counter->counter_index))
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(counter->counter_index))
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& Gi_Source_Select_Mask) >>
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& Gi_Source_Select_Mask) >>
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Gi_Source_Select_Shift;
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Gi_Source_Select_Shift;
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@ -1076,7 +1076,7 @@ static int ni_660x_set_first_gate(struct ni_gpct *counter,
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break;
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break;
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}
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}
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ni_tio_set_bits(counter,
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ni_tio_set_bits(counter,
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NITIO_Gi_Input_Select_Reg(counter->counter_index),
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NITIO_INPUT_SEL_REG(counter->counter_index),
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Gi_Gate_Select_Mask,
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Gi_Gate_Select_Mask,
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Gi_Gate_Select_Bits(ni_660x_gate_select));
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Gi_Gate_Select_Bits(ni_660x_gate_select));
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return 0;
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return 0;
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@ -1125,7 +1125,7 @@ static int ni_m_series_set_first_gate(struct ni_gpct *counter,
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break;
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break;
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}
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}
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ni_tio_set_bits(counter,
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ni_tio_set_bits(counter,
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NITIO_Gi_Input_Select_Reg(counter->counter_index),
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NITIO_INPUT_SEL_REG(counter->counter_index),
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Gi_Gate_Select_Mask,
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Gi_Gate_Select_Mask,
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Gi_Gate_Select_Bits(ni_m_series_gate_select));
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Gi_Gate_Select_Bits(ni_m_series_gate_select));
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return 0;
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return 0;
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@ -1507,7 +1507,7 @@ static int ni_tio_get_gate_src(struct ni_gpct *counter, unsigned gate_index,
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} else {
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} else {
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gate_select_bits =
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gate_select_bits =
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(ni_tio_get_soft_copy(counter,
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(ni_tio_get_soft_copy(counter,
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NITIO_Gi_Input_Select_Reg
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NITIO_INPUT_SEL_REG
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(counter->counter_index)) &
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(counter->counter_index)) &
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Gi_Gate_Select_Mask) >> Gi_Gate_Select_Shift;
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Gi_Gate_Select_Mask) >> Gi_Gate_Select_Shift;
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}
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}
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@ -27,6 +27,7 @@
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#define NITIO_MODE_REG(x) (NITIO_G0_MODE + (x))
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#define NITIO_MODE_REG(x) (NITIO_G0_MODE + (x))
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#define NITIO_LOADA_REG(x) (NITIO_G0_LOADA + (x))
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#define NITIO_LOADA_REG(x) (NITIO_G0_LOADA + (x))
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#define NITIO_LOADB_REG(x) (NITIO_G0_LOADB + (x))
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#define NITIO_LOADB_REG(x) (NITIO_G0_LOADB + (x))
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#define NITIO_INPUT_SEL_REG(x) (NITIO_G0_INPUT_SEL + (x))
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static inline enum ni_gpct_register NITIO_Gi_Counting_Mode_Reg(unsigned idx)
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static inline enum ni_gpct_register NITIO_Gi_Counting_Mode_Reg(unsigned idx)
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{
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{
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@ -43,21 +44,6 @@ static inline enum ni_gpct_register NITIO_Gi_Counting_Mode_Reg(unsigned idx)
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return 0;
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return 0;
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}
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}
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static inline enum ni_gpct_register NITIO_Gi_Input_Select_Reg(unsigned idx)
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{
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switch (idx) {
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case 0:
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return NITIO_G0_INPUT_SEL;
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case 1:
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return NITIO_G1_INPUT_SEL;
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case 2:
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return NITIO_G2_INPUT_SEL;
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case 3:
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return NITIO_G3_INPUT_SEL;
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}
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return 0;
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}
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static inline enum ni_gpct_register NITIO_Gxx_Joint_Reset_Reg(unsigned idx)
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static inline enum ni_gpct_register NITIO_Gxx_Joint_Reset_Reg(unsigned idx)
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{
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{
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switch (idx) {
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switch (idx) {
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@ -66,7 +66,7 @@ static void ni_tio_configure_dma(struct ni_gpct *counter, short enable,
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input_select_bits |= Gi_Write_Acknowledges_Irq;
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input_select_bits |= Gi_Write_Acknowledges_Irq;
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}
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}
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ni_tio_set_bits(counter,
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ni_tio_set_bits(counter,
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NITIO_Gi_Input_Select_Reg(counter->counter_index),
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NITIO_INPUT_SEL_REG(counter->counter_index),
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Gi_Read_Acknowledges_Irq | Gi_Write_Acknowledges_Irq,
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Gi_Read_Acknowledges_Irq | Gi_Write_Acknowledges_Irq,
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input_select_bits);
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input_select_bits);
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switch (counter_dev->variant) {
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switch (counter_dev->variant) {
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