staging: comedi: ni_stc.h: tidy up AI_START_STOP_Select_Register and bits
Rename the CamelCase. Use the BIT() macro to define the bits. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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27cf6c02ab
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2 changed files with 40 additions and 41 deletions
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@ -357,7 +357,7 @@ static const struct mio_regmap m_series_stc_write_regmap[] = {
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[NISTC_INT_CTRL_REG] = { 0x176, 2 },
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[NISTC_AI_OUT_CTRL_REG] = { 0x178, 2 },
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[NISTC_ATRIG_ETC_REG] = { 0x17a, 2 },
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[AI_START_STOP_Select_Register] = { 0x17c, 2 },
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[NISTC_AI_START_STOP_REG] = { 0x17c, 2 },
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[AI_Trigger_Select_Register] = { 0x17e, 2 },
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[AI_DIV_Load_A_Register] = { 0x180, 4 },
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[AO_Start_Select_Register] = { 0x184, 2 },
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@ -2295,13 +2295,15 @@ static int ni_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
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ni_stc_writew(dev, mode2, NISTC_AI_MODE2_REG);
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if (cmd->chanlist_len == 1 || devpriv->is_611x || devpriv->is_6143) {
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start_stop_select |= AI_STOP_Polarity;
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start_stop_select |= AI_STOP_Select(31); /* logic low */
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start_stop_select |= AI_STOP_Sync;
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/* logic low */
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start_stop_select |= NISTC_AI_STOP_POLARITY |
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NISTC_AI_STOP_SEL(31) |
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NISTC_AI_STOP_SYNC;
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} else {
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start_stop_select |= AI_STOP_Select(19); /* ai configuration memory */
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/* ai configuration memory */
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start_stop_select |= NISTC_AI_STOP_SEL(19);
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}
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ni_stc_writew(dev, start_stop_select, AI_START_STOP_Select_Register);
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ni_stc_writew(dev, start_stop_select, NISTC_AI_START_STOP_REG);
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devpriv->ai_cmd2 = 0;
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switch (cmd->stop_src) {
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@ -2327,8 +2329,8 @@ static int ni_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
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interrupt_a_enable |= AI_STOP_Interrupt_Enable;
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/* this is required to get the last sample for chanlist_len > 1, not sure why */
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if (cmd->chanlist_len > 1)
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start_stop_select |=
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AI_STOP_Polarity | AI_STOP_Edge;
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start_stop_select |= NISTC_AI_STOP_POLARITY |
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NISTC_AI_STOP_EDGE;
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}
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break;
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case TRIG_NONE:
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@ -2348,22 +2350,21 @@ static int ni_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
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switch (cmd->scan_begin_src) {
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case TRIG_TIMER:
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/*
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stop bits for non 611x boards
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AI_SI_Special_Trigger_Delay=0
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NISTC_AI_MODE2_PRE_TRIGGER=0
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AI_START_STOP_Select_Register:
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AI_START_Polarity=0 (?) rising edge
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AI_START_Edge=1 edge triggered
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AI_START_Sync=1 (?)
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AI_START_Select=0 SI_TC
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AI_STOP_Polarity=0 rising edge
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AI_STOP_Edge=0 level
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AI_STOP_Sync=1
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AI_STOP_Select=19 external pin (configuration mem)
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* stop bits for non 611x boards
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* AI_SI_Special_Trigger_Delay=0
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* NISTC_AI_MODE2_PRE_TRIGGER=0
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* NISTC_AI_START_STOP_REG:
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* NISTC_AI_START_POLARITY=0 (?) rising edge
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* NISTC_AI_START_EDGE=1 edge triggered
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* NISTC_AI_START_SYNC=1 (?)
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* NISTC_AI_START_SEL=0 SI_TC
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* NISTC_AI_STOP_POLARITY=0 rising edge
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* NISTC_AI_STOP_EDGE=0 level
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* NISTC_AI_STOP_SYNC=1
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* NISTC_AI_STOP_SEL=19 external pin (configuration mem)
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*/
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start_stop_select |= AI_START_Edge | AI_START_Sync;
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ni_stc_writew(dev, start_stop_select,
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AI_START_STOP_Select_Register);
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start_stop_select |= NISTC_AI_START_EDGE | NISTC_AI_START_SYNC;
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ni_stc_writew(dev, start_stop_select, NISTC_AI_START_STOP_REG);
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mode2 &= ~NISTC_AI_MODE2_SI_INIT_LOAD_SRC; /* A */
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mode2 |= NISTC_AI_MODE2_SI_RELOAD_MODE(0);
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@ -2378,18 +2379,16 @@ static int ni_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
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break;
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case TRIG_EXT:
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if (cmd->scan_begin_arg & CR_EDGE)
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start_stop_select |= AI_START_Edge;
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/* AI_START_Polarity==1 is falling edge */
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if (cmd->scan_begin_arg & CR_INVERT)
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start_stop_select |= AI_START_Polarity;
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start_stop_select |= NISTC_AI_START_EDGE;
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if (cmd->scan_begin_arg & CR_INVERT) /* falling edge */
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start_stop_select |= NISTC_AI_START_POLARITY;
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if (cmd->scan_begin_src != cmd->convert_src ||
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(cmd->scan_begin_arg & ~CR_EDGE) !=
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(cmd->convert_arg & ~CR_EDGE))
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start_stop_select |= AI_START_Sync;
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start_stop_select |= NISTC_AI_START_SYNC;
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start_stop_select |=
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AI_START_Select(1 + CR_CHAN(cmd->scan_begin_arg));
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ni_stc_writew(dev, start_stop_select,
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AI_START_STOP_Select_Register);
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NISTC_AI_START_SEL(1 + CR_CHAN(cmd->scan_begin_arg));
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ni_stc_writew(dev, start_stop_select, NISTC_AI_START_STOP_REG);
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break;
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}
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@ -316,6 +316,16 @@
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#define NISTC_ATRIG_ETC_ENA BIT(3)
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#define NISTC_ATRIG_ETC_MODE(x) (((x) & 0x7) << 0)
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#define NISTC_AI_START_STOP_REG 62
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#define NISTC_AI_START_POLARITY BIT(15)
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#define NISTC_AI_STOP_POLARITY BIT(14)
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#define NISTC_AI_STOP_SYNC BIT(13)
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#define NISTC_AI_STOP_EDGE BIT(12)
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#define NISTC_AI_STOP_SEL(x) (((x) & 0x1f) << 7)
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#define NISTC_AI_START_SYNC BIT(6)
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#define NISTC_AI_START_EDGE BIT(5)
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#define NISTC_AI_START_SEL(x) (((x) & 0x1f) << 0)
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#define AI_Status_1_Register 2
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#define Interrupt_A_St 0x8000
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#define AI_FIFO_Full_St 0x4000
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@ -374,16 +384,6 @@ enum Joint_Status_2_Bits {
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#define AO_BC_Save_Registers 18
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#define AO_UC_Save_Registers 20
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#define AI_START_STOP_Select_Register 62
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#define AI_START_Polarity _bit15
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#define AI_STOP_Polarity _bit14
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#define AI_STOP_Sync _bit13
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#define AI_STOP_Edge _bit12
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#define AI_STOP_Select(a) (((a) & 0x1f)<<7)
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#define AI_START_Sync _bit6
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#define AI_START_Edge _bit5
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#define AI_START_Select(a) ((a) & 0x1f)
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#define AI_Trigger_Select_Register 63
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#define AI_START1_Polarity _bit15
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#define AI_START2_Polarity _bit14
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