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ARM: dts: msm: Define SDC2 tlmm pins for msmcobalt

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Add the pinctrl config entries for SDC2 tlmm and card detect
gpio pins.

Change-Id: Ib4137780625fd35968aa920abde973b007754682
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
This commit is contained in:
Venkat Gopalakrishnan 2016-04-11 18:35:09 -07:00 • committed by Kyle Yan
parent 0f02e45668
commit 400a20450f
5 changed files with 98 additions and 0 deletions
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6
arch/arm/boot/dts/qcom/msmcobalt-cdp.dtsi
View file

@ -78,10 +78,16 @@
qcom,vdd-io-voltage-level = <1808000 2960000>;
qcom,vdd-io-current-level = <200 22000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
qcom,clk-rates = <400000 20000000 25000000
50000000 100000000 200000000>;
qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
cd-gpios = <&tlmm 95 0x1>;
status = "ok";
};

6
arch/arm/boot/dts/qcom/msmcobalt-mtp.dtsi
View file

@ -78,10 +78,16 @@
qcom,vdd-io-voltage-level = <1808000 2960000>;
qcom,vdd-io-current-level = <200 22000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
qcom,clk-rates = <400000 20000000 25000000
50000000 100000000 200000000>;
qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
cd-gpios = <&tlmm 95 0x1>;
status = "ok";
};

74
arch/arm/boot/dts/qcom/msmcobalt-pinctrl.dtsi
View file

@ -1350,5 +1350,79 @@
};
};
};
sdc2_clk_on: sdc2_clk_on {
config {
pins = "sdc2_clk";
bias-disable; /* NO pull */
drive-strength = <16>; /* 16 MA */
};
};
sdc2_clk_off: sdc2_clk_off {
config {
pins = "sdc2_clk";
bias-disable; /* NO pull */
drive-strength = <2>; /* 2 MA */
};
};
sdc2_cmd_on: sdc2_cmd_on {
config {
pins = "sdc2_cmd";
bias-pull-up; /* pull up */
drive-strength = <10>; /* 10 MA */
};
};
sdc2_cmd_off: sdc2_cmd_off {
config {
pins = "sdc2_cmd";
bias-pull-up; /* pull up */
drive-strength = <2>; /* 2 MA */
};
};
sdc2_data_on: sdc2_data_on {
config {
pins = "sdc2_data";
bias-pull-up; /* pull up */
drive-strength = <10>; /* 10 MA */
};
};
sdc2_data_off: sdc2_data_off {
config {
pins = "sdc2_data";
bias-pull-up; /* pull up */
drive-strength = <2>; /* 2 MA */
};
};
sdc2_cd_on: sdc2_cd_on {
mux {
pins = "gpio95";
function = "gpio";
};
config {
pins = "gpio95";
bias-pull-up; /* pull up */
drive-strength = <2>; /* 2 MA */
};
};
sdc2_cd_off: sdc2_cd_off {
mux {
pins = "gpio95";
function = "gpio";
};
config {
pins = "gpio95";
bias-pull-up; /* pull up */
drive-strength = <2>; /* 2 MA */
};
};
};
};

6
arch/arm/boot/dts/qcom/msmcobalt-rumi.dtsi
View file

@ -99,10 +99,16 @@
qcom,vdd-io-voltage-level = <1808000 2960000>;
qcom,vdd-io-current-level = <200 22000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
qcom,clk-rates = <400000 20000000 25000000
50000000 100000000 200000000>;
qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
cd-gpios = <&tlmm 95 0x1>;
status = "ok";
};

6
arch/arm/boot/dts/qcom/msmcobalt-sim.dtsi
View file

@ -54,10 +54,16 @@
qcom,vdd-io-voltage-level = <1808000 2960000>;
qcom,vdd-io-current-level = <200 22000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
qcom,clk-rates = <400000 20000000 25000000
50000000 100000000 200000000>;
qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
cd-gpios = <&tlmm 95 0x1>;
status = "ok";
};