From ef319c6e095676e0247fd24ef8ff7f085c19744f Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Thu, 20 Oct 2011 13:36:59 +0300 Subject: [PATCH 1/5] OMAPDSS: HDMI: fix returned HDMI pixel clock hdmi_get_pixel_clock() returns the pixel clock in Hz, but the pck is stored as kHz. This means the return value has to be multiplied by 1000, not by 10000 as the code did. Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/hdmi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c index 3262f0f1fa35..c56378c555b0 100644 --- a/drivers/video/omap2/dss/hdmi.c +++ b/drivers/video/omap2/dss/hdmi.c @@ -269,7 +269,7 @@ static void update_hdmi_timings(struct hdmi_config *cfg, unsigned long hdmi_get_pixel_clock(void) { /* HDMI Pixel Clock in Mhz */ - return hdmi.ip_data.cfg.timings.timings.pixel_clock * 10000; + return hdmi.ip_data.cfg.timings.timings.pixel_clock * 1000; } static void hdmi_compute_pll(struct omap_dss_device *dssdev, int phy, From 1c6bc899723ca8c0d58044c3661f13ac2369e55f Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Tue, 8 Nov 2011 09:54:50 +0200 Subject: [PATCH 2/5] OMAPFB: fix compilation warnings due to missing include Fix warnings similar to this by including module.h: drivers/video/omap/dispc.c:276:1: warning: data definition has no type or storage class drivers/video/omap/dispc.c:276:1: warning: type defaults to 'int' in declaration of 'EXPORT_SYMBOL' Signed-off-by: Tomi Valkeinen --- drivers/video/omap/dispc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c index 0ccd7adf47bb..6f61e781f15a 100644 --- a/drivers/video/omap/dispc.c +++ b/drivers/video/omap/dispc.c @@ -19,6 +19,7 @@ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include +#include #include #include #include From f95cb5ebd834117ff4829a460656095a0ae63921 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Tue, 1 Nov 2011 10:50:45 +0200 Subject: [PATCH 3/5] OMAPDSS: DISPC: skip scaling calculations when not scaling Current code calculates scaling factors for video overlays even when the overlays are not scaled. Change the code to skip calculations when not scaling. This optimizes the code a bit, but also fixes a problem when configuring an overlay for a disabled display: if the display is disabled we don't necessarily know the pixel clock used when the display is enabled, and in some cases (like HDMI) the pixel clock is set to zero until a proper video mode is set later. A wrong pixel clock will mess up the scaling calculations, causing an error like: omapdss DISPC error: failed to set up scaling, required fclk rate = 0 Hz, current fclk rate = 170666666 Hz A proper fix would be to check later whether the clocks are enough for the scaling, at the point when the overlay or display is actually enabled, but this patch removes the problem for now. Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dispc.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index 3532782551cb..5c81533eacaa 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c @@ -1720,12 +1720,11 @@ static int dispc_ovl_calc_scaling(enum omap_plane plane, const int maxdownscale = dss_feat_get_param_max(FEAT_PARAM_DOWNSCALE); unsigned long fclk = 0; - if ((ovl->caps & OMAP_DSS_OVL_CAP_SCALE) == 0) { - if (width != out_width || height != out_height) - return -EINVAL; - else - return 0; - } + if (width == out_width && height == out_height) + return 0; + + if ((ovl->caps & OMAP_DSS_OVL_CAP_SCALE) == 0) + return -EINVAL; if (out_width < width / maxdownscale || out_width > width * 8) From 74a0efdef1df7f576116811234ebedd8a1255ebc Mon Sep 17 00:00:00 2001 From: "Manjunathappa, Prakash" Date: Tue, 15 Nov 2011 17:32:23 +0530 Subject: [PATCH 4/5] video:da8xx-fb: Disable and reset sequence on version2 of LCDC Patch follows the disable and software reset sequence specified in version2 to LCDC functional specification. Without this flicker is observed on re-enabling the LCDC. Signed-off-by: Manjunathappa, Prakash Signed-off-by: Florian Tobias Schandinat --- drivers/video/da8xx-fb.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c index 55f91d9ab00b..29577bf1f559 100644 --- a/drivers/video/da8xx-fb.c +++ b/drivers/video/da8xx-fb.c @@ -116,6 +116,7 @@ /* Clock registers available only on Version 2 */ #define LCD_CLK_ENABLE_REG 0x6c #define LCD_CLK_RESET_REG 0x70 +#define LCD_CLK_MAIN_RESET BIT(3) #define LCD_NUM_BUFFERS 2 @@ -244,6 +245,10 @@ static inline void lcd_enable_raster(void) { u32 reg; + /* Bring LCDC out of reset */ + if (lcd_revision == LCD_VERSION_2) + lcdc_write(0, LCD_CLK_RESET_REG); + reg = lcdc_read(LCD_RASTER_CTRL_REG); if (!(reg & LCD_RASTER_ENABLE)) lcdc_write(reg | LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG); @@ -257,6 +262,10 @@ static inline void lcd_disable_raster(void) reg = lcdc_read(LCD_RASTER_CTRL_REG); if (reg & LCD_RASTER_ENABLE) lcdc_write(reg & ~LCD_RASTER_ENABLE, LCD_RASTER_CTRL_REG); + + if (lcd_revision == LCD_VERSION_2) + /* Write 1 to reset LCDC */ + lcdc_write(LCD_CLK_MAIN_RESET, LCD_CLK_RESET_REG); } static void lcd_blit(int load_mode, struct da8xx_fb_par *par) @@ -584,8 +593,12 @@ static void lcd_reset(struct da8xx_fb_par *par) lcdc_write(0, LCD_DMA_CTRL_REG); lcdc_write(0, LCD_RASTER_CTRL_REG); - if (lcd_revision == LCD_VERSION_2) + if (lcd_revision == LCD_VERSION_2) { lcdc_write(0, LCD_INT_ENABLE_SET_REG); + /* Write 1 to reset */ + lcdc_write(LCD_CLK_MAIN_RESET, LCD_CLK_RESET_REG); + lcdc_write(0, LCD_CLK_RESET_REG); + } } static void lcd_calc_clk_divider(struct da8xx_fb_par *par) From a32839696a8eef813a1aff604fbad9a32dff6c95 Mon Sep 17 00:00:00 2001 From: Daniel Drake Date: Mon, 21 Nov 2011 15:05:56 +0000 Subject: [PATCH 5/5] viafb: correct sync polarity for OLPC DCON While the OLPC display appears to be able to handle either positive or negative sync, the Display Controller only recognises positive sync. This brings viafb (for XO-1.5) in line with lxfb (for XO-1) and fixes a recent regression where the XO-1.5 DCON could no longer be frozen. Thanks to Florian Tobias Schandinat for helping identify the fix. Test case: from a vt, echo 1 > /sys/devices/platform/dcon/freeze should cause the current screen contents to freeze, rather than garbage being displayed. Signed-off-by: Daniel Drake Signed-off-by: Florian Tobias Schandinat Cc: stable@kernel.org --- drivers/video/via/share.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/video/via/share.h b/drivers/video/via/share.h index 69d882cbe709..c01c1c162726 100644 --- a/drivers/video/via/share.h +++ b/drivers/video/via/share.h @@ -559,8 +559,8 @@ #define M1200X720_R60_VSP POSITIVE /* 1200x900@60 Sync Polarity (DCON) */ -#define M1200X900_R60_HSP NEGATIVE -#define M1200X900_R60_VSP NEGATIVE +#define M1200X900_R60_HSP POSITIVE +#define M1200X900_R60_VSP POSITIVE /* 1280x600@60 Sync Polarity (GTF Mode) */ #define M1280x600_R60_HSP NEGATIVE