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iommu/arm-smmu: Use correct mask when printing SID during fault

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As per the spec, FRSYNRA contains the SID in the lower 16 bits.
Currently we're masking off all but the lower 8 bits, so we could be
losing bits when we print SIDs.  Fix this by using a 16 bit mask.

Change-Id: I4a16c169a52d31b43b2f850a5558eecb64b93902
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
This commit is contained in:
Mitchel Humpherys 2015-11-02 14:27:44 -08:00 • committed by David Keitel
parent 551c3178fc
commit 404edd8bd3
1 changed files with 1 additions and 1 deletions
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2
drivers/iommu/arm-smmu.c
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@ -1258,7 +1258,7 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev)
"soft iova-to-phys=%pa\n", &phys_soft);
dev_err(smmu->dev,
"hard iova-to-phys (ATOS)=%pa\n", &phys_atos);
dev_err(smmu->dev, "SID=0x%x\n", frsynra & 0x1FF);
dev_err(smmu->dev, "SID=0x%x\n", frsynra & 0xffff);
}
ret = IRQ_NONE;
resume = RESUME_TERMINATE;