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ARM: mcpm: use -st dsb option prior to sev instructions

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In a similar manner to our spinlock implementation, mcpm uses sev to
wake up cores waiting on a lock when the lock is unlocked. In order to
ensure that the final write unlocking the lock is visible, a dsb
instruction is executed immediately prior to the sev.

This patch changes these dsbs to use the -st option, since we only
require that the store unlocking the lock is made visible.

Acked-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Dave Martin <dave.martin@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
This commit is contained in:
Will Deacon 2013-05-14 10:08:07 +01:00
parent e3ab547f57
commit 40a5c0b415
2 changed files with 3 additions and 3 deletions
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2
arch/arm/common/mcpm_head.S
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@ -151,7 +151,7 @@ mcpm_setup_leave:
mov r0, #INBOUND_NOT_COMING_UP mov r0, #INBOUND_NOT_COMING_UP
strb r0, [r8, #MCPM_SYNC_CLUSTER_INBOUND] strb r0, [r8, #MCPM_SYNC_CLUSTER_INBOUND]
dsb dsb st
sev sev
mov r0, r11 mov r0, r11

4
arch/arm/common/vlock.S
View file

@ -42,7 +42,7 @@
dmb dmb
mov \rscratch, #0 mov \rscratch, #0
strb \rscratch, [\rbase, \rcpu] strb \rscratch, [\rbase, \rcpu]
dsb dsb st
sev sev
.endm .endm
@ -102,7 +102,7 @@ ENTRY(vlock_unlock)
dmb dmb
mov r1, #VLOCK_OWNER_NONE mov r1, #VLOCK_OWNER_NONE
strb r1, [r0, #VLOCK_OWNER_OFFSET] strb r1, [r0, #VLOCK_OWNER_OFFSET]
dsb dsb st
sev sev
bx lr bx lr
ENDPROC(vlock_unlock) ENDPROC(vlock_unlock)