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iommu/arm-smmu: Print SID info on context faults

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When a context fault occurs, it can be useful for debugging to know the
stream ID of the faulting transaction.  This information is available in
the CBFRSYNRAn register.  Read and print the SID value when a context
fault occurs.

Change-Id: If8b47b801bc72a053b1198767de58799606ca626
Signed-off-by: Shalaj Jain <shalajj@codeaurora.org>
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
This commit is contained in:
Shalaj Jain 2015-03-03 13:34:59 -08:00 • committed by David Keitel
parent 8a1715ff0c
commit 41ca9bd4a3
1 changed files with 6 additions and 0 deletions
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6
drivers/iommu/arm-smmu.c
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@ -213,6 +213,7 @@
#define ARM_SMMU_CB_ATS1PR_LO 0x800 #define ARM_SMMU_CB_ATS1PR_LO 0x800
#define ARM_SMMU_CB_ATS1PR_HI 0x804 #define ARM_SMMU_CB_ATS1PR_HI 0x804
#define ARM_SMMU_CB_ATSR 0x8f0 #define ARM_SMMU_CB_ATSR 0x8f0
#define ARM_SMMU_GR1_CBFRSYNRA(n) (0x400 + ((n) << 2))
#define SCTLR_S1_ASIDPNE (1 << 12) #define SCTLR_S1_ASIDPNE (1 << 12)
#define SCTLR_CFCFG (1 << 7) #define SCTLR_CFCFG (1 << 7)
@ -932,7 +933,9 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev)
void __iomem *cb_base; void __iomem *cb_base;
bool ctx_hang_errata; bool ctx_hang_errata;
bool fatal_asf; bool fatal_asf;
void __iomem *gr1_base;
phys_addr_t phys_soft; phys_addr_t phys_soft;
u32 frsynra;
mutex_lock(&smmu_domain->init_mutex); mutex_lock(&smmu_domain->init_mutex);
smmu = smmu_domain->smmu; smmu = smmu_domain->smmu;
@ -945,6 +948,7 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev)
arm_smmu_enable_clocks(smmu); arm_smmu_enable_clocks(smmu);
gr1_base = ARM_SMMU_GR1(smmu);
cb_base = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx); cb_base = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx);
fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR); fsr = readl_relaxed(cb_base + ARM_SMMU_CB_FSR);
@ -970,6 +974,7 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev)
iova = far; iova = far;
phys_soft = arm_smmu_iova_to_phys(domain, iova); phys_soft = arm_smmu_iova_to_phys(domain, iova);
frsynra = readl_relaxed(gr1_base + ARM_SMMU_GR1_CBFRSYNRA(cfg->cbndx));
if (!report_iommu_fault(domain, smmu->dev, iova, flags)) { if (!report_iommu_fault(domain, smmu->dev, iova, flags)) {
dev_dbg(smmu->dev, dev_dbg(smmu->dev,
"Context fault handled by client: iova=0x%08lx, fsr=0x%x, fsynr=0x%x, cb=%d\n", "Context fault handled by client: iova=0x%08lx, fsr=0x%x, fsynr=0x%x, cb=%d\n",
@ -995,6 +1000,7 @@ static irqreturn_t arm_smmu_context_fault(int irq, void *dev)
(fsr & 0x80000000) ? "MULTI " : ""); (fsr & 0x80000000) ? "MULTI " : "");
dev_err(smmu->dev, dev_err(smmu->dev,
"soft iova-to-phys=%pa\n", &phys_soft); "soft iova-to-phys=%pa\n", &phys_soft);
dev_err(smmu->dev, "SID=0x%x\n", frsynra & 0x1FF);
ret = IRQ_NONE; ret = IRQ_NONE;
resume = RESUME_TERMINATE; resume = RESUME_TERMINATE;
} }