From 42fd18319304c110a0d526122cffc170d1f18e68 Mon Sep 17 00:00:00 2001
From: Rohit Vaswani <rvaswani@codeaurora.org>
Date: Tue, 23 Sep 2014 13:23:18 -0700
Subject: [PATCH] edac: arm64: Check for ECC errors on panic

Check for ecc errors on panic on all processors

Change-Id: I2a68644afb2730a69aca35abb1f10899a11514dd
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
[stepanm@codeaurora.org: update argument to arm64_check_cache_ecc()]
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
[satyap: trivial merge conflict resolution]
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
---
 arch/arm64/kernel/smp.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index bd7e96552c6b..6afe10641a93 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -53,6 +53,7 @@
 #include <asm/tlbflush.h>
 #include <asm/ptrace.h>
 #include <asm/virt.h>
+#include <asm/edac.h>
 
 #define CREATE_TRACE_POINTS
 #include <trace/events/ipi.h>
@@ -719,6 +720,7 @@ static void ipi_cpu_stop(unsigned int cpu, struct pt_regs *regs)
 		pr_crit("CPU%u: stopping\n", cpu);
 		show_regs(regs);
 		dump_stack();
+		arm64_check_cache_ecc(NULL);
 		raw_spin_unlock(&stop_lock);
 	}