evie/android_kernel_oneplus_msm8998
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

[media] drx-j: CodingStyle fixes

Browse source 
Do the automatic CodingStyle fixes found at Lindent.

No functional changes.

Acked-by: Devin Heitmueller <dheitmueller@kernellabs.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This commit is contained in:
Mauro Carvalho Chehab 2012-03-20 00:00:42 -03:00 • committed by Mauro Carvalho Chehab
parent ca3355a947
commit 443f18d0d5
19 changed files with 25601 additions and 20641 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
drivers/media/dvb-frontends/drx39xyj/bsp_host.h
View file

@ -50,7 +50,6 @@ extern "C" {
TYPEDEFS
-------------------------------------------------------------------------*/
/*-------------------------------------------------------------------------
DEFINES
-------------------------------------------------------------------------*/
@ -76,5 +75,4 @@ THE END
#ifdef __cplusplus
}
#endif
#endif /* __DRXBSP_HOST_H__ */

16
drivers/media/dvb-frontends/drx39xyj/bsp_i2c.h
View file

@ -82,9 +82,12 @@ typedef u16_t I2CdevId_t;
*
*/
struct _I2CDeviceAddr_t {
I2Caddr_t i2cAddr; /**< The I2C address of the device. */
I2CdevId_t i2cDevId; /**< The device identifier. */
void *userData; /**< User data pointer */
I2Caddr_t i2cAddr;
/**< The I2C address of the device. */
I2CdevId_t i2cDevId;
/**< The device identifier. */
void *userData;
/**< User data pointer */
};
/**
@ -133,7 +136,6 @@ STRUCTS
Exported FUNCTIONS
------------------------------------------------------------------------------*/
/**
* \fn DRXBSP_I2C_Init()
* \brief Initialize I2C communication module.
@ -143,7 +145,6 @@ Exported FUNCTIONS
*/
DRXStatus_t DRXBSP_I2C_Init(void);
/**
* \fn DRXBSP_I2C_Term()
* \brief Terminate I2C communication module.
@ -187,9 +188,7 @@ DRXStatus_t DRXBSP_I2C_WriteRead( pI2CDeviceAddr_t wDevAddr,
u16_t wCount,
pu8_t wData,
pI2CDeviceAddr_t rDevAddr,
u16_t rCount,
pu8_t rData);
u16_t rCount, pu8_t rData);
/**
* \fn DRXBSP_I2C_ErrorText()
@ -206,7 +205,6 @@ char* DRXBSP_I2C_ErrorText( void );
*/
extern int DRX_I2C_Error_g;
/*------------------------------------------------------------------------------
THE END
------------------------------------------------------------------------------*/

34
drivers/media/dvb-frontends/drx39xyj/bsp_tuner.h
View file

@ -51,7 +51,6 @@ extern "C" {
DEFINES
------------------------------------------------------------------------------*/
/* Sub-mode bits should be adjacent and incremental */
#define TUNER_MODE_SUB0 0x0001 /* for sub-mode (e.g. RF-AGC setting) */
#define TUNER_MODE_SUB1 0x0002 /* for sub-mode (e.g. RF-AGC setting) */
@ -86,15 +85,12 @@ typedef pu32_t pTUNERMode_t;
typedef char *TUNERSubMode_t; /* description of submode */
typedef TUNERSubMode_t *pTUNERSubMode_t;
typedef enum {
TUNER_LOCKED,
TUNER_NOT_LOCKED
} TUNERLockStatus_t, *pTUNERLockStatus_t;
typedef struct {
char *name; /* Tuner brand & type name */
@ -117,7 +113,6 @@ typedef struct {
} TUNERCommonAttr_t, *pTUNERCommonAttr_t;
/*
* Generic functions for DRX devices.
*/
@ -128,26 +123,29 @@ typedef DRXStatus_t (*TUNERCloseFunc_t)( pTUNERInstance_t tuner );
typedef DRXStatus_t(*TUNERSetFrequencyFunc_t) (pTUNERInstance_t tuner,
TUNERMode_t mode,
DRXFrequency_t frequency );
DRXFrequency_t
frequency);
typedef DRXStatus_t(*TUNERGetFrequencyFunc_t) (pTUNERInstance_t tuner,
TUNERMode_t mode,
pDRXFrequency_t RFfrequency,
pDRXFrequency_t IFfrequency );
pDRXFrequency_t
RFfrequency,
pDRXFrequency_t
IFfrequency);
typedef DRXStatus_t(*TUNERLockStatusFunc_t) (pTUNERInstance_t tuner,
pTUNERLockStatus_t lockStat );
pTUNERLockStatus_t
lockStat);
typedef DRXStatus_t(*TUNERi2cWriteReadFunc_t) (pTUNERInstance_t tuner,
pI2CDeviceAddr_t wDevAddr,
u16_t wCount,
pI2CDeviceAddr_t
wDevAddr, u16_t wCount,
pu8_t wData,
pI2CDeviceAddr_t rDevAddr,
u16_t rCount,
pI2CDeviceAddr_t
rDevAddr, u16_t rCount,
pu8_t rData);
typedef struct
{
typedef struct {
TUNEROpenFunc_t openFunc;
TUNERCloseFunc_t closeFunc;
TUNERSetFrequencyFunc_t setFrequencyFunc;
@ -166,7 +164,6 @@ typedef struct TUNERInstance_s {
} TUNERInstance_t;
/*------------------------------------------------------------------------------
ENUM
------------------------------------------------------------------------------*/
@ -175,7 +172,6 @@ ENUM
STRUCTS
------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------
Exported FUNCTIONS
------------------------------------------------------------------------------*/
@ -201,8 +197,7 @@ DRXStatus_t DRXBSP_TUNER_DefaultI2CWriteRead( pTUNERInstance_t tuner,
u16_t wCount,
pu8_t wData,
pI2CDeviceAddr_t rDevAddr,
u16_t rCount,
pu8_t rData);
u16_t rCount, pu8_t rData);
/*------------------------------------------------------------------------------
THE END
@ -211,5 +206,4 @@ THE END
}
#endif
#endif /* __DRXBSP_TUNER_H__ */
/* End of file */

8
drivers/media/dvb-frontends/drx39xyj/bsp_types.h
View file

@ -140,7 +140,6 @@ typedef u64_t *pu64_t;
*/
typedef s64_t *ps64_t;
/**
* \typedef s32_t DRXFrequency_t
* \brief type definition of frequency
@ -205,12 +204,13 @@ typedef enum {
DRX_STS_READY = 3, /**< device/service is ready */
DRX_STS_BUSY = 2, /**< device/service is busy */
DRX_STS_OK = 1, /**< everything is OK */
DRX_STS_INVALID_ARG = -1, /**< invalid arguments */
DRX_STS_INVALID_ARG = -1,
/**< invalid arguments */
DRX_STS_ERROR = -2, /**< general error */
DRX_STS_FUNC_NOT_AVAILABLE = -3 /**< unavailable functionality */
DRX_STS_FUNC_NOT_AVAILABLE = -3
/**< unavailable functionality */
} DRXStatus_t, *pDRXStatus_t;
/*-------------------------------------------------------------------------
STRUCTS
-------------------------------------------------------------------------*/

42
drivers/media/dvb-frontends/drx39xyj/drx39xxj.c
View file

@ -87,16 +87,12 @@ static int drx39xxj_read_status(struct dvb_frontend* fe, fe_status_t* status)
case DRX_LOCK_STATE_8:
case DRX_LOCK_STATE_9:
*status = FE_HAS_SIGNAL
| FE_HAS_CARRIER
| FE_HAS_VITERBI
| FE_HAS_SYNC;
| FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC;
break;
case DRX_LOCKED:
*status = FE_HAS_SIGNAL
| FE_HAS_CARRIER
| FE_HAS_VITERBI
| FE_HAS_SYNC
| FE_HAS_LOCK;
| FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
break;
default:
printk("Lock state unknown %d\n", lock_status);
@ -123,7 +119,8 @@ static int drx39xxj_read_ber(struct dvb_frontend* fe, u32* ber)
return 0;
}
static int drx39xxj_read_signal_strength(struct dvb_frontend* fe, u16* strength)
static int drx39xxj_read_signal_strength(struct dvb_frontend *fe,
u16 * strength)
{
struct drx39xxj_state *state = fe->demodulator_priv;
DRXDemodInstance_t *demod = state->demod;
@ -178,12 +175,14 @@ static int drx39xxj_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
return 0;
}
static int drx39xxj_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
static int drx39xxj_get_frontend(struct dvb_frontend *fe,
struct dvb_frontend_parameters *p)
{
return 0;
}
static int drx39xxj_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
static int drx39xxj_set_frontend(struct dvb_frontend *fe,
struct dvb_frontend_parameters *p)
{
#ifdef DJH_DEBUG
int i;
@ -246,7 +245,6 @@ static int drx39xxj_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_pa
printk("Failed to set channel!\n");
return -EINVAL;
}
// Just for giggles, let's shut off the LNA again....
uioData.uio = DRX_UIO1;
uioData.value = FALSE;
@ -255,7 +253,6 @@ static int drx39xxj_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_pa
printk("Failed to disable LNA!\n");
return 0;
}
#ifdef DJH_DEBUG
for (i = 0; i < 2000; i++) {
fe_status_t status;
@ -269,7 +266,6 @@ static int drx39xxj_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_pa
return 0;
}
static int drx39xxj_sleep(struct dvb_frontend *fe)
{
/* power-down the demodulator */
@ -308,7 +304,6 @@ static int drx39xxj_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
return 0;
}
static int drx39xxj_init(struct dvb_frontend *fe)
{
/* Bring the demod out of sleep */
@ -346,19 +341,24 @@ struct dvb_frontend *drx39xxj_attach(struct i2c_adapter *i2c)
/* allocate memory for the internal state */
state = kmalloc(sizeof(struct drx39xxj_state), GFP_KERNEL);
if (state == NULL) goto error;
if (state == NULL)
goto error;
demod = kmalloc(sizeof(DRXDemodInstance_t), GFP_KERNEL);
if (demod == NULL) goto error;
if (demod == NULL)
goto error;
demodAddr = kmalloc(sizeof(I2CDeviceAddr_t), GFP_KERNEL);
if (demodAddr == NULL) goto error;
if (demodAddr == NULL)
goto error;
demodCommAttr = kmalloc(sizeof(DRXCommonAttr_t), GFP_KERNEL);
if (demodCommAttr == NULL) goto error;
if (demodCommAttr == NULL)
goto error;
demodExtAttr = kmalloc(sizeof(DRXJData_t), GFP_KERNEL);
if (demodExtAttr == NULL) goto error;
if (demodExtAttr == NULL)
goto error;
/* setup the state */
state->i2c = i2c;
@ -380,7 +380,8 @@ struct dvb_frontend *drx39xxj_attach(struct i2c_adapter *i2c)
demod->myExtAttr = demodExtAttr;
memcpy(demod->myExtAttr, &DRXJData_g, sizeof(DRXJData_t));
((DRXJData_t *) demod->myExtAttr)->uioSmaTxMode = DRX_UIO_MODE_READWRITE;
((DRXJData_t *) demod->myExtAttr)->uioSmaTxMode =
DRX_UIO_MODE_READWRITE;
demod->myTuner = NULL;
@ -432,8 +433,7 @@ static struct dvb_frontend_ops drx39xxj_ops = {
.frequency_stepsize = 62500,
.frequency_min = 51000000,
.frequency_max = 858000000,
.caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
},
.caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB},
.init = drx39xxj_init,
.i2c_gate_ctrl = drx39xxj_i2c_gate_ctrl,

3
drivers/media/dvb-frontends/drx39xyj/drx39xxj_dummy.c
View file

@ -64,8 +64,7 @@ DRXStatus_t DRXBSP_I2C_WriteRead( pI2CDeviceAddr_t wDevAddr,
u16_t wCount,
pu8_t wData,
pI2CDeviceAddr_t rDevAddr,
u16_t rCount,
pu8_t rData )
u16_t rCount, pu8_t rData)
{
struct drx39xxj_state *state;
struct i2c_msg msg[2];

186
drivers/media/dvb-frontends/drx39xyj/drx_dap_fasi.c
View file

@ -55,72 +55,61 @@
/*============================================================================*/
/* Function prototypes */
static DRXStatus_t DRXDAP_FASI_WriteBlock (
pI2CDeviceAddr_t devAddr, /* address of I2C device */
static DRXStatus_t DRXDAP_FASI_WriteBlock(pI2CDeviceAddr_t devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register/memory */
u16_t datasize, /* size of data */
pu8_t data, /* data to send */
DRXflags_t flags); /* special device flags */
static DRXStatus_t DRXDAP_FASI_ReadBlock (
pI2CDeviceAddr_t devAddr, /* address of I2C device */
static DRXStatus_t DRXDAP_FASI_ReadBlock(pI2CDeviceAddr_t devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register/memory */
u16_t datasize, /* size of data */
pu8_t data, /* data to send */
DRXflags_t flags); /* special device flags */
static DRXStatus_t DRXDAP_FASI_WriteReg8 (
pI2CDeviceAddr_t devAddr, /* address of I2C device */
static DRXStatus_t DRXDAP_FASI_WriteReg8(pI2CDeviceAddr_t devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register */
u8_t data, /* data to write */
DRXflags_t flags); /* special device flags */
static DRXStatus_t DRXDAP_FASI_ReadReg8 (
pI2CDeviceAddr_t devAddr, /* address of I2C device */
static DRXStatus_t DRXDAP_FASI_ReadReg8(pI2CDeviceAddr_t devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register */
pu8_t data, /* buffer to receive data */
DRXflags_t flags); /* special device flags */
static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg8 (
pI2CDeviceAddr_t devAddr, /* address of I2C device */
static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg8(pI2CDeviceAddr_t devAddr, /* address of I2C device */
DRXaddr_t waddr, /* address of register */
DRXaddr_t raddr, /* address to read back from */
u8_t datain, /* data to send */
pu8_t dataout); /* data to receive back */
static DRXStatus_t DRXDAP_FASI_WriteReg16 (
pI2CDeviceAddr_t devAddr, /* address of I2C device */
static DRXStatus_t DRXDAP_FASI_WriteReg16(pI2CDeviceAddr_t devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register */
u16_t data, /* data to write */
DRXflags_t flags); /* special device flags */
static DRXStatus_t DRXDAP_FASI_ReadReg16 (
pI2CDeviceAddr_t devAddr, /* address of I2C device */
static DRXStatus_t DRXDAP_FASI_ReadReg16(pI2CDeviceAddr_t devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register */
pu16_t data, /* buffer to receive data */
DRXflags_t flags); /* special device flags */
static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg16 (
pI2CDeviceAddr_t devAddr, /* address of I2C device */
static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg16(pI2CDeviceAddr_t devAddr, /* address of I2C device */
DRXaddr_t waddr, /* address of register */
DRXaddr_t raddr, /* address to read back from */
u16_t datain, /* data to send */
pu16_t dataout); /* data to receive back */
static DRXStatus_t DRXDAP_FASI_WriteReg32 (
pI2CDeviceAddr_t devAddr, /* address of I2C device */
static DRXStatus_t DRXDAP_FASI_WriteReg32(pI2CDeviceAddr_t devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register */
u32_t data, /* data to write */
DRXflags_t flags); /* special device flags */
static DRXStatus_t DRXDAP_FASI_ReadReg32 (
pI2CDeviceAddr_t devAddr, /* address of I2C device */
static DRXStatus_t DRXDAP_FASI_ReadReg32(pI2CDeviceAddr_t devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register */
pu32_t data, /* buffer to receive data */
DRXflags_t flags); /* special device flags */
static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg32 (
pI2CDeviceAddr_t devAddr, /* address of I2C device */
static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg32(pI2CDeviceAddr_t devAddr, /* address of I2C device */
DRXaddr_t waddr, /* address of register */
DRXaddr_t raddr, /* address to read back from */
u32_t datain, /* data to send */
@ -130,8 +119,7 @@ static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg32 (
char drxDapFASIModuleName[] = "FASI Data Access Protocol";
char drxDapFASIVersionText[] = "";
DRXVersion_t drxDapFASIVersion =
{
DRXVersion_t drxDapFASIVersion = {
DRX_MODULE_DAP, /**< type identifier of the module */
drxDapFASIModuleName, /**< name or description of module */
@ -142,8 +130,7 @@ DRXVersion_t drxDapFASIVersion =
};
/* The structure containing the protocol interface */
DRXAccessFunc_t drxDapFASIFunct_g =
{
DRXAccessFunc_t drxDapFASIFunct_g = {
&drxDapFASIVersion,
DRXDAP_FASI_WriteBlock, /* Supported */
DRXDAP_FASI_ReadBlock, /* Supported */
@ -162,41 +149,37 @@ DRXAccessFunc_t drxDapFASIFunct_g =
/* Functions not supported by protocol*/
static DRXStatus_t DRXDAP_FASI_WriteReg8 (
pI2CDeviceAddr_t devAddr, /* address of I2C device */
static DRXStatus_t DRXDAP_FASI_WriteReg8(pI2CDeviceAddr_t devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register */
u8_t data, /* data to write */
DRXflags_t flags) /* special device flags */
{
DRXflags_t flags)
{ /* special device flags */
return DRX_STS_ERROR;
}
static DRXStatus_t DRXDAP_FASI_ReadReg8 (
pI2CDeviceAddr_t devAddr, /* address of I2C device */
static DRXStatus_t DRXDAP_FASI_ReadReg8(pI2CDeviceAddr_t devAddr, /* address of I2C device */
DRXaddr_t addr, /* address of register */
pu8_t data, /* buffer to receive data */
DRXflags_t flags) /* special device flags */
{
DRXflags_t flags)
{ /* special device flags */
return DRX_STS_ERROR;
}
static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg8 (
pI2CDeviceAddr_t devAddr, /* address of I2C device */
static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg8(pI2CDeviceAddr_t devAddr, /* address of I2C device */
DRXaddr_t waddr, /* address of register */
DRXaddr_t raddr, /* address to read back from */
u8_t datain, /* data to send */
pu8_t dataout) /* data to receive back */
{
pu8_t dataout)
{ /* data to receive back */
return DRX_STS_ERROR;
}
static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg32 (
pI2CDeviceAddr_t devAddr, /* address of I2C device */
static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg32(pI2CDeviceAddr_t devAddr, /* address of I2C device */
DRXaddr_t waddr, /* address of register */
DRXaddr_t raddr, /* address to read back from */
u32_t datain, /* data to send */
pu32_t dataout) /* data to receive back */
{
pu32_t dataout)
{ /* data to receive back */
return DRX_STS_ERROR;
}
@ -230,8 +213,7 @@ static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg32 (
static DRXStatus_t DRXDAP_FASI_ReadBlock(pI2CDeviceAddr_t devAddr,
DRXaddr_t addr,
u16_t datasize,
pu8_t data,
DRXflags_t flags )
pu8_t data, DRXflags_t flags)
{
u8_t buf[4];
u16_t bufx;
@ -239,8 +221,7 @@ static DRXStatus_t DRXDAP_FASI_ReadBlock ( pI2CDeviceAddr_t devAddr,
u16_t overheadSize = 0;
/* Check parameters ******************************************************* */
if ( devAddr == NULL )
{
if (devAddr == NULL) {
return DRX_STS_INVALID_ARG;
}
@ -251,9 +232,7 @@ static DRXStatus_t DRXDAP_FASI_ReadBlock ( pI2CDeviceAddr_t devAddr,
((!(DRXDAPFASI_LONG_ADDR_ALLOWED)) &&
DRXDAP_FASI_LONG_FORMAT(addr)) ||
(overheadSize > (DRXDAP_MAX_WCHUNKSIZE)) ||
((datasize!=0) && (data==NULL)) ||
((datasize & 1)==1 ) )
{
((datasize != 0) && (data == NULL)) || ((datasize & 1) == 1)) {
return DRX_STS_INVALID_ARG;
}
@ -276,8 +255,7 @@ static DRXStatus_t DRXDAP_FASI_ReadBlock ( pI2CDeviceAddr_t devAddr,
#if ( ( DRXDAPFASI_LONG_ADDR_ALLOWED==1 ) && \
( DRXDAPFASI_SHORT_ADDR_ALLOWED==1 ) )
/* short format address preferred but long format otherwise */
if ( DRXDAP_FASI_LONG_FORMAT(addr) )
{
if (DRXDAP_FASI_LONG_FORMAT(addr)) {
#endif
#if ( DRXDAPFASI_LONG_ADDR_ALLOWED==1 )
buf[bufx++] = (u8_t) (((addr << 1) & 0xFF) | 0x01);
@ -291,29 +269,28 @@ static DRXStatus_t DRXDAP_FASI_ReadBlock ( pI2CDeviceAddr_t devAddr,
#endif
#if ( DRXDAPFASI_SHORT_ADDR_ALLOWED==1 )
buf[bufx++] = (u8_t) ((addr << 1) & 0xFF);
buf[bufx++] = (u8_t) ( ((addr >> 16) & 0x0F) | ((addr >> 18) & 0xF0) );
buf[bufx++] =
(u8_t) (((addr >> 16) & 0x0F) |
((addr >> 18) & 0xF0));
#endif
#if ( ( DRXDAPFASI_LONG_ADDR_ALLOWED==1 ) && \
( DRXDAPFASI_SHORT_ADDR_ALLOWED==1 ) )
}
#endif
#if DRXDAP_SINGLE_MASTER
/*
* In single master mode, split the read and write actions.
* No special action is needed for write chunks here.
*/
rc = DRXBSP_I2C_WriteRead(devAddr, bufx, buf, 0, 0, 0);
if (rc == DRX_STS_OK)
{
if (rc == DRX_STS_OK) {
rc = DRXBSP_I2C_WriteRead(0, 0, 0, devAddr, todo, data);
}
#else
/* In multi master mode, do everything in one RW action */
rc = DRXBSP_I2C_WriteRead (devAddr, bufx, buf, devAddr, todo, data);
rc = DRXBSP_I2C_WriteRead(devAddr, bufx, buf, devAddr, todo,
data);
#endif
data += todo;
addr += (todo >> 1);
@ -323,9 +300,6 @@ static DRXStatus_t DRXDAP_FASI_ReadBlock ( pI2CDeviceAddr_t devAddr,
return rc;
}
/******************************
*
* DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg16 (
@ -354,20 +328,17 @@ static DRXStatus_t DRXDAP_FASI_ReadBlock ( pI2CDeviceAddr_t devAddr,
static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg16(pI2CDeviceAddr_t devAddr,
DRXaddr_t waddr,
DRXaddr_t raddr,
u16_t wdata,
pu16_t rdata )
u16_t wdata, pu16_t rdata)
{
DRXStatus_t rc = DRX_STS_ERROR;
#if ( DRXDAPFASI_LONG_ADDR_ALLOWED==1 )
if (rdata == NULL)
{
if (rdata == NULL) {
return DRX_STS_INVALID_ARG;
}
rc = DRXDAP_FASI_WriteReg16(devAddr, waddr, wdata, DRXDAP_FASI_RMW);
if (rc == DRX_STS_OK)
{
if (rc == DRX_STS_OK) {
rc = DRXDAP_FASI_ReadReg16(devAddr, raddr, rdata, 0);
}
#endif
@ -375,9 +346,6 @@ static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg16 ( pI2CDeviceAddr_t devAddr,
return rc;
}
/******************************
*
* DRXStatus_t DRXDAP_FASI_ReadReg16 (
@ -398,14 +366,12 @@ static DRXStatus_t DRXDAP_FASI_ReadModifyWriteReg16 ( pI2CDeviceAddr_t devAddr,
static DRXStatus_t DRXDAP_FASI_ReadReg16(pI2CDeviceAddr_t devAddr,
DRXaddr_t addr,
pu16_t data,
DRXflags_t flags )
pu16_t data, DRXflags_t flags)
{
u8_t buf[sizeof(*data)];
DRXStatus_t rc;
if (!data)
{
if (!data) {
return DRX_STS_INVALID_ARG;
}
rc = DRXDAP_FASI_ReadBlock(devAddr, addr, sizeof(*data), buf, flags);
@ -413,9 +379,6 @@ static DRXStatus_t DRXDAP_FASI_ReadReg16 ( pI2CDeviceAddr_t devAddr,
return rc;
}
/******************************
*
* DRXStatus_t DRXDAP_FASI_ReadReg32 (
@ -436,27 +399,21 @@ static DRXStatus_t DRXDAP_FASI_ReadReg16 ( pI2CDeviceAddr_t devAddr,
static DRXStatus_t DRXDAP_FASI_ReadReg32(pI2CDeviceAddr_t devAddr,
DRXaddr_t addr,
pu32_t data,
DRXflags_t flags )
pu32_t data, DRXflags_t flags)
{
u8_t buf[sizeof(*data)];
DRXStatus_t rc;
if (!data)
{
if (!data) {
return DRX_STS_INVALID_ARG;
}
rc = DRXDAP_FASI_ReadBlock(devAddr, addr, sizeof(*data), buf, flags);
*data = (((u32_t) buf[0]) << 0) +
(((u32_t) buf[1]) << 8) +
(((u32_t) buf[2]) << 16) +
(((u32_t) buf[3]) << 24);
(((u32_t) buf[2]) << 16) + (((u32_t) buf[3]) << 24);
return rc;
}
/******************************
*
* DRXStatus_t DRXDAP_FASI_WriteBlock (
@ -482,8 +439,7 @@ static DRXStatus_t DRXDAP_FASI_ReadReg32 ( pI2CDeviceAddr_t devAddr,
static DRXStatus_t DRXDAP_FASI_WriteBlock(pI2CDeviceAddr_t devAddr,
DRXaddr_t addr,
u16_t datasize,
pu8_t data,
DRXflags_t flags )
pu8_t data, DRXflags_t flags)
{
u8_t buf[DRXDAP_MAX_WCHUNKSIZE];
DRXStatus_t st = DRX_STS_ERROR;
@ -492,8 +448,7 @@ static DRXStatus_t DRXDAP_FASI_WriteBlock ( pI2CDeviceAddr_t devAddr,
u16_t blockSize = 0;
/* Check parameters ******************************************************* */
if ( devAddr == NULL )
{
if (devAddr == NULL) {
return DRX_STS_INVALID_ARG;
}
@ -504,9 +459,7 @@ static DRXStatus_t DRXDAP_FASI_WriteBlock ( pI2CDeviceAddr_t devAddr,
((!(DRXDAPFASI_LONG_ADDR_ALLOWED)) &&
DRXDAP_FASI_LONG_FORMAT(addr)) ||
(overheadSize > (DRXDAP_MAX_WCHUNKSIZE)) ||
((datasize!=0) && (data==NULL)) ||
((datasize & 1)==1 ) )
{
((datasize != 0) && (data == NULL)) || ((datasize & 1) == 1)) {
return DRX_STS_INVALID_ARG;
}
@ -518,8 +471,7 @@ static DRXStatus_t DRXDAP_FASI_WriteBlock ( pI2CDeviceAddr_t devAddr,
/* Write block to I2C ***************************************************** */
blockSize = ((DRXDAP_MAX_WCHUNKSIZE) - overheadSize) & ~1;
do
{
do {
u16_t todo = 0;
u16_t bufx = 0;
@ -529,8 +481,7 @@ static DRXStatus_t DRXDAP_FASI_WriteBlock ( pI2CDeviceAddr_t devAddr,
#if ( ( (DRXDAPFASI_LONG_ADDR_ALLOWED)==1 ) && \
( (DRXDAPFASI_SHORT_ADDR_ALLOWED)==1 ) )
/* short format address preferred but long format otherwise */
if ( DRXDAP_FASI_LONG_FORMAT(addr) )
{
if (DRXDAP_FASI_LONG_FORMAT(addr)) {
#endif
#if ( (DRXDAPFASI_LONG_ADDR_ALLOWED)==1 )
buf[bufx++] = (u8_t) (((addr << 1) & 0xFF) | 0x01);
@ -544,7 +495,9 @@ static DRXStatus_t DRXDAP_FASI_WriteBlock ( pI2CDeviceAddr_t devAddr,
#endif
#if ( (DRXDAPFASI_SHORT_ADDR_ALLOWED)==1 )
buf[bufx++] = (u8_t) ((addr << 1) & 0xFF);
buf[bufx++] = (u8_t) ( ((addr >> 16) & 0x0F) | ((addr >> 18) & 0xF0) );
buf[bufx++] =
(u8_t) (((addr >> 16) & 0x0F) |
((addr >> 18) & 0xF0));
#endif
#if ( ( (DRXDAPFASI_LONG_ADDR_ALLOWED)==1 ) && \
( (DRXDAPFASI_SHORT_ADDR_ALLOWED)==1 ) )
@ -560,29 +513,30 @@ static DRXStatus_t DRXDAP_FASI_WriteBlock ( pI2CDeviceAddr_t devAddr,
expects an address.
*/
todo = (blockSize < datasize ? blockSize : datasize);
if (todo==0)
{
if (todo == 0) {
u16_t overheadSizeI2cAddr = 0;
u16_t dataBlockSize = 0;
overheadSizeI2cAddr = (IS_I2C_10BIT (devAddr->i2cAddr) ? 2 : 1);
dataBlockSize = ( DRXDAP_MAX_WCHUNKSIZE - overheadSizeI2cAddr) & ~1;
overheadSizeI2cAddr =
(IS_I2C_10BIT(devAddr->i2cAddr) ? 2 : 1);
dataBlockSize =
(DRXDAP_MAX_WCHUNKSIZE - overheadSizeI2cAddr) & ~1;
/* write device address */
st = DRXBSP_I2C_WriteRead(devAddr,
(u16_t) (bufx),
buf,
(pI2CDeviceAddr_t) (NULL),
0,
(pu8_t)(NULL) );
0, (pu8_t) (NULL));
if ( ( st != DRX_STS_OK ) && ( firstErr == DRX_STS_OK ) )
{
if ((st != DRX_STS_OK) && (firstErr == DRX_STS_OK)) {
/* at the end, return the first error encountered */
firstErr = st;
}
bufx = 0;
todo = (dataBlockSize < datasize ? dataBlockSize : datasize);
todo =
(dataBlockSize <
datasize ? dataBlockSize : datasize);
}
DRXBSP_HST_Memcpy(&buf[bufx], data, todo);
/* write (address if can do and) data */
@ -590,11 +544,9 @@ static DRXStatus_t DRXDAP_FASI_WriteBlock ( pI2CDeviceAddr_t devAddr,
(u16_t) (bufx + todo),
buf,
(pI2CDeviceAddr_t) (NULL),
0,
(pu8_t)(NULL) );
0, (pu8_t) (NULL));
if ( ( st != DRX_STS_OK ) && ( firstErr == DRX_STS_OK ) )
{
if ((st != DRX_STS_OK) && (firstErr == DRX_STS_OK)) {
/* at the end, return the first error encountered */
firstErr = st;
}
@ -606,9 +558,6 @@ static DRXStatus_t DRXDAP_FASI_WriteBlock ( pI2CDeviceAddr_t devAddr,
return firstErr;
}
/******************************
*
* DRXStatus_t DRXDAP_FASI_WriteReg16 (
@ -628,8 +577,7 @@ static DRXStatus_t DRXDAP_FASI_WriteBlock ( pI2CDeviceAddr_t devAddr,
static DRXStatus_t DRXDAP_FASI_WriteReg16(pI2CDeviceAddr_t devAddr,
DRXaddr_t addr,
u16_t data,
DRXflags_t flags )
u16_t data, DRXflags_t flags)
{
u8_t buf[sizeof(data)];
@ -639,9 +587,6 @@ static DRXStatus_t DRXDAP_FASI_WriteReg16 ( pI2CDeviceAddr_t devAddr,
return DRXDAP_FASI_WriteBlock(devAddr, addr, sizeof(data), buf, flags);
}
/******************************
*
* DRXStatus_t DRXDAP_FASI_WriteReg32 (
@ -661,8 +606,7 @@ static DRXStatus_t DRXDAP_FASI_WriteReg16 ( pI2CDeviceAddr_t devAddr,
static DRXStatus_t DRXDAP_FASI_WriteReg32(pI2CDeviceAddr_t devAddr,
DRXaddr_t addr,
u32_t data,
DRXflags_t flags )
u32_t data, DRXflags_t flags)
{
u8_t buf[sizeof(data)];

5
drivers/media/dvb-frontends/drx39xyj/drx_dap_fasi.h
View file

@ -99,7 +99,6 @@
*; /* illegal statement to force compiler error */
#endif
/********************************************
* Single/master multi master setting
********************************************/
@ -239,7 +238,6 @@
extern "C" {
#endif
extern DRXAccessFunc_t drxDapFASIFunct_g;
#define DRXDAP_FASI_RMW 0x10000000
@ -259,10 +257,7 @@ extern DRXAccessFunc_t drxDapFASIFunct_g;
#define DRXDAP_FASI_LONG_FORMAT( addr ) (((addr)& 0xFC30FF80)!=0)
#define DRXDAP_FASI_OFFSET_TOO_LARGE( addr ) (((addr)& 0x00008000)!=0)
#ifdef __cplusplus
}
#endif
#endif /* __DRX_DAP_FASI_H__ */

476
drivers/media/dvb-frontends/drx39xyj/drx_driver.c
View file

File diff suppressed because it is too large Load diff

606
drivers/media/dvb-frontends/drx39xyj/drx_driver.h
View file

File diff suppressed because it is too large Load diff

3
drivers/media/dvb-frontends/drx39xyj/drx_driver_version.h
View file

@ -57,7 +57,6 @@ extern RegisterTable_t drx_driver_version[];
extern RegisterTableInfo_t drx_driver_version_info[];
#endif /* _REGISTERTABLE_ */
/*
*==============================================================================
* VERSION
@ -73,9 +72,7 @@ extern RegisterTableInfo_t drx_driver_version_info[];
#ifdef __cplusplus
}
#endif
#endif /* __DRX_DRIVER_VERSION__H__ */
/*
* End of file (drx_driver_version.h)
*******************************************************************************

3973
drivers/media/dvb-frontends/drx39xyj/drxj.c
View file

File diff suppressed because it is too large Load diff

81
drivers/media/dvb-frontends/drx39xyj/drxj.h
View file

@ -75,14 +75,18 @@ TYPEDEFS
/*============================================================================*/
typedef struct {
u16_t command; /**< Command number */
u16_t parameterLen; /**< Data length in byte */
u16_t resultLen; /**< result length in byte */
u16_t *parameter; /**< General purpous param */
u16_t *result; /**< General purpous param */
u16_t command;
/**< Command number */
u16_t parameterLen;
/**< Data length in byte */
u16_t resultLen;
/**< result length in byte */
u16_t *parameter;
/**< General purpous param */
u16_t *result;
/**< General purpous param */
} DRXJSCUCmd_t, *pDRXJSCUCmd_t;
/*============================================================================*/
/*============================================================================*/
/*== CTRL CFG related data structures ========================================*/
@ -133,7 +137,6 @@ typedef enum {
DRXJ_CFG_OOB_LO_POW,
DRXJ_CFG_MAX /* dummy, never to be used */
} DRXJCfgType_t, *pDRXJCfgType_t;
/**
@ -223,11 +226,16 @@ typedef struct {
*
*/
typedef struct {
u16_t nrBitErrors; /**< no of pre RS bit errors */
u16_t nrSymbolErrors; /**< no of pre RS symbol errors */
u16_t nrPacketErrors; /**< no of pre RS packet errors */
u16_t nrFailures; /**< no of post RS failures to decode */
u16_t nrSncParFailCount; /**< no of post RS bit erros */
u16_t nrBitErrors;
/**< no of pre RS bit errors */
u16_t nrSymbolErrors;
/**< no of pre RS symbol errors */
u16_t nrPacketErrors;
/**< no of pre RS packet errors */
u16_t nrFailures;
/**< no of post RS failures to decode */
u16_t nrSncParFailCount;
/**< no of post RS bit erros */
} DRXJRSErrors_t, *pDRXJRSErrors_t;
/**
@ -235,7 +243,8 @@ typedef struct {
* symbol error rate
*/
typedef struct {
u32_t symbError; /**< symbol error rate sps */
u32_t symbError;
/**< symbol error rate sps */
} DRXJCfgVSBMisc_t, *pDRXJCfgVSBMisc_t;
/**
@ -272,7 +281,8 @@ typedef enum {
typedef struct {
Bool_t disableTEIHandling; /**< if TRUE pass (not change) TEI bit */
Bool_t bitReverseMpegOutout; /**< if TRUE, parallel: msb on MD0; serial: lsb out first */
DRXJMpegOutputClockRate_t mpegOutputClockRate; /**< set MPEG output clock rate that overwirtes the derived one from symbol rate */
DRXJMpegOutputClockRate_t mpegOutputClockRate;
/**< set MPEG output clock rate that overwirtes the derived one from symbol rate */
DRXJMpegStartWidth_t mpegStartWidth; /**< set MPEG output start width */
} DRXJCfgMpegOutputMisc_t, *pDRXJCfgMpegOutputMisc_t;
@ -301,8 +311,10 @@ typedef enum{
* Get hw configuration, such as crystal reference frequency, I2C speed, etc...
*/
typedef struct {
DRXJXtalFreq_t xtalFreq; /**< crystal reference frequency */
DRXJI2CSpeed_t i2cSpeed; /**< 100 or 400 kbps */
DRXJXtalFreq_t xtalFreq;
/**< crystal reference frequency */
DRXJI2CSpeed_t i2cSpeed;
/**< 100 or 400 kbps */
} DRXJCfgHwCfg_t, *pDRXJCfgHwCfg_t;
/*
@ -451,9 +463,11 @@ typedef struct {
/* standard/channel settings */
DRXStandard_t standard; /**< current standard information */
DRXConstellation_t constellation; /**< current constellation */
DRXConstellation_t constellation;
/**< current constellation */
DRXFrequency_t frequency; /**< center signal frequency in KHz */
DRXBandwidth_t currBandwidth; /**< current channel bandwidth */
DRXBandwidth_t currBandwidth;
/**< current channel bandwidth */
DRXMirror_t mirror; /**< current channel mirror */
/* signal quality information */
@ -497,8 +511,8 @@ typedef struct {
u16_t atvTopNoiseTh; /**< shadow of ATV_TOP_NOISE_TH__A */
Bool_t enableCVBSOutput; /**< flag CVBS ouput enable */
Bool_t enableSIFOutput; /**< flag SIF ouput enable */
DRXJSIFAttenuation_t
sifAttenuation; /**< current SIF att setting */
DRXJSIFAttenuation_t sifAttenuation;
/**< current SIF att setting */
/* Agc configuration for QAM and VSB */
DRXJCfgAgc_t qamRfAgcCfg; /**< qam RF AGC config */
DRXJCfgAgc_t qamIfAgcCfg; /**< qam IF AGC config */
@ -510,13 +524,16 @@ typedef struct {
u16_t vsbPgaCfg; /**< vsb PGA config */
/* Pre SAW configuration for QAM and VSB */
DRXJCfgPreSaw_t qamPreSawCfg; /**< qam pre SAW config */
DRXJCfgPreSaw_t vsbPreSawCfg; /**< qam pre SAW config */
DRXJCfgPreSaw_t qamPreSawCfg;
/**< qam pre SAW config */
DRXJCfgPreSaw_t vsbPreSawCfg;
/**< qam pre SAW config */
/* Version information */
char vText[2][12]; /**< allocated text versions */
DRXVersion_t vVersion[2]; /**< allocated versions structs */
DRXVersionList_t vListElements[2]; /**< allocated version list */
DRXVersionList_t vListElements[2];
/**< allocated version list */
/* smart antenna configuration */
Bool_t smartAntInverted;
@ -529,13 +546,14 @@ typedef struct {
u32_t mpegTsStaticBitrate; /**< bitrate static MPEG output */
Bool_t disableTEIhandling; /**< MPEG TS TEI handling */
Bool_t bitReverseMpegOutout;/**< MPEG output bit order */
DRXJMpegOutputClockRate_t
mpegOutputClockRate; /**< MPEG output clock rate */
DRXJMpegStartWidth_t
mpegStartWidth; /**< MPEG Start width */
DRXJMpegOutputClockRate_t mpegOutputClockRate;
/**< MPEG output clock rate */
DRXJMpegStartWidth_t mpegStartWidth;
/**< MPEG Start width */
/* Pre SAW & Agc configuration for ATV */
DRXJCfgPreSaw_t atvPreSawCfg; /**< atv pre SAW config */
DRXJCfgPreSaw_t atvPreSawCfg;
/**< atv pre SAW config */
DRXJCfgAgc_t atvRfAgcCfg; /**< atv RF AGC config */
DRXJCfgAgc_t atvIfAgcCfg; /**< atv IF AGC config */
u16_t atvPgaCfg; /**< atv pga config */
@ -553,7 +571,8 @@ typedef struct {
u16_t oobPreSaw;
DRXJCfgOobLoPower_t oobLoPow;
DRXAudData_t audData; /**< audio storage */
DRXAudData_t audData;
/**< audio storage */
} DRXJData_t, *pDRXJData_t;
@ -595,7 +614,6 @@ Access MACROS
DRXJ_ATTR_BTSC_DETECT( d ) = (x); \
} while(0)
/*-------------------------------------------------------------------------
DEFINES
-------------------------------------------------------------------------*/
@ -708,8 +726,7 @@ Exported FUNCTIONS
extern DRXStatus_t DRXJ_Open(pDRXDemodInstance_t demod);
extern DRXStatus_t DRXJ_Close(pDRXDemodInstance_t demod);
extern DRXStatus_t DRXJ_Ctrl(pDRXDemodInstance_t demod,
DRXCtrlIndex_t ctrl,
void *ctrlData);
DRXCtrlIndex_t ctrl, void *ctrlData);
/*-------------------------------------------------------------------------
Exported GLOBAL VARIABLES

295
drivers/media/dvb-frontends/drx39xyj/drxj_map.h
View file

File diff suppressed because it is too large Load diff

11670
drivers/media/dvb-frontends/drx39xyj/drxj_mc.h
View file

File diff suppressed because it is too large Load diff

2085
drivers/media/dvb-frontends/drx39xyj/drxj_mc_vsb.h
View file

File diff suppressed because it is too large Load diff

4161
drivers/media/dvb-frontends/drx39xyj/drxj_mc_vsbqam.h
View file

File diff suppressed because it is too large Load diff