ASoC: msm: Update proper clock frequency for slave mode
Clock framework in LPASS expects valid clock frequency for slave mode (EBIT) as well. This is required to maintain corresponding voltage as per respective frequencies by clock team in frequency plan. Avoid sending zero clock frequency in clock enable even though it is slave mode. CRs-Fixed: 2028063 Change-Id: Ie9c28a921ee7bbeda67b0591f0caf0a88ea2d19c Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
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@ -2412,9 +2412,6 @@ static void update_mi2s_clk_val(int dai_id, int stream)
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mi2s_clk[dai_id].clk_freq_in_hz =
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mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
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}
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if (!mi2s_intf_conf[dai_id].msm_is_mi2s_master)
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mi2s_clk[dai_id].clk_freq_in_hz = 0;
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}
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static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
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