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spi: spi-ep93xx: always handle transfer specific settings

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__spi_async(), which starts every SPI message transfer, initializes
the bits_per_word and max speed for every transfer in the message.
Since the conditional test in ep93xx_spi_process_transfer() will
always succeed just remove it and always call ep93xx_spi_chip_setup()
to configure the hardware for each transfer in the message.

Remove the redundant ep93xx_spi_chp_setup() in ep93xx_spi_process_transfer()
which just initializes the hardware to the "default" based on the SPI
device.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Mika Westerberg <mika.westerberg@iki.fi>
Signed-off-by: Mark Brown <broonie@linaro.org>
This commit is contained in:
H Hartley Sweeten 2013-06-28 11:43:34 -07:00 • committed by Mark Brown
parent ad81f0545e
commit 4870c2170d
1 changed files with 11 additions and 34 deletions
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35
drivers/spi/spi-ep93xx.c
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@ -708,38 +708,20 @@ static void ep93xx_spi_process_transfer(struct ep93xx_spi *espi,
struct spi_transfer *t) struct spi_transfer *t)
{ {
struct ep93xx_spi_chip *chip = spi_get_ctldata(msg->spi); struct ep93xx_spi_chip *chip = spi_get_ctldata(msg->spi);
int err;
msg->state = t; msg->state = t;
/* err = ep93xx_spi_calc_divisors(espi, chip, t->speed_hz);
* Handle any transfer specific settings if needed. We use
* temporary chip settings here and restore original later when
* the transfer is finished.
*/
if (t->speed_hz || t->bits_per_word) {
struct ep93xx_spi_chip tmp_chip = *chip;
if (t->speed_hz) {
int err;
err = ep93xx_spi_calc_divisors(espi, &tmp_chip,
t->speed_hz);
if (err) { if (err) {
dev_err(&espi->pdev->dev, dev_err(&espi->pdev->dev, "failed to adjust speed\n");
"failed to adjust speed\n");
msg->status = err; msg->status = err;
return; return;
} }
}
if (t->bits_per_word) chip->dss = bits_per_word_to_dss(t->bits_per_word);
tmp_chip.dss = bits_per_word_to_dss(t->bits_per_word);
/* ep93xx_spi_chip_setup(espi, chip);
* Set up temporary new hw settings for this transfer.
*/
ep93xx_spi_chip_setup(espi, &tmp_chip);
}
espi->rx = 0; espi->rx = 0;
espi->tx = 0; espi->tx = 0;
@ -783,9 +765,6 @@ static void ep93xx_spi_process_transfer(struct ep93xx_spi *espi,
ep93xx_spi_cs_control(msg->spi, true); ep93xx_spi_cs_control(msg->spi, true);
} }
} }
if (t->speed_hz || t->bits_per_word)
ep93xx_spi_chip_setup(espi, chip);
} }
/* /*
@ -838,10 +817,8 @@ static void ep93xx_spi_process_message(struct ep93xx_spi *espi,
espi->fifo_level = 0; espi->fifo_level = 0;
/* /*
* Update SPI controller registers according to spi device and assert * Assert the chipselect.
* the chipselect.
*/ */
ep93xx_spi_chip_setup(espi, spi_get_ctldata(msg->spi));
ep93xx_spi_cs_control(msg->spi, true); ep93xx_spi_cs_control(msg->spi, true);
list_for_each_entry(t, &msg->transfers, transfer_list) { list_for_each_entry(t, &msg->transfers, transfer_list) {