BACKPORT: MIPS: math-emu: CLASS.D: Zero bits 32-63 of the result

Fix content of CLASS.D output bits 32-63 to match hardware behavior.

Prior to this patch, bits 32-63 of CLASS.D output were not
initialized, causing different 32-63 bits content of CLASS.D, based on
circumstances. However, the hardware consistently returns all these
bits zeroed. The documentation is not clear whether these bits should
be zero or unpredictable. Since technically "all zero" case still can
be viewed as belonging to "unpredictable" class of results, it is
better to zero bits 32-63.

Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtec.com>
Signed-off-by: Goran Ferenc <goran.ferenc@imgtec.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Cc: Douglas Leung <douglas.leung@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Maciej W. Rozycki <macro@imgtec.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Petar Jovanovic <petar.jovanovic@imgtec.com>
Cc: Raghu Gandham <raghu.gandham@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/17142/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
(cherry picked from commit e1231dd6b1cfbed9dfda5de488ce23c2414e1f04)

Conflicts:
	arch/mips/math-emu/cp1emu.c
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
Aleksandar Markovic 2017-08-21 14:24:49 +02:00 committed by Greg Kroah-Hartman
parent fdb44c1063
commit 49ab66eb1e

View file

@ -2146,8 +2146,8 @@ copcsr:
return SIGILL;
DPFROMREG(fs, MIPSInst_FS(ir));
rv.w = ieee754dp_2008class(fs);
rfmt = w_fmt;
rv.l = ieee754dp_2008class(fs);
rfmt = l_fmt;
goto copcsr;
}