mhi: core: Read the EXEC_ENV from device
Read the EXEC_ENV register from device to determine the MHI base state. Change-Id: Id70a360cfa3775a7186e5059306385a37960df2d Signed-off-by: Andrei Danaila <adanaila@codeaurora.org> Signed-off-by: Tony Truong <truong@codeaurora.org>
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747f687329
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4b71631d65
3 changed files with 35 additions and 31 deletions
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@ -170,17 +170,12 @@ int bhi_probe(struct mhi_pcie_dev_info *mhi_pcie_device)
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{
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struct bhi_ctxt_t *bhi_ctxt = &mhi_pcie_device->bhi_ctxt;
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int ret_val = 0;
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u32 pcie_word_val = 0;
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int r;
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if (NULL == mhi_pcie_device || 0 == mhi_pcie_device->core.bar0_base
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|| 0 == mhi_pcie_device->core.bar0_end)
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return -EIO;
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bhi_ctxt->bhi_base = mhi_pcie_device->core.bar0_base;
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pcie_word_val = mhi_reg_read(bhi_ctxt->bhi_base, BHIOFF);
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bhi_ctxt->bhi_base += pcie_word_val;
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mhi_log(MHI_MSG_INFO,
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"Successfully registered char dev. bhi base is: 0x%p.\n",
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bhi_ctxt->bhi_base);
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@ -167,17 +167,10 @@ int mhi_ctxt_init(struct mhi_pcie_dev_info *mhi_pcie_dev)
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pcie_device->dev.platform_data = &mhi_pcie_dev->mhi_ctxt;
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mhi_pcie_dev->mhi_ctxt.dev_info->plat_dev->dev.platform_data =
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&mhi_pcie_dev->mhi_ctxt;
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if (mhi_pcie_dev->mhi_ctxt.base_state == STATE_TRANSITION_BHI) {
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ret_val = bhi_probe(mhi_pcie_dev);
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if (ret_val) {
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mhi_log(MHI_MSG_ERROR, "Failed to initialize BHI.\n");
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goto mhi_state_transition_error;
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}
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}
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ret_val = mhi_reg_notifiers(&mhi_pcie_dev->mhi_ctxt);
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if (ret_val) {
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mhi_log(MHI_MSG_ERROR, "Failed to register for notifiers\n");
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return ret_val;
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goto mhi_state_transition_error;
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}
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mhi_log(MHI_MSG_INFO,
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"Finished all driver probing returning ret_val %d.\n",
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@ -12,6 +12,8 @@
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#include <mhi_sys.h>
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#include <mhi.h>
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#include <mhi_bhi.h>
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#include <mhi_hwio.h>
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#include <soc/qcom/subsystem_restart.h>
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#include <soc/qcom/subsystem_notif.h>
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@ -79,19 +81,6 @@ static struct notifier_block mhi_ssr_nb = {
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.notifier_call = mhi_ssr_notify_cb,
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};
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static void esoc_parse_link_type(struct mhi_device_ctxt *mhi_dev_ctxt)
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{
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int ret_val;
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ret_val = strcmp(mhi_dev_ctxt->esoc_handle->link, "HSIC+PCIe");
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mhi_log(MHI_MSG_VERBOSE, "Link type is %s as indicated by ESOC\n",
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mhi_dev_ctxt->esoc_handle->link);
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if (ret_val)
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mhi_dev_ctxt->base_state = STATE_TRANSITION_BHI;
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else
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mhi_dev_ctxt->base_state = STATE_TRANSITION_RESET;
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}
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int mhi_esoc_register(struct mhi_device_ctxt *mhi_dev_ctxt)
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{
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int ret_val = 0;
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@ -99,7 +88,6 @@ int mhi_esoc_register(struct mhi_device_ctxt *mhi_dev_ctxt)
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struct pci_driver *mhi_driver;
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struct device *dev = &mhi_dev_ctxt->dev_info->pcie_device->dev;
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mhi_dev_ctxt->base_state = STATE_TRANSITION_BHI;
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mhi_driver = mhi_dev_ctxt->dev_info->mhi_pcie_driver;
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np = dev->of_node;
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mhi_dev_ctxt->esoc_handle = devm_register_esoc_client(dev, "mdm");
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@ -113,8 +101,6 @@ int mhi_esoc_register(struct mhi_device_ctxt *mhi_dev_ctxt)
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return -EIO;
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}
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esoc_parse_link_type(mhi_dev_ctxt);
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mhi_dev_ctxt->esoc_ssr_handle = subsys_notif_register_notifier(
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mhi_dev_ctxt->esoc_handle->name,
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&mhi_ssr_nb);
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@ -162,6 +148,34 @@ void mhi_notify_clients(struct mhi_device_ctxt *mhi_dev_ctxt,
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}
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}
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static int set_mhi_base_state(struct mhi_pcie_dev_info *mhi_pcie_dev)
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{
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u32 pcie_word_val = 0;
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int r = 0;
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struct mhi_device_ctxt *mhi_dev_ctxt = &mhi_pcie_dev->mhi_ctxt;
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mhi_pcie_dev->bhi_ctxt.bhi_base = mhi_pcie_dev->core.bar0_base;
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pcie_word_val = mhi_reg_read(mhi_pcie_dev->bhi_ctxt.bhi_base, BHIOFF);
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mhi_pcie_dev->bhi_ctxt.bhi_base += pcie_word_val;
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pcie_word_val = mhi_reg_read(mhi_pcie_dev->bhi_ctxt.bhi_base,
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BHI_EXECENV);
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if (pcie_word_val == MHI_EXEC_ENV_AMSS) {
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mhi_dev_ctxt->base_state = STATE_TRANSITION_RESET;
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} else if (pcie_word_val == MHI_EXEC_ENV_PBL) {
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mhi_dev_ctxt->base_state = STATE_TRANSITION_BHI;
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r = bhi_probe(mhi_pcie_dev);
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if (r)
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mhi_log(MHI_MSG_ERROR, "Failed to initialize BHI.\n");
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} else {
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mhi_log(MHI_MSG_ERROR, "Invalid EXEC_ENV: 0x%x\n",
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pcie_word_val);
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r = -EIO;
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}
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mhi_log(MHI_MSG_INFO, "EXEC_ENV: %d Base state %d\n",
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pcie_word_val, mhi_dev_ctxt->base_state);
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return r;
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}
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void mhi_link_state_cb(struct msm_pcie_notify *notify)
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{
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int ret_val = 0;
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@ -200,6 +214,9 @@ void mhi_link_state_cb(struct msm_pcie_notify *notify)
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mhi_dev_ctxt = &mhi_pcie_dev->mhi_ctxt;
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mhi_pcie_dev->mhi_ctxt.flags.link_up = 1;
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pci_set_master(mhi_pcie_dev->pcie_device);
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r = set_mhi_base_state(mhi_pcie_dev);
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if (r)
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return;
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init_mhi_base_state(mhi_dev_ctxt);
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} else {
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mhi_log(MHI_MSG_INFO,
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@ -242,8 +259,7 @@ int init_mhi_base_state(struct mhi_device_ctxt *mhi_dev_ctxt)
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if (r)
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mhi_log(MHI_MSG_INFO,
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"Failed to scale bus request to active set.\n");
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r = mhi_init_state_transition(mhi_dev_ctxt,
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mhi_dev_ctxt->base_state);
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r = mhi_init_state_transition(mhi_dev_ctxt, mhi_dev_ctxt->base_state);
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if (r) {
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mhi_log(MHI_MSG_CRITICAL,
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"Failed to start state change event, to %d\n",
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