Merge "leds: leds-qpnp: correct various coding style issues"

This commit is contained in:
Linux Build Service Account 2017-02-08 17:47:42 -08:00 committed by Gerrit - the friendly Code Review server
commit 4c61075032
32 changed files with 493 additions and 581 deletions

View file

@ -1,10 +1,10 @@
Qualcomm QPNP Leds
Qualcomm Technologies, Inc. QPNP LEDs
QPNP (Qualcomm Plug N Play) LEDs driver is used for
controlling LEDs that are part of PMIC on Qualcomm reference
platforms. The PMIC is connected to Host processor via
SPMI bus. This driver supports various LED modules such as
Keypad backlight, WLED (white LED), RGB LED and flash LED.
Qualcomm Technologies, Inc. Plug N Play (QPNP) LED modules
are used for controlling LEDs that are connected to a QPNP PMIC.
The PMIC is connected to a host processor via the SPMI bus. Various
LED modules are supported such as Keypad backlight, WLED (white LED),
RGB LED and flash LED.
Each LED module is represented as a node of "leds-qpnp". This
node will further contain the type of LED supported and its
@ -83,7 +83,7 @@ Optional properties for RGB led:
- qcom,turn-off-delay-ms: delay in millisecond for turning off the led when its default-state is "on". Value is being ignored in case default-state is "off".
- qcom,use-blink: Use blink sysfs entry for switching into lpg mode. For optimal use, set default mode to pwm. All required lpg parameters must be supplied.
MPP LED is an LED controled through a Multi Purpose Pin.
MPP LED is an LED controlled through a Multi Purpose Pin.
Optional properties for MPP LED:
- linux,default-trigger: trigger the led from external modules such as display

View file

@ -1,4 +1,4 @@
Qualcomm QPNP Coincell - coincell battery charger devices
Qualcomm Technologies, Inc. QPNP Coincell - coincell battery charger devices
Required properties:
- compatible: Must be "qcom,qpnp-coincell".

View file

@ -1,4 +1,4 @@
Qualcomm Technologies Memory Accelerator
Qualcomm Technologies, Inc. Memory Accelerator
Memory accelerator configures the power-mode (corner) for the
accelerator.

View file

@ -1,4 +1,4 @@
Qualcomm QPNP Regulators
Qualcomm Technologies, Inc. QPNP Regulators
qpnp-regulator is a regulator driver which supports regulators inside of PMICs
that utilize the MSM SPMI implementation.

View file

@ -1,8 +1,9 @@
Qualcomm QPNP Temperature Alarm
Qualcomm Technologies, Inc. QPNP Temperature Alarm
QPNP temperature alarm peripherals are found inside of Qualcomm PMIC chips that
utilize the MSM SPMI implementation. These peripherals provide an interrupt
signal and status register to identify high PMIC die temperature.
QPNP temperature alarm peripherals are found inside of Qualcomm Technologies,
Inc. PMIC chips that utilize the MSM SPMI implementation. These peripherals
provide an interrupt signal and status register to identify high PMIC die
temperature.
Required properties:
- compatible: Must be "qcom,qpnp-temp-alarm".

View file

@ -339,22 +339,23 @@ config GPIO_PXA
Say yes here to support the PXA GPIO device
config GPIO_QPNP_PIN
tristate "Qualcomm Technologies, Inc. QPNP GPIO support"
depends on SPMI
tristate "Qualcomm QPNP gpio support"
help
Say 'y' here to include support for the Qualcomm QPNP gpio
driver. This driver supports Device Tree and allows a
device_node to be registered as a gpio-controller. It
does not handle gpio interrupts directly, they are handled
via the spmi arbiter interrupt driver.
Say 'y' here to include support for the Qualcomm Technologies, Inc.
QPNP GPIO driver. This driver supports Device Tree and allows a
device_node to be registered as a gpio-controller. It does not handle
GPIO interrupts directly; they are handled via the SPMI arbiter
interrupt driver.
config GPIO_QPNP_PIN_DEBUG
depends on GPIO_QPNP_PIN
depends on DEBUG_FS
bool "Qualcomm QPNP GPIO debug support"
bool "Qualcomm Technologies, Inc. QPNP GPIO debug support"
depends on GPIO_QPNP_PIN && DEBUG_FS
help
Say 'y' here to include debug support for the Qualcomm
QPNP gpio driver.
Say 'y' here to include debug support for the Qualcomm Technologies,
Inc. QPNP GPIO driver. This provides a userspace debug interface to
get and set all of the supported features of PMIC GPIO and MPP pins
including those which are managed by the gpio framework.
config GPIO_RCAR
tristate "Renesas R-Car GPIO"

View file

@ -753,16 +753,17 @@ int qpnp_pin_config(int gpio, struct qpnp_pin_cfg *param)
}
EXPORT_SYMBOL(qpnp_pin_config);
#define Q_MAX_CHIP_NAME 128
int qpnp_pin_map(const char *name, uint32_t pmic_pin)
{
struct qpnp_pin_chip *q_chip;
struct qpnp_pin_spec *q_spec = NULL;
if (!name)
return -EINVAL;
mutex_lock(&qpnp_pin_chips_lock);
list_for_each_entry(q_chip, &qpnp_pin_chips, chip_list) {
if (strncmp(q_chip->gpio_chip.label, name,
Q_MAX_CHIP_NAME) != 0)
if (strcmp(q_chip->gpio_chip.label, name) != 0)
continue;
if (q_chip->pmic_pin_lowest <= pmic_pin &&
q_chip->pmic_pin_highest >= pmic_pin) {
@ -778,7 +779,7 @@ int qpnp_pin_map(const char *name, uint32_t pmic_pin)
}
EXPORT_SYMBOL(qpnp_pin_map);
static int qpnp_pin_to_irq(struct gpio_chip *gpio_chip, unsigned offset)
static int qpnp_pin_to_irq(struct gpio_chip *gpio_chip, unsigned int offset)
{
struct qpnp_pin_chip *q_chip = dev_get_drvdata(gpio_chip->dev);
struct qpnp_pin_spec *q_spec;
@ -811,14 +812,13 @@ static int qpnp_pin_to_irq(struct gpio_chip *gpio_chip, unsigned offset)
return q_spec->irq;
}
static int qpnp_pin_get(struct gpio_chip *gpio_chip, unsigned offset)
static int qpnp_pin_get(struct gpio_chip *gpio_chip, unsigned int offset)
{
int rc, ret_val;
struct qpnp_pin_chip *q_chip = dev_get_drvdata(gpio_chip->dev);
struct qpnp_pin_spec *q_spec = NULL;
u8 buf[1], en_mask;
u8 shift, mask, reg;
int val;
u8 buf, en_mask, shift, mask, reg;
unsigned int val;
int rc;
if (WARN_ON(!q_chip))
return -ENODEV;
@ -840,7 +840,9 @@ static int qpnp_pin_get(struct gpio_chip *gpio_chip, unsigned offset)
== QPNP_PIN_MODE_DIG_IN) {
rc = regmap_read(q_chip->regmap,
Q_REG_ADDR(q_spec, Q_REG_STATUS1), &val);
buf[0] = (u8)val;
if (rc)
return rc;
buf = val;
if (q_spec->type == Q_GPIO_TYPE && q_spec->dig_major_rev == 0)
en_mask = Q_REG_STATUS1_GPIO_EN_REV0_MASK;
@ -850,11 +852,12 @@ static int qpnp_pin_get(struct gpio_chip *gpio_chip, unsigned offset)
else /* MPP */
en_mask = Q_REG_STATUS1_MPP_EN_MASK;
if (!(buf[0] & en_mask))
if (!(buf & en_mask))
return -EPERM;
return buf[0] & Q_REG_STATUS1_VAL_MASK;
} else {
return buf & Q_REG_STATUS1_VAL_MASK;
}
if (is_gpio_lv_mv(q_spec)) {
shift = Q_REG_DIG_OUT_SRC_INVERT_SHIFT;
mask = Q_REG_DIG_OUT_SRC_INVERT_MASK;
@ -865,11 +868,7 @@ static int qpnp_pin_get(struct gpio_chip *gpio_chip, unsigned offset)
reg = q_spec->regs[Q_REG_I_MODE_CTL];
}
ret_val = (reg & mask) >> shift;
return ret_val;
}
return 0;
return (reg & mask) >> shift;
}
static int __qpnp_pin_set(struct qpnp_pin_chip *q_chip,
@ -905,7 +904,7 @@ static int __qpnp_pin_set(struct qpnp_pin_chip *q_chip,
static void qpnp_pin_set(struct gpio_chip *gpio_chip,
unsigned offset, int value)
unsigned int offset, int value)
{
struct qpnp_pin_chip *q_chip = dev_get_drvdata(gpio_chip->dev);
struct qpnp_pin_spec *q_spec;
@ -950,7 +949,7 @@ static int qpnp_pin_set_mode(struct qpnp_pin_chip *q_chip,
}
static int qpnp_pin_direction_input(struct gpio_chip *gpio_chip,
unsigned offset)
unsigned int offset)
{
struct qpnp_pin_chip *q_chip = dev_get_drvdata(gpio_chip->dev);
struct qpnp_pin_spec *q_spec;
@ -966,8 +965,7 @@ static int qpnp_pin_direction_input(struct gpio_chip *gpio_chip,
}
static int qpnp_pin_direction_output(struct gpio_chip *gpio_chip,
unsigned offset,
int val)
unsigned int offset, int val)
{
int rc;
struct qpnp_pin_chip *q_chip = dev_get_drvdata(gpio_chip->dev);
@ -1343,7 +1341,7 @@ struct qpnp_pin_debugfs_args {
const char *filename;
};
static struct qpnp_pin_debugfs_args dfs_args[] = {
static struct qpnp_pin_debugfs_args dfs_args[Q_NUM_PARAMS] = {
{ Q_PIN_CFG_MODE, "mode" },
{ Q_PIN_CFG_OUTPUT_TYPE, "output_type" },
{ Q_PIN_CFG_INVERT, "invert" },
@ -1371,8 +1369,6 @@ static int qpnp_pin_debugfs_create(struct qpnp_pin_chip *q_chip)
struct dentry *dfs, *dfs_io_dir;
int i, j, rc;
BUG_ON(Q_NUM_PARAMS != ARRAY_SIZE(dfs_args));
q_chip->dfs_dir = debugfs_create_dir(q_chip->gpio_chip.label,
driver_dfs_dir);
if (q_chip->dfs_dir == NULL) {
@ -1403,12 +1399,8 @@ static int qpnp_pin_debugfs_create(struct qpnp_pin_chip *q_chip)
continue;
params[type] = type;
dfs = debugfs_create_file(
filename,
S_IRUGO | S_IWUSR,
dfs_io_dir,
&q_spec->params[type],
&qpnp_pin_fops);
dfs = debugfs_create_file(filename, 0644, dfs_io_dir,
&q_spec->params[type], &qpnp_pin_fops);
if (dfs == NULL)
goto dfs_err;
}
@ -1674,7 +1666,7 @@ static int qpnp_pin_remove(struct platform_device *pdev)
return qpnp_pin_free_chip(q_chip);
}
static struct of_device_id spmi_match_table[] = {
static const struct of_device_id spmi_match_table[] = {
{ .compatible = "qcom,qpnp-pin",
},
{}

View file

@ -581,16 +581,20 @@ config LEDS_POWERNV
depends on LEDS_CLASS
depends on PPC_POWERNV
depends on OF
help
This option enables support for the system LEDs present on
PowerNV platforms. Say 'y' to enable this support in kernel.
To compile this driver as a module, choose 'm' here: the module
will be called leds-powernv.
config LEDS_QPNP
tristate "Support for QPNP LEDs"
depends on LEDS_CLASS && SPMI
help
This driver supports the leds functionality of Qualcomm PNP PMIC. It
includes RGB Leds, WLED and Flash Led.
To compile this driver as a module, choose M here: the module will
be called leds-qpnp.
This driver supports the LED functionality of Qualcomm Technologies,
Inc. QPNP PMICs. It primarily supports controlling tri-color RGB
LEDs in both PWM and light pattern generator (LPG) modes. For older
PMICs, it also supports WLEDs and flash LEDs.
config LEDS_QPNP_FLASH
tristate "Support for QPNP Flash LEDs"
@ -612,35 +616,6 @@ config LEDS_QPNP_FLASH_V2
To compile this driver as a module, choose M here: the module will
be called leds-qpnp-flash-v2.
config LEDS_QPNP_WLED
tristate "Support for QPNP WLED"
depends on LEDS_CLASS && SPMI
help
This option enables support for the system LEDs present on
PowerNV platforms. Say 'y' to enable this support in kernel.
To compile this driver as a module, choose 'm' here: the module
will be called leds-powernv.
config LEDS_QPNP
tristate "Support for QPNP LEDs"
depends on LEDS_CLASS && SPMI
help
This driver supports the leds functionality of Qualcomm PNP PMIC. It
includes RGB Leds, WLED and Flash Led.
To compile this driver as a module, choose M here: the module will
be called leds-qpnp.
config LEDS_QPNP_FLASH
tristate "Support for QPNP Flash LEDs"
depends on LEDS_CLASS && SPMI
help
This driver supports the leds functionality of Qualcomm Technologies
PNP PMIC. It includes Flash Led.
To compile this driver as a module, choose M here: the module will
be called leds-qpnp-flash.
config LEDS_QPNP_WLED
tristate "Support for QPNP WLED"
depends on LEDS_CLASS && SPMI

View file

@ -1,4 +1,4 @@
/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved.
/* Copyright (c) 2012-2015, 2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -666,7 +666,7 @@ static int qpnp_wled_set(struct qpnp_led_data *led)
return rc;
}
usleep_range(WLED_OVP_DELAY, WLED_OVP_DELAY);
usleep_range(WLED_OVP_DELAY, WLED_OVP_DELAY + 10);
} else if (led->wled_cfg->pmic_version == PMIC_VER_8941) {
if (led->wled_cfg->num_physical_strings <=
WLED_THREE_STRINGS) {
@ -696,7 +696,8 @@ static int qpnp_wled_set(struct qpnp_led_data *led)
"WLED write sink reg failed");
return rc;
}
usleep_range(WLED_OVP_DELAY, WLED_OVP_DELAY);
usleep_range(WLED_OVP_DELAY,
WLED_OVP_DELAY + 10);
} else {
val = WLED_DISABLE_ALL_SINKS;
rc = regmap_write(led->regmap,
@ -724,7 +725,8 @@ static int qpnp_wled_set(struct qpnp_led_data *led)
msleep(WLED_OVP_DELAY_LOOP);
tries++;
}
usleep_range(WLED_OVP_DELAY, WLED_OVP_DELAY);
usleep_range(WLED_OVP_DELAY,
WLED_OVP_DELAY + 10);
}
}
@ -859,9 +861,7 @@ static int qpnp_mpp_set(struct qpnp_led_data *led)
led->mpp_cfg->enable = true;
if (led->cdev.brightness < led->mpp_cfg->min_brightness) {
dev_warn(&led->pdev->dev,
"brightness is less than supported..." \
"set to minimum supported\n");
dev_warn(&led->pdev->dev, "brightness is less than supported, set to minimum supported\n");
led->cdev.brightness = led->mpp_cfg->min_brightness;
}
@ -940,9 +940,7 @@ static int qpnp_mpp_set(struct qpnp_led_data *led)
LED_MPP_EN_CTRL(led->base), LED_MPP_EN_MASK,
LED_MPP_EN_ENABLE);
if (rc) {
dev_err(&led->pdev->dev,
"Failed to write led enable " \
"reg\n");
dev_err(&led->pdev->dev, "Failed to write led enable reg\n");
goto err_mpp_reg_write;
}
} else {
@ -1102,30 +1100,27 @@ static int qpnp_flash_regulator_operate(struct qpnp_led_data *led, bool on)
led_array[i].flash_cfg->
flash_wa_reg);
if (rc) {
dev_err(&led->pdev->dev,
"Flash wa regulator"
"enable failed(%d)\n",
dev_err(&led->pdev->dev, "Flash wa regulator enable failed(%d)\n",
rc);
return rc;
}
}
rc = regulator_enable(
led_array[i].flash_cfg->\
flash_boost_reg);
led_array[i].flash_cfg->flash_boost_reg);
if (rc) {
if (led_array[i].flash_cfg->
flash_wa_reg_get)
/* Disable flash wa regulator
/*
* Disable flash wa regulator
* when flash boost regulator
* enable fails
*/
regulator_disable(
led_array[i].flash_cfg->
flash_wa_reg);
dev_err(&led->pdev->dev,
"Flash boost regulator enable"
"failed(%d)\n", rc);
dev_err(&led->pdev->dev, "Flash boost regulator enable failed(%d)\n",
rc);
return rc;
}
led->flash_cfg->flash_on = true;
@ -1150,12 +1145,11 @@ regulator_turn_off:
rc);
}
rc = regulator_disable(led_array[i].flash_cfg->\
flash_boost_reg);
rc = regulator_disable(
led_array[i].flash_cfg->flash_boost_reg);
if (rc) {
dev_err(&led->pdev->dev,
"Flash boost regulator disable"
"failed(%d)\n", rc);
dev_err(&led->pdev->dev, "Flash boost regulator disable failed(%d)\n",
rc);
return rc;
}
if (led_array[i].flash_cfg->flash_wa_reg_get) {
@ -1163,9 +1157,7 @@ regulator_turn_off:
led_array[i].flash_cfg->
flash_wa_reg);
if (rc) {
dev_err(&led->pdev->dev,
"Flash_wa regulator"
"disable failed(%d)\n",
dev_err(&led->pdev->dev, "Flash_wa regulator disable failed(%d)\n",
rc);
return rc;
}
@ -1416,7 +1408,8 @@ static int qpnp_flash_set(struct qpnp_led_data *led)
/*
* Add 1ms delay for bharger enter stable state
*/
usleep_range(FLASH_RAMP_UP_DELAY_US, FLASH_RAMP_UP_DELAY_US);
usleep_range(FLASH_RAMP_UP_DELAY_US,
FLASH_RAMP_UP_DELAY_US + 10);
if (!led->flash_cfg->strobe_type)
led->flash_cfg->trigger_flash &=
@ -1480,7 +1473,8 @@ static int qpnp_flash_set(struct qpnp_led_data *led)
* Disable module after ramp down complete for stable
* behavior
*/
usleep_range(FLASH_RAMP_UP_DELAY_US, FLASH_RAMP_UP_DELAY_US);
usleep_range(FLASH_RAMP_UP_DELAY_US,
FLASH_RAMP_UP_DELAY_US + 10);
rc = qpnp_led_masked_write(led,
FLASH_ENABLE_CONTROL(led->base),
@ -1658,9 +1652,7 @@ static int qpnp_kpdbl_set(struct qpnp_led_data *led)
KPDBL_MODULE_EN_MASK,
KPDBL_MODULE_DIS);
if (rc) {
dev_err(&led->pdev->dev,
"Failed to write led"
" enable reg\n");
dev_err(&led->pdev->dev, "Failed to write led enable reg\n");
return rc;
}
}
@ -1854,8 +1846,6 @@ static void qpnp_led_work(struct work_struct *work)
struct qpnp_led_data, work);
__qpnp_led_work(led, led->cdev.brightness);
return;
}
static int qpnp_led_set_max_brightness(struct qpnp_led_data *led)
@ -1942,7 +1932,7 @@ static int qpnp_wled_init(struct qpnp_led_data *led)
return -EINVAL;
}
if ((led->max_current > WLED_MAX_CURR)) {
if (led->max_current > WLED_MAX_CURR) {
dev_err(&led->pdev->dev, "Invalid max current\n");
return -EINVAL;
}
@ -3048,7 +3038,7 @@ static int qpnp_get_common_configs(struct qpnp_led_data *led,
rc = of_property_read_string(node, "qcom,default-state",
&temp_string);
if (!rc) {
if (strncmp(temp_string, "on", sizeof("on")) == 0)
if (strcmp(temp_string, "on") == 0)
led->default_on = true;
} else if (rc != -EINVAL)
return rc;
@ -3075,10 +3065,8 @@ static int qpnp_get_config_wled(struct qpnp_led_data *led,
led->wled_cfg = devm_kzalloc(&led->pdev->dev,
sizeof(struct wled_config_data), GFP_KERNEL);
if (!led->wled_cfg) {
dev_err(&led->pdev->dev, "Unable to allocate memory\n");
if (!led->wled_cfg)
return -ENOMEM;
}
rc = regmap_read(led->regmap, PMIC_VERSION_REG, &tmp);
if (rc) {
@ -3161,10 +3149,8 @@ static int qpnp_get_config_flash(struct qpnp_led_data *led,
led->flash_cfg = devm_kzalloc(&led->pdev->dev,
sizeof(struct flash_config_data), GFP_KERNEL);
if (!led->flash_cfg) {
dev_err(&led->pdev->dev, "Unable to allocate memory\n");
if (!led->flash_cfg)
return -ENOMEM;
}
rc = regmap_read(led->regmap, FLASH_PERIPHERAL_SUBTYPE(led->base),
&tmp);
@ -3297,7 +3283,8 @@ static int qpnp_get_config_flash(struct qpnp_led_data *led,
}
return 0;
} else {
}
rc = of_property_read_u32(node, "qcom,duration", &val);
if (!rc)
led->flash_cfg->duration = (u8)((val - 10) / 10);
@ -3308,11 +3295,10 @@ static int qpnp_get_config_flash(struct qpnp_led_data *led,
rc = of_property_read_u32(node, "qcom,current", &val);
if (!rc)
led->flash_cfg->current_prgm = (val *
FLASH_MAX_LEVEL / led->max_current);
led->flash_cfg->current_prgm = val * FLASH_MAX_LEVEL
/ led->max_current;
else
goto error_get_flash_reg;
}
rc = of_property_read_u32(node, "qcom,headroom", &val);
if (!rc)
@ -3512,11 +3498,11 @@ bad_lpg_params:
static int qpnp_led_get_mode(const char *mode)
{
if (strncmp(mode, "manual", strlen(mode)) == 0)
if (strcmp(mode, "manual") == 0)
return MANUAL_MODE;
else if (strncmp(mode, "pwm", strlen(mode)) == 0)
else if (strcmp(mode, "pwm") == 0)
return PWM_MODE;
else if (strncmp(mode, "lpg", strlen(mode)) == 0)
else if (strcmp(mode, "lpg") == 0)
return LPG_MODE;
else
return -EINVAL;
@ -3532,10 +3518,8 @@ static int qpnp_get_config_kpdbl(struct qpnp_led_data *led,
led->kpdbl_cfg = devm_kzalloc(&led->pdev->dev,
sizeof(struct kpdbl_config_data), GFP_KERNEL);
if (!led->kpdbl_cfg) {
dev_err(&led->pdev->dev, "Unable to allocate memory\n");
if (!led->kpdbl_cfg)
return -ENOMEM;
}
rc = of_property_read_string(node, "qcom,mode", &mode);
if (!rc) {
@ -3547,11 +3531,9 @@ static int qpnp_get_config_kpdbl(struct qpnp_led_data *led,
led->kpdbl_cfg->pwm_cfg = devm_kzalloc(&led->pdev->dev,
sizeof(struct pwm_config_data),
GFP_KERNEL);
if (!led->kpdbl_cfg->pwm_cfg) {
dev_err(&led->pdev->dev,
"Unable to allocate memory\n");
if (!led->kpdbl_cfg->pwm_cfg)
return -ENOMEM;
}
led->kpdbl_cfg->pwm_cfg->mode = led_mode;
led->kpdbl_cfg->pwm_cfg->default_mode = led_mode;
} else {
@ -3589,10 +3571,8 @@ static int qpnp_get_config_rgb(struct qpnp_led_data *led,
led->rgb_cfg = devm_kzalloc(&led->pdev->dev,
sizeof(struct rgb_config_data), GFP_KERNEL);
if (!led->rgb_cfg) {
dev_err(&led->pdev->dev, "Unable to allocate memory\n");
if (!led->rgb_cfg)
return -ENOMEM;
}
if (led->id == QPNP_ID_RGB_RED)
led->rgb_cfg->enable = RGB_LED_ENABLE_RED;
@ -3641,10 +3621,8 @@ static int qpnp_get_config_mpp(struct qpnp_led_data *led,
led->mpp_cfg = devm_kzalloc(&led->pdev->dev,
sizeof(struct mpp_config_data), GFP_KERNEL);
if (!led->mpp_cfg) {
dev_err(&led->pdev->dev, "Unable to allocate memory\n");
if (!led->mpp_cfg)
return -ENOMEM;
}
if (of_find_property(of_get_parent(node), "mpp-power-supply", NULL)) {
led->mpp_cfg->mpp_reg =
@ -3770,11 +3748,8 @@ static int qpnp_get_config_gpio(struct qpnp_led_data *led,
led->gpio_cfg = devm_kzalloc(&led->pdev->dev,
sizeof(struct gpio_config_data), GFP_KERNEL);
if (!led->gpio_cfg) {
dev_err(&led->pdev->dev,
"Unable to allocate memory gpio struct\n");
if (!led->gpio_cfg)
return -ENOMEM;
}
led->gpio_cfg->source_sel = LED_GPIO_SOURCE_SEL_DEFAULT;
rc = of_property_read_u32(node, "qcom,source-sel", &val);
@ -3823,12 +3798,10 @@ static int qpnp_leds_probe(struct platform_device *pdev)
if (!num_leds)
return -ECHILD;
led_array = devm_kzalloc(&pdev->dev,
(sizeof(struct qpnp_led_data) * num_leds), GFP_KERNEL);
if (!led_array) {
dev_err(&pdev->dev, "Unable to allocate memory\n");
led_array = devm_kcalloc(&pdev->dev, num_leds, sizeof(*led_array),
GFP_KERNEL);
if (!led_array)
return -ENOMEM;
}
for_each_child_of_node(node, temp) {
led = &led_array[parsed_leds];
@ -3881,24 +3854,22 @@ static int qpnp_leds_probe(struct platform_device *pdev)
rc = qpnp_get_common_configs(led, temp);
if (rc) {
dev_err(&led->pdev->dev,
"Failure reading common led configuration," \
" rc = %d\n", rc);
dev_err(&led->pdev->dev, "Failure reading common led configuration, rc = %d\n",
rc);
goto fail_id_check;
}
led->cdev.brightness_set = qpnp_led_set;
led->cdev.brightness_get = qpnp_led_get;
if (strncmp(led_label, "wled", sizeof("wled")) == 0) {
if (strcmp(led_label, "wled") == 0) {
rc = qpnp_get_config_wled(led, temp);
if (rc < 0) {
dev_err(&led->pdev->dev,
"Unable to read wled config data\n");
goto fail_id_check;
}
} else if (strncmp(led_label, "flash", sizeof("flash"))
== 0) {
} else if (strcmp(led_label, "flash") == 0) {
if (!of_find_property(node, "flash-boost-supply", NULL))
regulator_probe = true;
rc = qpnp_get_config_flash(led, temp, &regulator_probe);
@ -3907,14 +3878,14 @@ static int qpnp_leds_probe(struct platform_device *pdev)
"Unable to read flash config data\n");
goto fail_id_check;
}
} else if (strncmp(led_label, "rgb", sizeof("rgb")) == 0) {
} else if (strcmp(led_label, "rgb") == 0) {
rc = qpnp_get_config_rgb(led, temp);
if (rc < 0) {
dev_err(&led->pdev->dev,
"Unable to read rgb config data\n");
goto fail_id_check;
}
} else if (strncmp(led_label, "mpp", sizeof("mpp")) == 0) {
} else if (strcmp(led_label, "mpp") == 0) {
rc = qpnp_get_config_mpp(led, temp);
if (rc < 0) {
dev_err(&led->pdev->dev,
@ -3928,7 +3899,7 @@ static int qpnp_leds_probe(struct platform_device *pdev)
"Unable to read gpio config data\n");
goto fail_id_check;
}
} else if (strncmp(led_label, "kpdbl", sizeof("kpdbl")) == 0) {
} else if (strcmp(led_label, "kpdbl") == 0) {
bitmap_zero(kpdbl_leds_in_use, NUM_KPDBL_LEDS);
is_kpdbl_master_turn_on = false;
rc = qpnp_get_config_kpdbl(led, temp);
@ -4113,8 +4084,8 @@ static int qpnp_leds_remove(struct platform_device *pdev)
case QPNP_ID_FLASH1_LED0:
case QPNP_ID_FLASH1_LED1:
if (led_array[i].flash_cfg->flash_reg_get)
regulator_put(led_array[i].flash_cfg-> \
flash_boost_reg);
regulator_put(
led_array[i].flash_cfg->flash_boost_reg);
if (led_array[i].flash_cfg->torch_enable)
if (!led_array[i].flash_cfg->no_smbb_support)
regulator_put(led_array[i].
@ -4126,49 +4097,49 @@ static int qpnp_leds_remove(struct platform_device *pdev)
case QPNP_ID_RGB_GREEN:
case QPNP_ID_RGB_BLUE:
if (led_array[i].rgb_cfg->pwm_cfg->mode == PWM_MODE)
sysfs_remove_group(&led_array[i].cdev.dev->\
kobj, &pwm_attr_group);
sysfs_remove_group(&led_array[i].cdev.dev->kobj,
&pwm_attr_group);
if (led_array[i].rgb_cfg->pwm_cfg->use_blink) {
sysfs_remove_group(&led_array[i].cdev.dev->\
kobj, &blink_attr_group);
sysfs_remove_group(&led_array[i].cdev.dev->\
kobj, &lpg_attr_group);
} else if (led_array[i].rgb_cfg->pwm_cfg->mode\
sysfs_remove_group(&led_array[i].cdev.dev->kobj,
&blink_attr_group);
sysfs_remove_group(&led_array[i].cdev.dev->kobj,
&lpg_attr_group);
} else if (led_array[i].rgb_cfg->pwm_cfg->mode
== LPG_MODE)
sysfs_remove_group(&led_array[i].cdev.dev->\
kobj, &lpg_attr_group);
sysfs_remove_group(&led_array[i].cdev.dev->kobj,
&lpg_attr_group);
break;
case QPNP_ID_LED_MPP:
if (!led_array[i].mpp_cfg->pwm_cfg)
break;
if (led_array[i].mpp_cfg->pwm_cfg->mode == PWM_MODE)
sysfs_remove_group(&led_array[i].cdev.dev->\
kobj, &pwm_attr_group);
sysfs_remove_group(&led_array[i].cdev.dev->kobj,
&pwm_attr_group);
if (led_array[i].mpp_cfg->pwm_cfg->use_blink) {
sysfs_remove_group(&led_array[i].cdev.dev->\
kobj, &blink_attr_group);
sysfs_remove_group(&led_array[i].cdev.dev->\
kobj, &lpg_attr_group);
} else if (led_array[i].mpp_cfg->pwm_cfg->mode\
sysfs_remove_group(&led_array[i].cdev.dev->kobj,
&blink_attr_group);
sysfs_remove_group(&led_array[i].cdev.dev->kobj,
&lpg_attr_group);
} else if (led_array[i].mpp_cfg->pwm_cfg->mode
== LPG_MODE)
sysfs_remove_group(&led_array[i].cdev.dev->\
kobj, &lpg_attr_group);
sysfs_remove_group(&led_array[i].cdev.dev->kobj,
&lpg_attr_group);
if (led_array[i].mpp_cfg->mpp_reg)
regulator_put(led_array[i].mpp_cfg->mpp_reg);
break;
case QPNP_ID_KPDBL:
if (led_array[i].kpdbl_cfg->pwm_cfg->mode == PWM_MODE)
sysfs_remove_group(&led_array[i].cdev.dev->
kobj, &pwm_attr_group);
sysfs_remove_group(&led_array[i].cdev.dev->kobj,
&pwm_attr_group);
if (led_array[i].kpdbl_cfg->pwm_cfg->use_blink) {
sysfs_remove_group(&led_array[i].cdev.dev->
kobj, &blink_attr_group);
sysfs_remove_group(&led_array[i].cdev.dev->
kobj, &lpg_attr_group);
sysfs_remove_group(&led_array[i].cdev.dev->kobj,
&blink_attr_group);
sysfs_remove_group(&led_array[i].cdev.dev->kobj,
&lpg_attr_group);
} else if (led_array[i].kpdbl_cfg->pwm_cfg->mode
== LPG_MODE)
sysfs_remove_group(&led_array[i].cdev.dev->
kobj, &lpg_attr_group);
sysfs_remove_group(&led_array[i].cdev.dev->kobj,
&lpg_attr_group);
break;
default:
dev_err(&led_array->pdev->dev,
@ -4182,7 +4153,7 @@ static int qpnp_leds_remove(struct platform_device *pdev)
}
#ifdef CONFIG_OF
static struct of_device_id spmi_match_table[] = {
static const struct of_device_id spmi_match_table[] = {
{ .compatible = "qcom,leds-qpnp",},
{ },
};

View file

@ -5,20 +5,20 @@ config QPNP_REVID
tristate "QPNP Revision ID Peripheral"
depends on SPMI
help
Say 'y' here to include support for the Qualcomm QPNP REVID
peripheral. REVID prints out the PMIC type and revision numbers
in the kernel log along with the PMIC option status. The PMIC
type is mapped to a Qualcomm chip part number and logged as well.
Say 'y' here to include support for the Qualcomm Technologies, Inc.
QPNP REVID peripheral. REVID prints out the PMIC type and revision
numbers in the kernel log along with the PMIC option status. The PMIC
type is mapped to a QTI chip part number and logged as well.
config QPNP_COINCELL
tristate "Qualcomm QPNP coincell charger support"
tristate "QPNP coincell charger support"
depends on SPMI
help
This driver supports the QPNP coincell peripheral found inside of
Qualcomm QPNP PMIC devices. The coincell charger provides a means to
charge a coincell battery or backup capacitor which is used to
maintain PMIC register state when the main battery is removed from the
mobile device.
Qualcomm Technologies, Inc. QPNP PMIC devices. The coincell charger
provides a means to charge a coincell battery or backup capacitor
which is used to maintain PMIC register state when the main battery is
removed from the mobile device.
config SPS
bool "SPS support"

View file

@ -1,4 +1,4 @@
/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
/* Copyright (c) 2013-2015, 2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -244,7 +244,7 @@ static int qpnp_coincell_remove(struct platform_device *pdev)
return 0;
}
static struct of_device_id qpnp_coincell_match_table[] = {
static const struct of_device_id qpnp_coincell_match_table[] = {
{ .compatible = QPNP_COINCELL_DRIVER_NAME, },
{}
};

View file

@ -1,4 +1,4 @@
/* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
/* Copyright (c) 2013-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -70,7 +70,7 @@ struct revid_chip {
static LIST_HEAD(revid_chips);
static DEFINE_MUTEX(revid_chips_lock);
static struct of_device_id qpnp_revid_match_table[] = {
static const struct of_device_id qpnp_revid_match_table[] = {
{ .compatible = QPNP_REVID_DEV_NAME },
{}
};

View file

@ -310,13 +310,14 @@ config PWM_RCAR
will be called pwm-rcar.
config PWM_QPNP
tristate "Qualcomm Technologies, Inc. QPNP LPG/PWM support"
depends on SPMI
tristate "Qualcomm QPNP LPG/PWM support"
help
This driver supports PWM/LPG devices in Qualcomm PMIC chips which
comply with QPNP. QPNP is a SPMI based PMIC implementation. These
devices support Pulse Width Modulation output with user generated
patterns. They share a lookup table with size of 64 entries.
This driver supports PWM/LPG devices in Qualcomm Technologies, Inc.
PMIC chips which comply with QPNP. QPNP is an SPMI based PMIC
implementation. These devices support Pulse Width Modulation output
with user generated patterns. They share a lookup table with size of
64 entries.
config PWM_RENESAS_TPU
tristate "Renesas TPU PWM support"

View file

@ -1,4 +1,4 @@
/* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.
/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -10,7 +10,7 @@
* GNU General Public License for more details.
*/
/*
* Qualcomm QPNP Pulse Width Modulation (PWM) driver
* Qualcomm Technologies, Inc. QPNP Pulse Width Modulation (PWM) driver
*
* The HW module is also called LPG (Light Pattern Generator).
*/
@ -382,6 +382,7 @@ static int qpnp_set_control(struct qpnp_pwm_chip *chip, bool pwm_hi,
bool pwm_lo, bool pwm_out, bool pwm_src, bool ramp_gen)
{
int value;
value = (ramp_gen << QPNP_PWM_EN_RAMP_GEN_SHIFT) |
(pwm_src << QPNP_PWM_SRC_SELECT_SHIFT) |
(pwm_lo << QPNP_EN_PWM_LO_SHIFT) |
@ -476,7 +477,7 @@ static void qpnp_lpg_calc_period(enum time_level tm_lvl,
n = 6;
if (tm_lvl == LVL_USEC) {
if (period_value < ((unsigned)(-1) / NSEC_PER_USEC)) {
if (period_value < ((unsigned int)(-1) / NSEC_PER_USEC)) {
period_n = (period_value * NSEC_PER_USEC) >> n;
} else {
if (supported_sizes == QPNP_PWM_SIZE_7_8_BIT)
@ -499,7 +500,7 @@ static void qpnp_lpg_calc_period(enum time_level tm_lvl,
chip->channel_id, n);
}
min_err = last_err = (unsigned)(-1);
min_err = last_err = (unsigned int)(-1);
best_m = 0;
best_clk = 0;
best_div = 0;
@ -1233,7 +1234,7 @@ static int _pwm_config(struct qpnp_pwm_chip *chip,
}
pr_debug("duty/period=%u/%u %s: pwm_value=%d (of %d)\n",
(unsigned)duty_value, (unsigned)period_value,
(unsigned int)duty_value, (unsigned int)period_value,
(tm_lvl == LVL_USEC) ? "usec" : "nsec",
pwm_config->pwm_value, 1 << period->pwm_size);
@ -1320,8 +1321,7 @@ static int _pwm_enable(struct qpnp_pwm_chip *chip)
chip->flags & QPNP_PWM_LUT_NOT_SUPPORTED) {
rc = qpnp_lpg_configure_pwm_state(chip, QPNP_PWM_ENABLE);
} else if (!(chip->flags & QPNP_PWM_LUT_NOT_SUPPORTED)) {
rc = qpnp_lpg_configure_lut_state(chip,
QPNP_LUT_ENABLE);
rc = qpnp_lpg_configure_lut_state(chip, QPNP_LUT_ENABLE);
}
if (!rc)
@ -1368,7 +1368,7 @@ static int qpnp_pwm_config(struct pwm_chip *pwm_chip,
struct qpnp_pwm_chip *chip = qpnp_pwm_from_pwm_chip(pwm_chip);
int prev_period_us = chip->pwm_config.pwm_period;
if ((unsigned)period_ns < PM_PWM_PERIOD_MIN * NSEC_PER_USEC) {
if ((unsigned int)period_ns < PM_PWM_PERIOD_MIN * NSEC_PER_USEC) {
pr_err("Invalid pwm handle or parameters\n");
return -EINVAL;
}
@ -1403,6 +1403,7 @@ static int qpnp_pwm_enable(struct pwm_chip *pwm_chip,
{
int rc;
struct qpnp_pwm_chip *chip = qpnp_pwm_from_pwm_chip(pwm_chip);
rc = _pwm_enable(chip);
if (rc)
pr_err("Failed to enable PWM channel: %d\n", chip->channel_id);
@ -1487,7 +1488,7 @@ int pwm_change_mode(struct pwm_device *pwm, enum pm_pwm_mode mode)
return rc;
}
EXPORT_SYMBOL_GPL(pwm_change_mode);
EXPORT_SYMBOL(pwm_change_mode);
/**
* pwm_config_period - change PWM period
@ -1592,7 +1593,7 @@ out_unlock:
spin_unlock_irqrestore(&chip->lpg_lock, flags);
return rc;
}
EXPORT_SYMBOL_GPL(pwm_config_pwm_value);
EXPORT_SYMBOL(pwm_config_pwm_value);
/**
* pwm_config_us - change a PWM device configuration
@ -1608,8 +1609,8 @@ int pwm_config_us(struct pwm_device *pwm, int duty_us, int period_us)
if (pwm == NULL || IS_ERR(pwm) ||
duty_us > period_us ||
(unsigned)period_us > PM_PWM_PERIOD_MAX ||
(unsigned)period_us < PM_PWM_PERIOD_MIN) {
(unsigned int)period_us > PM_PWM_PERIOD_MAX ||
(unsigned int)period_us < PM_PWM_PERIOD_MIN) {
pr_err("Invalid pwm handle or parameters\n");
return -EINVAL;
}
@ -1622,10 +1623,11 @@ int pwm_config_us(struct pwm_device *pwm, int duty_us, int period_us)
qpnp_lpg_calc_period(LVL_USEC, period_us, chip);
qpnp_lpg_save_period(chip);
chip->pwm_config.pwm_period = period_us;
if ((unsigned)period_us > (unsigned)(-1) / NSEC_PER_USEC)
if ((unsigned int)period_us >
(unsigned int)(-1) / NSEC_PER_USEC)
pwm->period = 0;
else
pwm->period = (unsigned)period_us * NSEC_PER_USEC;
pwm->period = (unsigned int)period_us * NSEC_PER_USEC;
}
rc = _pwm_config(chip, LVL_USEC, duty_us, period_us);
@ -1679,8 +1681,8 @@ int pwm_lut_config(struct pwm_device *pwm, int period_us,
return -EINVAL;
}
if ((unsigned)period_us > PM_PWM_PERIOD_MAX ||
(unsigned)period_us < PM_PWM_PERIOD_MIN) {
if ((unsigned int)period_us > PM_PWM_PERIOD_MAX ||
(unsigned int)period_us < PM_PWM_PERIOD_MIN) {
pr_err("Period out of range\n");
return -EINVAL;
}
@ -1702,7 +1704,7 @@ int pwm_lut_config(struct pwm_device *pwm, int period_us,
return rc;
}
EXPORT_SYMBOL_GPL(pwm_lut_config);
EXPORT_SYMBOL(pwm_lut_config);
static int qpnp_parse_pwm_dt_config(struct device_node *of_pwm_node,
struct device_node *of_parent, struct qpnp_pwm_chip *chip)
@ -1738,14 +1740,6 @@ static int qpnp_parse_pwm_dt_config(struct device_node *of_pwm_node,
return rc;
}
#define qpnp_check_optional_dt_bindings(func) \
do { \
rc = func; \
if (rc && rc != -EINVAL) \
goto out; \
rc = 0; \
} while (0)
static int qpnp_parse_lpg_dt_config(struct device_node *of_lpg_node,
struct device_node *of_parent, struct qpnp_pwm_chip *chip)
{
@ -1778,44 +1772,58 @@ static int qpnp_parse_lpg_dt_config(struct device_node *of_lpg_node,
return -EINVAL;
}
duty_pct_list = kzalloc(sizeof(u32) * list_size, GFP_KERNEL);
if (!duty_pct_list) {
pr_err("kzalloc failed on duty_pct_list\n");
duty_pct_list = kcalloc(list_size, sizeof(*duty_pct_list), GFP_KERNEL);
if (!duty_pct_list)
return -ENOMEM;
}
rc = of_property_read_u32_array(of_lpg_node, "qcom,duty-percents",
duty_pct_list, list_size);
if (rc) {
pr_err("invalid or missing property:\n");
pr_err("qcom,duty-pcts-list\n");
kfree(duty_pct_list);
return rc;
pr_err("invalid or missing property: qcom,duty-pcts-list\n");
goto out;
}
/* Read optional properties */
qpnp_check_optional_dt_bindings(of_property_read_u32(of_lpg_node,
"qcom,ramp-step-duration", &lut_config->ramp_step_ms));
qpnp_check_optional_dt_bindings(of_property_read_u32(of_lpg_node,
"qcom,lpg-lut-pause-hi", &lut_config->lut_pause_hi_cnt));
qpnp_check_optional_dt_bindings(of_property_read_u32(of_lpg_node,
"qcom,lpg-lut-pause-lo", &lut_config->lut_pause_lo_cnt));
qpnp_check_optional_dt_bindings(of_property_read_u32(of_lpg_node,
"qcom,lpg-lut-ramp-direction",
(u32 *)&lut_config->ramp_direction));
qpnp_check_optional_dt_bindings(of_property_read_u32(of_lpg_node,
"qcom,lpg-lut-pattern-repeat",
(u32 *)&lut_config->pattern_repeat));
qpnp_check_optional_dt_bindings(of_property_read_u32(of_lpg_node,
"qcom,lpg-lut-ramp-toggle",
(u32 *)&lut_config->ramp_toggle));
qpnp_check_optional_dt_bindings(of_property_read_u32(of_lpg_node,
"qcom,lpg-lut-enable-pause-hi",
(u32 *)&lut_config->enable_pause_hi));
qpnp_check_optional_dt_bindings(of_property_read_u32(of_lpg_node,
"qcom,lpg-lut-enable-pause-lo",
(u32 *)&lut_config->enable_pause_lo));
rc = of_property_read_u32(of_lpg_node, "qcom,ramp-step-duration",
&lut_config->ramp_step_ms);
if (rc && rc != -EINVAL)
goto out;
rc = of_property_read_u32(of_lpg_node, "qcom,lpg-lut-pause-hi",
&lut_config->lut_pause_hi_cnt);
if (rc && rc != -EINVAL)
goto out;
rc = of_property_read_u32(of_lpg_node, "qcom,lpg-lut-pause-lo",
&lut_config->lut_pause_lo_cnt);
if (rc && rc != -EINVAL)
goto out;
rc = of_property_read_u32(of_lpg_node, "qcom,lpg-lut-ramp-direction",
(u32 *)&lut_config->ramp_direction);
if (rc && rc != -EINVAL)
goto out;
rc = of_property_read_u32(of_lpg_node, "qcom,lpg-lut-pattern-repeat",
(u32 *)&lut_config->pattern_repeat);
if (rc && rc != -EINVAL)
goto out;
rc = of_property_read_u32(of_lpg_node, "qcom,lpg-lut-ramp-toggle",
(u32 *)&lut_config->ramp_toggle);
if (rc && rc != -EINVAL)
goto out;
rc = of_property_read_u32(of_lpg_node, "qcom,lpg-lut-enable-pause-hi",
(u32 *)&lut_config->enable_pause_hi);
if (rc && rc != -EINVAL)
goto out;
rc = of_property_read_u32(of_lpg_node, "qcom,lpg-lut-enable-pause-lo",
(u32 *)&lut_config->enable_pause_lo);
if (rc && rc != -EINVAL)
goto out;
rc = 0;
qpnp_set_lut_params(&lut_params, lut_config, start_idx, list_size);
@ -1877,7 +1885,7 @@ static int qpnp_parse_dt_config(struct platform_device *pdev,
struct qpnp_pwm_chip *chip)
{
int rc, enable, lut_entry_size, list_size, i;
const char *lable;
const char *label;
const __be32 *prop;
u32 size;
struct device_node *node;
@ -1992,12 +2000,10 @@ static int qpnp_parse_dt_config(struct platform_device *pdev,
lut_entry_size = sizeof(u8);
}
lut_config->duty_pct_list = kzalloc(lpg_config->lut_size *
lut_config->duty_pct_list = kcalloc(lpg_config->lut_size,
lut_entry_size, GFP_KERNEL);
if (!lut_config->duty_pct_list) {
pr_err("can not allocate duty pct list\n");
if (!lut_config->duty_pct_list)
return -ENOMEM;
}
rc = of_property_read_u32(of_node, "qcom,ramp-index",
&lut_config->ramp_index);
@ -2038,18 +2044,18 @@ static int qpnp_parse_dt_config(struct platform_device *pdev,
}
for_each_child_of_node(of_node, node) {
rc = of_property_read_string(node, "label", &lable);
rc = of_property_read_string(node, "label", &label);
if (rc) {
dev_err(&pdev->dev, "%s: Missing lable property\n",
dev_err(&pdev->dev, "%s: Missing label property\n",
__func__);
goto out;
}
if (!strncmp(lable, "pwm", 3)) {
if (!strcmp(label, "pwm")) {
rc = qpnp_parse_pwm_dt_config(node, of_node, chip);
if (rc)
goto out;
found_pwm_subnode = 1;
} else if (!strncmp(lable, "lpg", 3) &&
} else if (!strcmp(label, "lpg") &&
!(chip->flags & QPNP_PWM_LUT_NOT_SUPPORTED)) {
rc = qpnp_parse_lpg_dt_config(node, of_node, chip);
if (rc)
@ -2102,10 +2108,9 @@ static int qpnp_pwm_probe(struct platform_device *pdev)
int rc;
pwm_chip = kzalloc(sizeof(*pwm_chip), GFP_KERNEL);
if (pwm_chip == NULL) {
pr_err("kzalloc() failed.\n");
if (pwm_chip == NULL)
return -ENOMEM;
}
pwm_chip->regmap = dev_get_regmap(pdev->dev.parent, NULL);
if (!pwm_chip->regmap) {
dev_err(&pdev->dev, "Couldn't get parent's regmap\n");
@ -2169,7 +2174,7 @@ static int qpnp_pwm_remove(struct platform_device *pdev)
return 0;
}
static struct of_device_id spmi_match_table[] = {
static const struct of_device_id spmi_match_table[] = {
{ .compatible = QPNP_LPG_DRIVER_NAME, },
{}
};

View file

@ -807,13 +807,14 @@ config REGULATOR_RPM_SMD
application processor over SMD.
config REGULATOR_QPNP
tristate "Qualcomm Technologies, Inc. QPNP regulator support"
depends on SPMI
tristate "Qualcomm QPNP regulator support"
help
This driver supports voltage regulators in Qualcomm PMIC chips which
comply with QPNP. QPNP is a SPMI based PMIC implementation. These
chips provide several different varieties of LDO and switching
regulators. They also provide voltage switches and boost regulators.
This driver supports voltage regulators in Qualcomm Technologies, Inc.
PMIC chips which comply with QPNP. QPNP is a SPMI based PMIC
implementation. These chips provide several different varieties of
LDO and switching regulators. They also provide voltage switches and
boost regulators.
config REGULATOR_QPNP_LABIBB
depends on SPMI
@ -950,19 +951,18 @@ config REGULATOR_KRYO
depends on OF
help
Some MSM designs have CPUs that can be directly powered from a common
voltage rail via a Block Head Switch (BHS) or an LDO whose output voltage
can be configured for use when certain power constraints are met.
Say yes to support management of LDO and BHS modes for the clusters in the
CPU subsystem.
voltage rail via a Block Head Switch (BHS) or an LDO whose output
voltage can be configured for use when certain power constraints are
met. Say yes to support management of LDO and BHS modes for the
clusters in the CPU subsystem.
config REGULATOR_MEM_ACC
tristate "QTI Memory accelerator regulator driver"
help
Say y here to enable the memory accelerator driver for Qualcomm
Technologies (QTI) chips. The accelerator controls delays applied
for memory accesses.
This driver configures the power-mode (corner) for the memory
accelerator.
Technologies, Inc. (QTI) chips. The accelerator controls delays
applied for memory accesses. This driver configures the power-mode
(corner) for the memory accelerator.
config REGULATOR_PROXY_CONSUMER
bool "Boot time regulator proxy consumer support"

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -1675,7 +1675,7 @@ static int cpr3_hmss_regulator_resume(struct platform_device *pdev)
}
/* Data corresponds to the SoC revision */
static struct of_device_id cpr_regulator_match_table[] = {
static const struct of_device_id cpr_regulator_match_table[] = {
{
.compatible = "qcom,cpr3-msm8996-v1-hmss-regulator",
.data = (void *)(uintptr_t)1

View file

@ -1088,7 +1088,7 @@ static int cpr3_mmss_regulator_resume(struct platform_device *pdev)
}
/* Data corresponds to the SoC revision */
static struct of_device_id cpr_regulator_match_table[] = {
static const struct of_device_id cpr_regulator_match_table[] = {
{
.compatible = "qcom,cpr3-msm8996-v1-mmss-regulator",
.data = (void *)(uintptr_t)1,

View file

@ -1622,8 +1622,6 @@ static void cpr3_regulator_set_target_quot(struct cpr3_thread *thread)
}
thread->last_closed_loop_aggr_corner = thread->aggr_corner;
return;
}
/**
@ -1647,7 +1645,7 @@ static void cpr3_update_vreg_closed_loop_volt(struct cpr3_regulator *vreg,
if (vreg->last_closed_loop_corner == CPR3_REGULATOR_CORNER_INVALID)
return;
else
corner = &vreg->corner[vreg->last_closed_loop_corner];
if (vreg->thread->last_closed_loop_aggr_corner.ro_mask
@ -4195,7 +4193,7 @@ static int cpr3_regulator_update_ctrl_state(struct cpr3_controller *ctrl)
* Return: 0 on success, errno on failure
*/
static int cpr3_regulator_set_voltage(struct regulator_dev *rdev,
int corner, int corner_max, unsigned *selector)
int corner, int corner_max, unsigned int *selector)
{
struct cpr3_regulator *vreg = rdev_get_drvdata(rdev);
struct cpr3_controller *ctrl = vreg->thread->ctrl;
@ -4264,7 +4262,7 @@ static int cpr3_regulator_get_voltage(struct regulator_dev *rdev)
* Return: voltage corner value offset by CPR3_CORNER_OFFSET
*/
static int cpr3_regulator_list_voltage(struct regulator_dev *rdev,
unsigned selector)
unsigned int selector)
{
struct cpr3_regulator *vreg = rdev_get_drvdata(rdev);
@ -4964,11 +4962,11 @@ static struct dentry *debugfs_create_int(const char *name, umode_t mode,
struct dentry *parent, int *value)
{
/* if there are no write bits set, make read only */
if (!(mode & S_IWUGO))
if (!(mode & 0222))
return debugfs_create_file(name, mode, parent, value,
&fops_int_ro);
/* if there are no read bits set, make write only */
if (!(mode & S_IRUGO))
if (!(mode & 0444))
return debugfs_create_file(name, mode, parent, value,
&fops_int_wo);
@ -5225,21 +5223,21 @@ static void cpr3_regulator_debugfs_corner_add(struct cpr3_regulator *vreg,
struct cpr3_debug_corner_info *info;
struct dentry *temp;
temp = cpr3_debugfs_create_corner_int(vreg, "floor_volt", S_IRUGO,
temp = cpr3_debugfs_create_corner_int(vreg, "floor_volt", 0444,
corner_dir, index, offsetof(struct cpr3_corner, floor_volt));
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(vreg, "floor_volt debugfs file creation failed\n");
return;
}
temp = cpr3_debugfs_create_corner_int(vreg, "ceiling_volt", S_IRUGO,
temp = cpr3_debugfs_create_corner_int(vreg, "ceiling_volt", 0444,
corner_dir, index, offsetof(struct cpr3_corner, ceiling_volt));
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(vreg, "ceiling_volt debugfs file creation failed\n");
return;
}
temp = cpr3_debugfs_create_corner_int(vreg, "open_loop_volt", S_IRUGO,
temp = cpr3_debugfs_create_corner_int(vreg, "open_loop_volt", 0444,
corner_dir, index,
offsetof(struct cpr3_corner, open_loop_volt));
if (IS_ERR_OR_NULL(temp)) {
@ -5247,7 +5245,7 @@ static void cpr3_regulator_debugfs_corner_add(struct cpr3_regulator *vreg,
return;
}
temp = cpr3_debugfs_create_corner_int(vreg, "last_volt", S_IRUGO,
temp = cpr3_debugfs_create_corner_int(vreg, "last_volt", 0444,
corner_dir, index, offsetof(struct cpr3_corner, last_volt));
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(vreg, "last_volt debugfs file creation failed\n");
@ -5262,8 +5260,8 @@ static void cpr3_regulator_debugfs_corner_add(struct cpr3_regulator *vreg,
info->index = index;
info->corner = vreg->corner;
temp = debugfs_create_file("target_quots", S_IRUGO, corner_dir,
info, &cpr3_debug_quot_fops);
temp = debugfs_create_file("target_quots", 0444, corner_dir, info,
&cpr3_debug_quot_fops);
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(vreg, "target_quots debugfs file creation failed\n");
return;
@ -5361,21 +5359,21 @@ static void cpr3_regulator_debugfs_vreg_add(struct cpr3_regulator *vreg,
return;
}
temp = debugfs_create_int("speed_bin_fuse", S_IRUGO, vreg_dir,
temp = debugfs_create_int("speed_bin_fuse", 0444, vreg_dir,
&vreg->speed_bin_fuse);
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(vreg, "speed_bin_fuse debugfs file creation failed\n");
return;
}
temp = debugfs_create_int("cpr_rev_fuse", S_IRUGO, vreg_dir,
temp = debugfs_create_int("cpr_rev_fuse", 0444, vreg_dir,
&vreg->cpr_rev_fuse);
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(vreg, "cpr_rev_fuse debugfs file creation failed\n");
return;
}
temp = debugfs_create_int("fuse_combo", S_IRUGO, vreg_dir,
temp = debugfs_create_int("fuse_combo", 0444, vreg_dir,
&vreg->fuse_combo);
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(vreg, "fuse_combo debugfs file creation failed\n");
@ -5383,15 +5381,15 @@ static void cpr3_regulator_debugfs_vreg_add(struct cpr3_regulator *vreg,
}
if (vreg->ldo_regulator) {
temp = debugfs_create_file("ldo_mode", S_IRUGO, vreg_dir,
vreg, &cpr3_debug_ldo_mode_fops);
temp = debugfs_create_file("ldo_mode", 0444, vreg_dir, vreg,
&cpr3_debug_ldo_mode_fops);
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(vreg, "ldo_mode debugfs file creation failed\n");
return;
}
temp = debugfs_create_file("ldo_mode_allowed",
S_IRUGO | S_IWUSR, vreg_dir, vreg,
0644, vreg_dir, vreg,
&cpr3_debug_ldo_mode_allowed_fops);
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(vreg, "ldo_mode_allowed debugfs file creation failed\n");
@ -5399,7 +5397,7 @@ static void cpr3_regulator_debugfs_vreg_add(struct cpr3_regulator *vreg,
}
}
temp = debugfs_create_int("corner_count", S_IRUGO, vreg_dir,
temp = debugfs_create_int("corner_count", 0444, vreg_dir,
&vreg->corner_count);
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(vreg, "corner_count debugfs file creation failed\n");
@ -5412,8 +5410,8 @@ static void cpr3_regulator_debugfs_vreg_add(struct cpr3_regulator *vreg,
return;
}
temp = debugfs_create_file("index", S_IRUGO | S_IWUSR, corner_dir,
vreg, &cpr3_debug_corner_index_fops);
temp = debugfs_create_file("index", 0644, corner_dir, vreg,
&cpr3_debug_corner_index_fops);
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(vreg, "index debugfs file creation failed\n");
return;
@ -5428,8 +5426,8 @@ static void cpr3_regulator_debugfs_vreg_add(struct cpr3_regulator *vreg,
return;
}
temp = debugfs_create_file("index", S_IRUGO, corner_dir,
vreg, &cpr3_debug_current_corner_index_fops);
temp = debugfs_create_file("index", 0444, corner_dir, vreg,
&cpr3_debug_current_corner_index_fops);
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(vreg, "index debugfs file creation failed\n");
return;
@ -5470,7 +5468,7 @@ static void cpr3_regulator_debugfs_thread_add(struct cpr3_thread *thread)
return;
}
temp = debugfs_create_int("floor_volt", S_IRUGO, aggr_dir,
temp = debugfs_create_int("floor_volt", 0444, aggr_dir,
&thread->aggr_corner.floor_volt);
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(ctrl, "thread %u aggr floor_volt debugfs file creation failed\n",
@ -5478,7 +5476,7 @@ static void cpr3_regulator_debugfs_thread_add(struct cpr3_thread *thread)
return;
}
temp = debugfs_create_int("ceiling_volt", S_IRUGO, aggr_dir,
temp = debugfs_create_int("ceiling_volt", 0444, aggr_dir,
&thread->aggr_corner.ceiling_volt);
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(ctrl, "thread %u aggr ceiling_volt debugfs file creation failed\n",
@ -5486,7 +5484,7 @@ static void cpr3_regulator_debugfs_thread_add(struct cpr3_thread *thread)
return;
}
temp = debugfs_create_int("open_loop_volt", S_IRUGO, aggr_dir,
temp = debugfs_create_int("open_loop_volt", 0444, aggr_dir,
&thread->aggr_corner.open_loop_volt);
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(ctrl, "thread %u aggr open_loop_volt debugfs file creation failed\n",
@ -5494,7 +5492,7 @@ static void cpr3_regulator_debugfs_thread_add(struct cpr3_thread *thread)
return;
}
temp = debugfs_create_int("last_volt", S_IRUGO, aggr_dir,
temp = debugfs_create_int("last_volt", 0444, aggr_dir,
&thread->aggr_corner.last_volt);
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(ctrl, "thread %u aggr last_volt debugfs file creation failed\n",
@ -5511,8 +5509,8 @@ static void cpr3_regulator_debugfs_thread_add(struct cpr3_thread *thread)
info->index = index;
info->corner = &thread->aggr_corner;
temp = debugfs_create_file("target_quots", S_IRUGO, aggr_dir,
info, &cpr3_debug_quot_fops);
temp = debugfs_create_file("target_quots", 0444, aggr_dir, info,
&cpr3_debug_quot_fops);
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(ctrl, "thread %u target_quots debugfs file creation failed\n",
thread->thread_id);
@ -5869,7 +5867,7 @@ static void cpr3_regulator_debugfs_ctrl_add(struct cpr3_controller *ctrl)
return;
}
temp = debugfs_create_file("cpr_closed_loop_enable", S_IRUGO | S_IWUSR,
temp = debugfs_create_file("cpr_closed_loop_enable", 0644,
ctrl->debugfs, ctrl,
&cpr3_debug_closed_loop_enable_fops);
if (IS_ERR_OR_NULL(temp)) {
@ -5878,8 +5876,8 @@ static void cpr3_regulator_debugfs_ctrl_add(struct cpr3_controller *ctrl)
}
if (ctrl->supports_hw_closed_loop) {
temp = debugfs_create_file("use_hw_closed_loop",
S_IRUGO | S_IWUSR, ctrl->debugfs, ctrl,
temp = debugfs_create_file("use_hw_closed_loop", 0644,
ctrl->debugfs, ctrl,
&cpr3_debug_hw_closed_loop_enable_fops);
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(ctrl, "use_hw_closed_loop debugfs file creation failed\n");
@ -5887,7 +5885,7 @@ static void cpr3_regulator_debugfs_ctrl_add(struct cpr3_controller *ctrl)
}
}
temp = debugfs_create_int("thread_count", S_IRUGO, ctrl->debugfs,
temp = debugfs_create_int("thread_count", 0444, ctrl->debugfs,
&ctrl->thread_count);
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(ctrl, "thread_count debugfs file creation failed\n");
@ -5895,7 +5893,7 @@ static void cpr3_regulator_debugfs_ctrl_add(struct cpr3_controller *ctrl)
}
if (ctrl->apm) {
temp = debugfs_create_int("apm_threshold_volt", S_IRUGO,
temp = debugfs_create_int("apm_threshold_volt", 0444,
ctrl->debugfs, &ctrl->apm_threshold_volt);
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(ctrl, "apm_threshold_volt debugfs file creation failed\n");
@ -5905,28 +5903,28 @@ static void cpr3_regulator_debugfs_ctrl_add(struct cpr3_controller *ctrl)
if (ctrl->aging_required || ctrl->aging_succeeded
|| ctrl->aging_failed) {
temp = debugfs_create_int("aging_adj_volt", S_IRUGO,
temp = debugfs_create_int("aging_adj_volt", 0444,
ctrl->debugfs, &ctrl->aging_ref_adjust_volt);
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(ctrl, "aging_adj_volt debugfs file creation failed\n");
return;
}
temp = debugfs_create_file("aging_succeeded", S_IRUGO,
temp = debugfs_create_file("aging_succeeded", 0444,
ctrl->debugfs, &ctrl->aging_succeeded, &fops_bool_ro);
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(ctrl, "aging_succeeded debugfs file creation failed\n");
return;
}
temp = debugfs_create_file("aging_failed", S_IRUGO,
temp = debugfs_create_file("aging_failed", 0444,
ctrl->debugfs, &ctrl->aging_failed, &fops_bool_ro);
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(ctrl, "aging_failed debugfs file creation failed\n");
return;
}
temp = debugfs_create_file("aging_trigger", S_IWUSR,
temp = debugfs_create_file("aging_trigger", 0200,
ctrl->debugfs, ctrl,
&cpr3_debug_trigger_aging_measurement_fops);
if (IS_ERR_OR_NULL(temp)) {
@ -5941,28 +5939,28 @@ static void cpr3_regulator_debugfs_ctrl_add(struct cpr3_controller *ctrl)
return;
}
temp = debugfs_create_int("floor_volt", S_IRUGO, aggr_dir,
temp = debugfs_create_int("floor_volt", 0444, aggr_dir,
&ctrl->aggr_corner.floor_volt);
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(ctrl, "aggr floor_volt debugfs file creation failed\n");
return;
}
temp = debugfs_create_int("ceiling_volt", S_IRUGO, aggr_dir,
temp = debugfs_create_int("ceiling_volt", 0444, aggr_dir,
&ctrl->aggr_corner.ceiling_volt);
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(ctrl, "aggr ceiling_volt debugfs file creation failed\n");
return;
}
temp = debugfs_create_int("open_loop_volt", S_IRUGO, aggr_dir,
temp = debugfs_create_int("open_loop_volt", 0444, aggr_dir,
&ctrl->aggr_corner.open_loop_volt);
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(ctrl, "aggr open_loop_volt debugfs file creation failed\n");
return;
}
temp = debugfs_create_int("last_volt", S_IRUGO, aggr_dir,
temp = debugfs_create_int("last_volt", 0444, aggr_dir,
&ctrl->aggr_corner.last_volt);
if (IS_ERR_OR_NULL(temp)) {
cpr3_err(ctrl, "aggr last_volt debugfs file creation failed\n");

View file

@ -36,9 +36,9 @@ struct cpr3_thread;
* from 0 to 63. bit_start must be less than or equal to bit_end.
*/
struct cpr3_fuse_param {
unsigned row;
unsigned bit_start;
unsigned bit_end;
unsigned int row;
unsigned int bit_start;
unsigned int bit_end;
};
/* Each CPR3 sensor has 16 ring oscillators */
@ -1021,7 +1021,6 @@ static inline int cpr3_limit_open_loop_voltages(struct cpr3_regulator *vreg)
static inline void cpr3_open_loop_voltage_as_ceiling(
struct cpr3_regulator *vreg)
{
return;
}
static inline int cpr3_limit_floor_voltages(struct cpr3_regulator *vreg)
@ -1031,7 +1030,6 @@ static inline int cpr3_limit_floor_voltages(struct cpr3_regulator *vreg)
static inline void cpr3_print_quots(struct cpr3_regulator *vreg)
{
return;
}
static inline int cpr3_adjust_fused_open_loop_voltages(

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -1402,7 +1402,7 @@ static int cpr4_apss_regulator_remove(struct platform_device *pdev)
return cpr3_regulator_unregister(ctrl);
}
static struct of_device_id cpr4_regulator_match_table[] = {
static const struct of_device_id cpr4_regulator_match_table[] = {
{ .compatible = "qcom,cpr4-msm8953-apss-regulator", },
{}
};

View file

@ -2007,7 +2007,7 @@ static int cprh_kbss_regulator_resume(struct platform_device *pdev)
}
/* Data corresponds to the SoC revision */
static struct of_device_id cprh_regulator_match_table[] = {
static const struct of_device_id cprh_regulator_match_table[] = {
{
.compatible = "qcom,cprh-msm8998-v1-kbss-regulator",
.data = (void *)(uintptr_t)MSM8998_V1_SOC_ID,

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -333,7 +333,7 @@ static int kryo_regulator_is_enabled(struct regulator_dev *rdev)
}
static int kryo_regulator_set_voltage(struct regulator_dev *rdev,
int min_volt, int max_volt, unsigned *selector)
int min_volt, int max_volt, unsigned int *selector)
{
struct kryo_regulator *kvreg = rdev_get_drvdata(rdev);
int rc;
@ -400,7 +400,7 @@ static int kryo_regulator_get_bypass(struct regulator_dev *rdev,
}
static int kryo_regulator_list_voltage(struct regulator_dev *rdev,
unsigned selector)
unsigned int selector)
{
struct kryo_regulator *kvreg = rdev_get_drvdata(rdev);
@ -411,7 +411,7 @@ static int kryo_regulator_list_voltage(struct regulator_dev *rdev,
}
static int kryo_regulator_retention_set_voltage(struct regulator_dev *rdev,
int min_volt, int max_volt, unsigned *selector)
int min_volt, int max_volt, unsigned int *selector)
{
struct kryo_regulator *kvreg = rdev_get_drvdata(rdev);
int rc;
@ -499,7 +499,7 @@ static int kryo_regulator_retention_get_bypass(struct regulator_dev *rdev,
}
static int kryo_regulator_retention_list_voltage(struct regulator_dev *rdev,
unsigned selector)
unsigned int selector)
{
struct kryo_regulator *kvreg = rdev_get_drvdata(rdev);
@ -624,7 +624,7 @@ static void kryo_debugfs_init(struct kryo_regulator *kvreg)
return;
}
temp = debugfs_create_file("mode", S_IRUGO, kvreg->debugfs,
temp = debugfs_create_file("mode", 0444, kvreg->debugfs,
kvreg, &kryo_dbg_mode_fops);
if (IS_ERR_OR_NULL(temp)) {
@ -989,10 +989,8 @@ static int kryo_regulator_probe(struct platform_device *pdev)
init_data->constraints.input_uV = init_data->constraints.max_uV;
kvreg = devm_kzalloc(dev, sizeof(*kvreg), GFP_KERNEL);
if (!kvreg) {
dev_err(dev, "memory allocation failed\n");
if (!kvreg)
return -ENOMEM;
}
rc = kryo_regulator_init_data(pdev, kvreg);
if (rc) {
@ -1073,7 +1071,7 @@ static int kryo_regulator_remove(struct platform_device *pdev)
return 0;
}
static struct of_device_id kryo_regulator_match_table[] = {
static const struct of_device_id kryo_regulator_match_table[] = {
{ .compatible = "qcom,kryo-regulator", },
{}
};

View file

@ -1,4 +1,4 @@
/* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
/* Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -269,7 +269,7 @@ static void update_acc_reg(struct mem_acc_regulator *mem_acc_vreg, int corner)
}
static int mem_acc_regulator_set_voltage(struct regulator_dev *rdev,
int corner, int corner_max, unsigned *selector)
int corner, int corner_max, unsigned int *selector)
{
struct mem_acc_regulator *mem_acc_vreg = rdev_get_drvdata(rdev);
int i;
@ -333,10 +333,8 @@ static int __mem_acc_sel_init(struct mem_acc_regulator *mem_acc_vreg,
mem_acc_vreg->acc_sel_mask[mem_type] = devm_kzalloc(mem_acc_vreg->dev,
mem_acc_vreg->num_acc_sel[mem_type] * sizeof(u32), GFP_KERNEL);
if (!mem_acc_vreg->acc_sel_mask[mem_type]) {
pr_err("Unable to allocate memory for mem_type=%d\n", mem_type);
if (!mem_acc_vreg->acc_sel_mask[mem_type])
return -ENOMEM;
}
for (i = 0; i < mem_acc_vreg->num_acc_sel[mem_type]; i++) {
bit = mem_acc_vreg->acc_sel_bit_pos[mem_type][i];
@ -355,7 +353,7 @@ static int mem_acc_sel_init(struct mem_acc_regulator *mem_acc_vreg)
if (mem_acc_vreg->mem_acc_supported[i]) {
rc = __mem_acc_sel_init(mem_acc_vreg, i);
if (rc) {
pr_err("Unable to intialize mem_type=%d rc=%d\n",
pr_err("Unable to initialize mem_type=%d rc=%d\n",
i, rc);
return rc;
}
@ -523,16 +521,16 @@ static int mem_acc_custom_data_init(struct platform_device *pdev,
if (!res || !res->start) {
pr_debug("%s resource missing\n", custom_apc_addr_str);
return -EINVAL;
} else {
}
len = res->end - res->start + 1;
mem_acc_vreg->acc_custom_addr[mem_type] =
devm_ioremap(mem_acc_vreg->dev, res->start, len);
if (!mem_acc_vreg->acc_custom_addr[mem_type]) {
pr_err("Unable to map %s %pa\n", custom_apc_addr_str,
&res->start);
pr_err("Unable to map %s %pa\n",
custom_apc_addr_str, &res->start);
return -EINVAL;
}
}
rc = populate_acc_data(mem_acc_vreg, custom_apc_data_str,
&mem_acc_vreg->acc_custom_data[mem_type], &len);
@ -1190,7 +1188,7 @@ static int mem_acc_init(struct platform_device *pdev,
rc = mem_acc_sel_init(mem_acc_vreg);
if (rc) {
pr_err("Unable to intialize mem_acc_sel reg rc=%d\n", rc);
pr_err("Unable to initialize mem_acc_sel reg rc=%d\n", rc);
return rc;
}
@ -1307,19 +1305,16 @@ static int mem_acc_regulator_probe(struct platform_device *pdev)
if (!init_data) {
pr_err("regulator init data is missing\n");
return -EINVAL;
} else {
init_data->constraints.input_uV
= init_data->constraints.max_uV;
init_data->constraints.valid_ops_mask
|= REGULATOR_CHANGE_VOLTAGE;
}
init_data->constraints.input_uV = init_data->constraints.max_uV;
init_data->constraints.valid_ops_mask |= REGULATOR_CHANGE_VOLTAGE;
mem_acc_vreg = devm_kzalloc(&pdev->dev, sizeof(*mem_acc_vreg),
GFP_KERNEL);
if (!mem_acc_vreg) {
pr_err("Can't allocate mem_acc_vreg memory\n");
if (!mem_acc_vreg)
return -ENOMEM;
}
mem_acc_vreg->dev = &pdev->dev;
rc = mem_acc_init(pdev, mem_acc_vreg);
@ -1361,7 +1356,7 @@ static int mem_acc_regulator_remove(struct platform_device *pdev)
return 0;
}
static struct of_device_id mem_acc_regulator_match_table[] = {
static const struct of_device_id mem_acc_regulator_match_table[] = {
{ .compatible = "qcom,mem-acc-regulator", },
{}
};

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -95,9 +95,9 @@ enum voltage_handling {
};
struct fuse_param {
unsigned row;
unsigned bit_start;
unsigned bit_end;
unsigned int row;
unsigned int bit_start;
unsigned int bit_end;
};
struct ldo_config {
@ -665,7 +665,7 @@ static int switch_mode_to_bhs(struct msm_gfx_ldo *ldo_vreg)
}
static int msm_gfx_ldo_set_corner(struct regulator_dev *rdev,
int corner, int corner_max, unsigned *selector)
int corner, int corner_max, unsigned int *selector)
{
struct msm_gfx_ldo *ldo_vreg = rdev_get_drvdata(rdev);
int rc = 0, mem_acc_corner, new_uv;
@ -860,7 +860,7 @@ fail:
}
static int msm_gfx_ldo_set_voltage(struct regulator_dev *rdev,
int new_uv, int max_uv, unsigned *selector)
int new_uv, int max_uv, unsigned int *selector)
{
struct msm_gfx_ldo *ldo_vreg = rdev_get_drvdata(rdev);
int rc = 0;
@ -1444,22 +1444,22 @@ static void msm_gfx_ldo_debugfs_init(struct msm_gfx_ldo *ldo_vreg)
return;
}
temp = debugfs_create_file("debug_info", S_IRUGO, ldo_vreg->debugfs,
temp = debugfs_create_file("debug_info", 0444, ldo_vreg->debugfs,
ldo_vreg, &msm_gfx_ldo_debug_info_fops);
if (IS_ERR_OR_NULL(temp)) {
pr_err("debug_info node creation failed\n");
return;
}
temp = debugfs_create_file("ldo_voltage", S_IRUGO | S_IWUSR,
ldo_vreg->debugfs, ldo_vreg, &ldo_voltage_fops);
temp = debugfs_create_file("ldo_voltage", 0644, ldo_vreg->debugfs,
ldo_vreg, &ldo_voltage_fops);
if (IS_ERR_OR_NULL(temp)) {
pr_err("ldo_voltage node creation failed\n");
return;
}
temp = debugfs_create_file("ldo_mode_disable", S_IRUGO | S_IWUSR,
ldo_vreg->debugfs, ldo_vreg, &ldo_mode_disable_fops);
temp = debugfs_create_file("ldo_mode_disable", 0644, ldo_vreg->debugfs,
ldo_vreg, &ldo_mode_disable_fops);
if (IS_ERR_OR_NULL(temp)) {
pr_err("ldo_mode_disable node creation failed\n");
return;

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved.
* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -45,7 +45,7 @@ enum {
static int qpnp_vreg_debug_mask;
module_param_named(
debug_mask, qpnp_vreg_debug_mask, int, S_IRUSR | S_IWUSR
debug_mask, qpnp_vreg_debug_mask, int, 0600
);
#define vreg_err(vreg, fmt, ...) \
@ -302,7 +302,7 @@ struct qpnp_voltage_range {
int step_uV;
int set_point_min_uV;
int set_point_max_uV;
unsigned n_voltages;
unsigned int n_voltages;
u8 range_sel;
};
@ -313,7 +313,7 @@ struct qpnp_voltage_range {
struct qpnp_voltage_set_points {
struct qpnp_voltage_range *range;
int count;
unsigned n_voltages;
unsigned int n_voltages;
};
struct qpnp_regulator_mapping {
@ -381,7 +381,7 @@ struct qpnp_regulator {
{ \
.range = _ranges, \
.count = ARRAY_SIZE(_ranges), \
};
}
/*
* These tables contain the physically available PMIC regulator voltage setpoint
@ -730,7 +730,7 @@ static int qpnp_regulator_common_disable(struct regulator_dev *rdev)
*/
static int qpnp_regulator_select_voltage_same_range(struct qpnp_regulator *vreg,
int min_uV, int max_uV, int *range_sel, int *voltage_sel,
unsigned *selector)
unsigned int *selector)
{
struct qpnp_voltage_range *range = NULL;
int uV = min_uV;
@ -781,9 +781,9 @@ static int qpnp_regulator_select_voltage_same_range(struct qpnp_regulator *vreg,
(uV - vreg->set_points->range[i].set_point_min_uV)
/ vreg->set_points->range[i].step_uV;
break;
} else {
*selector += vreg->set_points->range[i].n_voltages;
}
*selector += vreg->set_points->range[i].n_voltages;
}
if (*selector >= vreg->set_points->n_voltages)
@ -794,7 +794,7 @@ static int qpnp_regulator_select_voltage_same_range(struct qpnp_regulator *vreg,
static int qpnp_regulator_select_voltage(struct qpnp_regulator *vreg,
int min_uV, int max_uV, int *range_sel, int *voltage_sel,
unsigned *selector)
unsigned int *selector)
{
struct qpnp_voltage_range *range;
int uV = min_uV;
@ -872,7 +872,7 @@ static int qpnp_regulator_delay_for_slewing(struct qpnp_regulator *vreg,
}
static int qpnp_regulator_common_set_voltage(struct regulator_dev *rdev,
int min_uV, int max_uV, unsigned *selector)
int min_uV, int max_uV, unsigned int *selector)
{
struct qpnp_regulator *vreg = rdev_get_drvdata(rdev);
int rc, range_sel, voltage_sel, voltage_old = 0;
@ -958,7 +958,7 @@ static int qpnp_regulator_common_get_voltage(struct regulator_dev *rdev)
}
static int qpnp_regulator_single_range_set_voltage(struct regulator_dev *rdev,
int min_uV, int max_uV, unsigned *selector)
int min_uV, int max_uV, unsigned int *selector)
{
struct qpnp_regulator *vreg = rdev_get_drvdata(rdev);
int rc, range_sel, voltage_sel;
@ -995,7 +995,7 @@ static int qpnp_regulator_single_range_get_voltage(struct regulator_dev *rdev)
}
static int qpnp_regulator_ult_lo_smps_set_voltage(struct regulator_dev *rdev,
int min_uV, int max_uV, unsigned *selector)
int min_uV, int max_uV, unsigned int *selector)
{
struct qpnp_regulator *vreg = rdev_get_drvdata(rdev);
int rc, range_sel, voltage_sel;
@ -1065,7 +1065,7 @@ static int qpnp_regulator_ult_lo_smps_get_voltage(struct regulator_dev *rdev)
}
static int qpnp_regulator_common_list_voltage(struct regulator_dev *rdev,
unsigned selector)
unsigned int selector)
{
struct qpnp_regulator *vreg = rdev_get_drvdata(rdev);
int uV = 0;
@ -1079,16 +1079,16 @@ static int qpnp_regulator_common_list_voltage(struct regulator_dev *rdev,
uV = selector * vreg->set_points->range[i].step_uV
+ vreg->set_points->range[i].set_point_min_uV;
break;
} else {
selector -= vreg->set_points->range[i].n_voltages;
}
selector -= vreg->set_points->range[i].n_voltages;
}
return uV;
}
static int qpnp_regulator_common2_set_voltage(struct regulator_dev *rdev,
int min_uV, int max_uV, unsigned *selector)
int min_uV, int max_uV, unsigned int *selector)
{
struct qpnp_regulator *vreg = rdev_get_drvdata(rdev);
int rc, range_sel, voltage_sel, voltage_old = 0;
@ -1280,8 +1280,6 @@ static void qpnp_regulator_vs_ocp_work(struct work_struct *work)
= container_of(dwork, struct qpnp_regulator, ocp_work);
qpnp_regulator_vs_clear_ocp(vreg);
return;
}
static irqreturn_t qpnp_regulator_vs_ocp_isr(int irq, void *data)
@ -1418,8 +1416,7 @@ static void qpnp_vreg_show_state(struct regulator_dev *rdev,
pc_mode_label[5] =
mode_reg & QPNP_COMMON_MODE_FOLLOW_HW_EN0_MASK ? '0' : '_';
pr_info("%s %-11s: %s, v=%7d uV, mode=%s, pc_en=%s, "
"alt_mode=%s\n",
pr_info("%s %-11s: %s, v=%7d uV, mode=%s, pc_en=%s, alt_mode=%s\n",
action_label, vreg->rdesc.name, enable_label, uV,
mode_label, pc_enable_label, pc_mode_label);
break;
@ -1440,8 +1437,7 @@ static void qpnp_vreg_show_state(struct regulator_dev *rdev,
pc_mode_label[6] =
mode_reg & QPNP_COMMON_MODE_FOLLOW_HW_EN0_MASK ? '0' : '_';
pr_info("%s %-11s: %s, v=%7d uV, mode=%s, pc_en=%s, "
"alt_mode=%s\n",
pr_info("%s %-11s: %s, v=%7d uV, mode=%s, pc_en=%s, alt_mode=%s\n",
action_label, vreg->rdesc.name, enable_label, uV,
mode_label, pc_enable_label, pc_mode_label);
break;
@ -2165,7 +2161,7 @@ static int qpnp_regulator_get_dt_config(struct platform_device *pdev,
return rc;
}
static struct of_device_id spmi_match_table[];
static const struct of_device_id spmi_match_table[];
#define MAX_NAME_LEN 127
@ -2256,8 +2252,6 @@ static int qpnp_regulator_probe(struct platform_device *pdev)
reg_name = kzalloc(strnlen(pdata->init_data.constraints.name,
MAX_NAME_LEN) + 1, GFP_KERNEL);
if (!reg_name) {
dev_err(&pdev->dev, "%s: Can't allocate regulator name\n",
__func__);
kfree(vreg);
return -ENOMEM;
}
@ -2362,7 +2356,7 @@ static int qpnp_regulator_remove(struct platform_device *pdev)
return 0;
}
static struct of_device_id spmi_match_table[] = {
static const struct of_device_id spmi_match_table[] = {
{ .compatible = QPNP_REGULATOR_DRIVER_NAME, },
{}
};
@ -2422,7 +2416,6 @@ int __init qpnp_regulator_init(void)
if (has_registered)
return 0;
else
has_registered = true;
qpnp_regulator_set_point_init();

View file

@ -1592,13 +1592,13 @@ config RTC_DRV_MOXART
will be called rtc-moxart
config RTC_DRV_QPNP
tristate "Qualcomm QPNP PMIC RTC"
depends on SPMI && OF_SPMI && MSM_QPNP_INT
tristate "Qualcomm Technologies, Inc. QPNP PMIC RTC"
depends on SPMI
help
Say Y here if you want to support the Qualcomm QPNP PMIC RTC.
To compile this driver as a module, choose M here: the
module will be called qpnp-rtc.
This enables support for the RTC found on Qualcomm Technologies, Inc.
QPNP PMIC chips. This driver supports using the PMIC RTC peripheral
to wake a mobile device up from suspend or to wake it up from power-
off.
config RTC_DRV_MT6397
tristate "Mediatek Real Time Clock driver"
@ -1610,15 +1610,6 @@ config RTC_DRV_MT6397
If you want to use Mediatek(R) RTC interface, select Y or M here.
config RTC_DRV_QPNP
tristate "Qualcomm QPNP PMIC RTC"
depends on SPMI
help
Say Y here if you want to support the Qualcomm QPNP PMIC RTC.
To compile this driver as a module, choose M here: the
module will be called qpnp-rtc.
config RTC_DRV_XGENE
tristate "APM X-Gene RTC"
depends on HAS_IOMEM

View file

@ -1,4 +1,4 @@
/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved.
/* Copyright (c) 2012-2015, 2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -50,9 +50,9 @@
/* Module parameter to control power-on-alarm */
bool poweron_alarm;
EXPORT_SYMBOL(poweron_alarm);
module_param(poweron_alarm, bool, 0644);
MODULE_PARM_DESC(poweron_alarm, "Enable/Disable power-on alarm");
EXPORT_SYMBOL(poweron_alarm);
/* rtc driver internal structure */
struct qpnp_rtc {
@ -138,7 +138,7 @@ qpnp_rtc_set_time(struct device *dev, struct rtc_time *tm)
* | BYTE[3] | BYTE[2] | BYTE[1] | BYTE[0] |
* ----------------------------------------------
*
* RTC has four 8 bit registers for writting time in seconds:
* RTC has four 8 bit registers for writing time in seconds:
* WDATA[3], WDATA[2], WDATA[1], WDATA[0]
*
* Write to the RTC registers should be done in following order
@ -149,7 +149,7 @@ qpnp_rtc_set_time(struct device *dev, struct rtc_time *tm)
*
* Write BYTE[0] of time to RTC WDATA[0] register
*
* Clearing BYTE[0] and writting in the end will prevent any
* Clearing BYTE[0] and writing in the end will prevent any
* unintentional overflow from WDATA[0] to higher bytes during the
* write operation
*/
@ -162,9 +162,8 @@ qpnp_rtc_set_time(struct device *dev, struct rtc_time *tm)
rc = qpnp_write_wrapper(rtc_dd, &rtc_ctrl_reg,
rtc_dd->rtc_base + REG_OFFSET_RTC_CTRL, 1);
if (rc) {
dev_err(dev,
"Disabling of RTC control reg failed"
" with error:%d\n", rc);
dev_err(dev, "Disabling of RTC control reg failed with error:%d\n",
rc);
goto rtc_rw_fail;
}
rtc_dd->rtc_ctrl_reg = rtc_ctrl_reg;
@ -201,9 +200,8 @@ qpnp_rtc_set_time(struct device *dev, struct rtc_time *tm)
rc = qpnp_write_wrapper(rtc_dd, &rtc_ctrl_reg,
rtc_dd->rtc_base + REG_OFFSET_RTC_CTRL, 1);
if (rc) {
dev_err(dev,
"Enabling of RTC control reg failed"
" with error:%d\n", rc);
dev_err(dev, "Enabling of RTC control reg failed with error:%d\n",
rc);
goto rtc_rw_fail;
}
rtc_dd->rtc_ctrl_reg = rtc_ctrl_reg;
@ -417,13 +415,21 @@ rtc_rw_fail:
return rc;
}
static struct rtc_class_ops qpnp_rtc_ops = {
static const struct rtc_class_ops qpnp_rtc_ro_ops = {
.read_time = qpnp_rtc_read_time,
.set_alarm = qpnp_rtc_set_alarm,
.read_alarm = qpnp_rtc_read_alarm,
.alarm_irq_enable = qpnp_rtc_alarm_irq_enable,
};
static const struct rtc_class_ops qpnp_rtc_rw_ops = {
.read_time = qpnp_rtc_read_time,
.set_alarm = qpnp_rtc_set_alarm,
.read_alarm = qpnp_rtc_read_alarm,
.alarm_irq_enable = qpnp_rtc_alarm_irq_enable,
.set_time = qpnp_rtc_set_time,
};
static irqreturn_t qpnp_alarm_trigger(int irq, void *dev_id)
{
struct qpnp_rtc *rtc_dd = dev_id;
@ -465,6 +471,7 @@ rtc_alarm_handled:
static int qpnp_rtc_probe(struct platform_device *pdev)
{
const struct rtc_class_ops *rtc_ops = &qpnp_rtc_ro_ops;
int rc;
u8 subtype;
struct qpnp_rtc *rtc_dd;
@ -578,13 +585,13 @@ static int qpnp_rtc_probe(struct platform_device *pdev)
}
if (rtc_dd->rtc_write_enable == true)
qpnp_rtc_ops.set_time = qpnp_rtc_set_time;
rtc_ops = &qpnp_rtc_rw_ops;
dev_set_drvdata(&pdev->dev, rtc_dd);
/* Register the RTC device */
rtc_dd->rtc = rtc_device_register("qpnp_rtc", &pdev->dev,
&qpnp_rtc_ops, THIS_MODULE);
rtc_ops, THIS_MODULE);
if (IS_ERR(rtc_dd->rtc)) {
dev_err(&pdev->dev, "%s: RTC registration failed (%ld)\n",
__func__, PTR_ERR(rtc_dd->rtc));
@ -676,7 +683,7 @@ fail_alarm_disable:
}
}
static struct of_device_id spmi_match_table[] = {
static const struct of_device_id spmi_match_table[] = {
{
.compatible = "qcom,qpnp-rtc",
},
@ -707,4 +714,4 @@ static void __exit qpnp_rtc_exit(void)
module_exit(qpnp_rtc_exit);
MODULE_DESCRIPTION("SMPI PMIC RTC driver");
MODULE_LICENSE("GPL V2");
MODULE_LICENSE("GPL v2");

View file

@ -40,9 +40,11 @@ config QPNP_HAPTIC
tristate "Haptic support for QPNP PMIC"
depends on ARCH_QCOM
help
This option enables device driver support for the Haptic
on the Qualcomm Technologies' QPNP PMICs. It uses the android
timed-output framework.
This option enables device driver support for the haptic peripheral
found on Qualcomm Technologies, Inc. QPNP PMICs. The haptic
peripheral is capable of driving both LRA and ERM vibrators. This
module provides haptic feedback for user actions such as a long press
on the touch screen. It uses the Android timed-output framework.
config MSM_SMD
depends on MSM_SMEM

View file

@ -1,4 +1,4 @@
/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
/* Copyright (c) 2014-2015, 2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -918,15 +918,16 @@ static ssize_t qpnp_hap_wf_samp_store(struct device *dev,
struct timed_output_dev *timed_dev = dev_get_drvdata(dev);
struct qpnp_hap *hap = container_of(timed_dev, struct qpnp_hap,
timed_dev);
int data;
int data, rc;
if (index < 0 || index >= QPNP_HAP_WAV_SAMP_LEN) {
dev_err(dev, "Invalid sample index(%d)\n", index);
return -EINVAL;
}
if (sscanf(buf, "%x", &data) != 1)
return -EINVAL;
rc = kstrtoint(buf, 16, &data);
if (rc)
return rc;
if (data < 0 || data > 0xff) {
dev_err(dev, "Invalid sample wf_%d (%d)\n", index, data);
@ -1032,8 +1033,9 @@ static ssize_t qpnp_hap_wf_rep_store(struct device *dev,
int data, rc, temp;
u8 reg;
if (sscanf(buf, "%d", &data) != 1)
return -EINVAL;
rc = kstrtoint(buf, 10, &data);
if (rc)
return rc;
if (data < QPNP_HAP_WAV_REP_MIN)
data = QPNP_HAP_WAV_REP_MIN;
@ -1078,8 +1080,9 @@ static ssize_t qpnp_hap_wf_s_rep_store(struct device *dev,
int data, rc, temp;
u8 reg;
if (sscanf(buf, "%d", &data) != 1)
return -EINVAL;
rc = kstrtoint(buf, 10, &data);
if (rc)
return rc;
if (data < QPNP_HAP_WAV_S_REP_MIN)
data = QPNP_HAP_WAV_S_REP_MIN;
@ -1290,50 +1293,24 @@ static ssize_t qpnp_hap_ramp_test_data_show(struct device *dev,
/* sysfs attributes */
static struct device_attribute qpnp_hap_attrs[] = {
__ATTR(wf_s0, (S_IRUGO | S_IWUSR | S_IWGRP),
qpnp_hap_wf_s0_show,
qpnp_hap_wf_s0_store),
__ATTR(wf_s1, (S_IRUGO | S_IWUSR | S_IWGRP),
qpnp_hap_wf_s1_show,
qpnp_hap_wf_s1_store),
__ATTR(wf_s2, (S_IRUGO | S_IWUSR | S_IWGRP),
qpnp_hap_wf_s2_show,
qpnp_hap_wf_s2_store),
__ATTR(wf_s3, (S_IRUGO | S_IWUSR | S_IWGRP),
qpnp_hap_wf_s3_show,
qpnp_hap_wf_s3_store),
__ATTR(wf_s4, (S_IRUGO | S_IWUSR | S_IWGRP),
qpnp_hap_wf_s4_show,
qpnp_hap_wf_s4_store),
__ATTR(wf_s5, (S_IRUGO | S_IWUSR | S_IWGRP),
qpnp_hap_wf_s5_show,
qpnp_hap_wf_s5_store),
__ATTR(wf_s6, (S_IRUGO | S_IWUSR | S_IWGRP),
qpnp_hap_wf_s6_show,
qpnp_hap_wf_s6_store),
__ATTR(wf_s7, (S_IRUGO | S_IWUSR | S_IWGRP),
qpnp_hap_wf_s7_show,
qpnp_hap_wf_s7_store),
__ATTR(wf_update, (S_IRUGO | S_IWUSR | S_IWGRP),
qpnp_hap_wf_update_show,
__ATTR(wf_s0, 0664, qpnp_hap_wf_s0_show, qpnp_hap_wf_s0_store),
__ATTR(wf_s1, 0664, qpnp_hap_wf_s1_show, qpnp_hap_wf_s1_store),
__ATTR(wf_s2, 0664, qpnp_hap_wf_s2_show, qpnp_hap_wf_s2_store),
__ATTR(wf_s3, 0664, qpnp_hap_wf_s3_show, qpnp_hap_wf_s3_store),
__ATTR(wf_s4, 0664, qpnp_hap_wf_s4_show, qpnp_hap_wf_s4_store),
__ATTR(wf_s5, 0664, qpnp_hap_wf_s5_show, qpnp_hap_wf_s5_store),
__ATTR(wf_s6, 0664, qpnp_hap_wf_s6_show, qpnp_hap_wf_s6_store),
__ATTR(wf_s7, 0664, qpnp_hap_wf_s7_show, qpnp_hap_wf_s7_store),
__ATTR(wf_update, 0664, qpnp_hap_wf_update_show,
qpnp_hap_wf_update_store),
__ATTR(wf_rep, (S_IRUGO | S_IWUSR | S_IWGRP),
qpnp_hap_wf_rep_show,
qpnp_hap_wf_rep_store),
__ATTR(wf_s_rep, (S_IRUGO | S_IWUSR | S_IWGRP),
qpnp_hap_wf_s_rep_show,
qpnp_hap_wf_s_rep_store),
__ATTR(play_mode, (S_IRUGO | S_IWUSR | S_IWGRP),
qpnp_hap_play_mode_show,
__ATTR(wf_rep, 0664, qpnp_hap_wf_rep_show, qpnp_hap_wf_rep_store),
__ATTR(wf_s_rep, 0664, qpnp_hap_wf_s_rep_show, qpnp_hap_wf_s_rep_store),
__ATTR(play_mode, 0664, qpnp_hap_play_mode_show,
qpnp_hap_play_mode_store),
__ATTR(dump_regs, (S_IRUGO | S_IWUSR | S_IWGRP),
qpnp_hap_dump_regs_show,
NULL),
__ATTR(ramp_test, (S_IRUGO | S_IWUSR | S_IWGRP),
qpnp_hap_ramp_test_data_show,
__ATTR(dump_regs, 0664, qpnp_hap_dump_regs_show, NULL),
__ATTR(ramp_test, 0664, qpnp_hap_ramp_test_data_show,
qpnp_hap_ramp_test_data_store),
__ATTR(min_max_test, (S_IRUGO | S_IWUSR | S_IWGRP),
qpnp_hap_min_max_test_data_show,
__ATTR(min_max_test, 0664, qpnp_hap_min_max_test_data_show,
qpnp_hap_min_max_test_data_store),
};
@ -1420,14 +1397,14 @@ static enum hrtimer_restart detect_auto_res_error(struct hrtimer *timer)
if (val & AUTO_RES_ERR_BIT) {
schedule_work(&hap->auto_res_err_work);
return HRTIMER_NORESTART;
} else {
}
update_lra_frequency(hap);
currtime = ktime_get();
hrtimer_forward(&hap->auto_res_err_poll_timer, currtime,
ktime_set(0, POLL_TIME_AUTO_RES_ERR_NS));
return HRTIMER_RESTART;
}
}
static void correct_auto_res_error(struct work_struct *auto_res_err_work)
{
@ -1595,19 +1572,23 @@ int qpnp_hap_play_byte(u8 data, bool on)
return rc;
if (!on) {
/* set the pwm back to original duty for normal operations */
/* this is not required if standard interface is not used */
/*
* Set the pwm back to original duty for normal operations.
* This is not required if standard interface is not used.
*/
rc = pwm_config(hap->pwm_info.pwm_dev,
hap->pwm_info.duty_us * NSEC_PER_USEC,
hap->pwm_info.period_us * NSEC_PER_USEC);
return rc;
}
/* pwm values range from 0x00 to 0xff. The range from 0x00 to 0x7f
provides a postive amplitude in the sin wave form for 0 to 100%.
The range from 0x80 to 0xff provides a negative amplitude in the
sin wave form for 0 to 100%. Here the duty percentage is calculated
based on the incoming data to accommodate this. */
/*
* pwm values range from 0x00 to 0xff. The range from 0x00 to 0x7f
* provides a postive amplitude in the sin wave form for 0 to 100%.
* The range from 0x80 to 0xff provides a negative amplitude in the
* sin wave form for 0 to 100%. Here the duty percentage is calculated
* based on the incoming data to accommodate this.
*/
if (data <= QPNP_HAP_EXT_PWM_PEAK_DATA)
duty_percent = QPNP_HAP_EXT_PWM_HALF_DUTY +
((data * QPNP_HAP_EXT_PWM_DATA_FACTOR) / 100);
@ -1675,6 +1656,7 @@ static int qpnp_hap_get_time(struct timed_output_dev *dev)
if (hrtimer_active(&hap->hap_timer)) {
ktime_t r = hrtimer_get_remaining(&hap->hap_timer);
return (int)ktime_to_us(r);
} else {
return 0;
@ -1709,6 +1691,7 @@ static enum hrtimer_restart qpnp_hap_test_timer(struct hrtimer *timer)
static int qpnp_haptic_suspend(struct device *dev)
{
struct qpnp_hap *hap = dev_get_drvdata(dev);
hrtimer_cancel(&hap->hap_timer);
cancel_work_sync(&hap->work);
/* turn-off haptic */
@ -1845,9 +1828,11 @@ static int qpnp_hap_config(struct qpnp_hap *hap)
if (rc)
return rc;
/* Configure RATE_CFG1 and RATE_CFG2 registers */
/* Note: For ERM these registers act as play rate and
for LRA these represent resonance period */
/*
* Configure RATE_CFG1 and RATE_CFG2 registers.
* Note: For ERM these registers act as play rate and
* for LRA these represent resonance period
*/
if (hap->wave_play_rate_us < QPNP_HAP_WAV_PLAY_RATE_US_MIN)
hap->wave_play_rate_us = QPNP_HAP_WAV_PLAY_RATE_US_MIN;
else if (hap->wave_play_rate_us > QPNP_HAP_WAV_PLAY_RATE_US_MAX)
@ -2314,7 +2299,7 @@ static int qpnp_haptic_remove(struct platform_device *pdev)
return 0;
}
static struct of_device_id spmi_match_table[] = {
static const struct of_device_id spmi_match_table[] = {
{ .compatible = "qcom,qpnp-haptic", },
{ },
};

View file

@ -406,19 +406,18 @@ config INTEL_PCH_THERMAL
programmable trip points and other information.
config THERMAL_QPNP
tristate "Qualcomm Plug-and-Play PMIC Temperature Alarm"
depends on THERMAL
depends on OF
depends on SPMI
tristate "Qualcomm Technologies, Inc. QPNP PMIC Temperature Alarm"
depends on OF && SPMI
help
This enables a thermal Sysfs driver for Qualcomm plug-and-play (QPNP)
PMIC devices. It shows up in Sysfs as a thermal zone with multiple
trip points. The temperature reported by the thermal zone reflects the
real time die temperature if an ADC is present or an estimate of the
temperature based upon the over temperature stage value if no ADC is
available. If allowed via compile time configuration; enabling the
thermal zone device via the mode file results in shifting PMIC over
temperature shutdown control from hardware to software.
This enables a thermal Sysfs driver for Qualcomm Technologies, Inc.
QPNP PMIC devices. It shows up in Sysfs as a thermal zone with
multiple trip points. The temperature reported by the thermal zone
reflects the real time die temperature if an ADC is present or an
estimate of the temperature based upon the over temperature stage
value if no ADC is available. If allowed via compile time
configuration; enabling the thermal zone device via the mode file
results in shifting PMIC over temperature shutdown control from
hardware to software.
config THERMAL_QPNP_ADC_TM
tristate "Qualcomm 8974 Thermal Monitor ADC Driver"

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2011-2016, The Linux Foundation. All rights reserved.
* Copyright (c) 2011-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -773,7 +773,7 @@ static const struct dev_pm_ops qpnp_tm_pm_ops = {
#define QPNP_TM_PM_OPS NULL
#endif
static struct of_device_id qpnp_tm_match_table[] = {
static const struct of_device_id qpnp_tm_match_table[] = {
{ .compatible = QPNP_TM_DRIVER_NAME, },
{}
};

View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
* Copyright (c) 2012-2013, 2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -158,8 +158,8 @@ enum qpnp_boost_current_limit {
struct qpnp_regulator_platform_data {
struct regulator_init_data init_data;
int pull_down_enable;
unsigned pin_ctrl_enable;
unsigned pin_ctrl_hpm;
unsigned int pin_ctrl_enable;
unsigned int pin_ctrl_hpm;
int system_load;
int enable_time;
int ocp_enable;