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drm/gk104/fb/ram: skip table entry for mode we're already in

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NVIDIA binary driver appears to, not sure if it's for a good reason, but
grasping at straws for some GDDR5 reclocking issues here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2014-09-01 10:44:57 +10:00
parent 50c4088313
commit 4cc6c3fe39
1 changed files with 12 additions and 11 deletions
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23
drivers/gpu/drm/nouveau/core/subdev/fb/ramnve0.c
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@ -1173,18 +1173,19 @@ nve0_ram_init(struct nouveau_object *object)
cnt = nv_ro08(bios, data + 0x14); /* guess at count */ cnt = nv_ro08(bios, data + 0x14); /* guess at count */
data = nv_ro32(bios, data + 0x10); /* guess u32... */ data = nv_ro32(bios, data + 0x10); /* guess u32... */
save = nv_rd32(pfb, 0x10f65c); save = nv_rd32(pfb, 0x10f65c) & 0x000000f0;
for (i = 0; i < cnt; i++) { for (i = 0; i < cnt; i++, data += 4) {
nv_mask(pfb, 0x10f65c, 0x000000f0, i << 4); if (i != save >> 4) {
nvbios_exec(&(struct nvbios_init) { nv_mask(pfb, 0x10f65c, 0x000000f0, i << 4);
.subdev = nv_subdev(pfb), nvbios_exec(&(struct nvbios_init) {
.bios = bios, .subdev = nv_subdev(pfb),
.offset = nv_ro32(bios, data), /* guess u32 */ .bios = bios,
.execute = 1, .offset = nv_ro32(bios, data),
}); .execute = 1,
data += 4; });
}
} }
nv_wr32(pfb, 0x10f65c, save); nv_mask(pfb, 0x10f65c, 0x000000f0, save);
nv_mask(pfb, 0x10f584, 0x11000000, 0x00000000); nv_mask(pfb, 0x10f584, 0x11000000, 0x00000000);
switch (ram->base.type) { switch (ram->base.type) {