evie/android_kernel_oneplus_msm8998
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msm: mdss: dp: fix div by zero error

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If for some reasons like ioctl fuss test or reading dpcd caps failed,
max lane count supported might be zero. In such cases handle link clk
calculation gracefully.

Change-Id: I7cb08abce76025930681f6532c03708793d3acc4
Signed-off-by: Narender Ankam <nankam@codeaurora.org>
This commit is contained in:
Narender Ankam 2017-08-24 16:23:40 +05:30
parent a5665f1625
commit 4d811fc832
2 changed files with 6 additions and 0 deletions
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1
drivers/video/fbdev/msm/mdss_dp.c
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@ -1637,6 +1637,7 @@ int mdss_dp_on_hpd(struct mdss_dp_drv_pdata *dp_drv)
dp_drv->link_rate = mdss_dp_gen_link_clk(dp_drv);
if (!dp_drv->link_rate) {
pr_err("Unable to configure required link rate\n");
mdss_dp_clk_ctrl(dp_drv, DP_CORE_PM, false);
ret = -EINVAL;
goto exit;
}

5
drivers/video/fbdev/msm/mdss_dp_aux.c
View file

@ -684,6 +684,11 @@ char mdss_dp_gen_link_clk(struct mdss_dp_drv_pdata *dp)
pr_debug("clk_rate=%llu, bpp= %d, lane_cnt=%d\n",
pinfo->clk_rate, pinfo->bpp, lane_cnt);
if (lane_cnt == 0) {
pr_warn("Invalid max lane count\n");
return 0;
}
/*
* The max pixel clock supported is 675Mhz. The
* current calculations below will make sure