mdss: msm: Add support for gamut map enable

Non-uniform mapping mode is configurable parameter exposed by MDP.
Driver should provide the option to gamut clients to configure the
mapping. Change updates the interface to expose the parameter and
programs the gamut registers based on user setting.

Change-Id: I71e7e0f7443da7856b0d03e6b2799f9380274893
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
This commit is contained in:
Gopikrishnaiah Anandan 2015-05-20 22:01:29 -07:00 committed by David Keitel
parent 5abc100e7a
commit 4d9b8c2d45
3 changed files with 8 additions and 1 deletions

View file

@ -402,6 +402,7 @@ static int pp_gamut_cache_params_v1_7(struct mdp_gamut_cfg_data *config,
MDP_GAMUT_TABLE_V1_7_SZ : MDP_GAMUT_TABLE_V1_7_SZ :
MDP_GAMUT_TABLE_V1_7_COARSE_SZ; MDP_GAMUT_TABLE_V1_7_COARSE_SZ;
v17_cache_data->mode = v17_usr_config.mode; v17_cache_data->mode = v17_usr_config.mode;
v17_cache_data->map_en = v17_usr_config.map_en;
/* sanity check for sizes */ /* sanity check for sizes */
for (i = 0; i < MDP_GAMUT_TABLE_NUM_V1_7; i++) { for (i = 0; i < MDP_GAMUT_TABLE_NUM_V1_7; i++) {
if (v17_usr_config.tbl_size[i] != tbl_sz) { if (v17_usr_config.tbl_size[i] != tbl_sz) {

View file

@ -49,6 +49,7 @@
#define GAMUT_COARSE_EN (BIT(2)) #define GAMUT_COARSE_EN (BIT(2))
#define GAMUT_COARSE_INDEX 1248 #define GAMUT_COARSE_INDEX 1248
#define GAMUT_FINE_INDEX 0 #define GAMUT_FINE_INDEX 0
#define GAMUT_MAP_EN BIT(1)
#define GAMUT_ENABLE BIT(0) #define GAMUT_ENABLE BIT(0)
#define IGC_MASK_MAX 3 #define IGC_MASK_MAX 3
@ -702,12 +703,14 @@ static int pp_gamut_get_config(char __iomem *base_addr, void *cfg_data,
tbl_sz = MDP_GAMUT_TABLE_V1_7_COARSE_SZ; tbl_sz = MDP_GAMUT_TABLE_V1_7_COARSE_SZ;
sz = tbl_sz * sizeof(u32); sz = tbl_sz * sizeof(u32);
index_start = GAMUT_COARSE_INDEX; index_start = GAMUT_COARSE_INDEX;
gamut_data.mode = mdp_gamut_coarse_mode;
} else { } else {
mode = mdp_gamut_fine_mode;
tbl_sz = MDP_GAMUT_TABLE_V1_7_SZ; tbl_sz = MDP_GAMUT_TABLE_V1_7_SZ;
sz = tbl_sz * sizeof(u32); sz = tbl_sz * sizeof(u32);
index_start = GAMUT_FINE_INDEX; index_start = GAMUT_FINE_INDEX;
gamut_data.mode = mdp_gamut_fine_mode;
} }
gamut_data.map_en = mode & GAMUT_MAP_EN;
sz_scale = MDP_GAMUT_SCALE_OFF_SZ * sizeof(u32); sz_scale = MDP_GAMUT_SCALE_OFF_SZ * sizeof(u32);
for (i = 0; i < MDP_GAMUT_TABLE_NUM_V1_7; i++) { for (i = 0; i < MDP_GAMUT_TABLE_NUM_V1_7; i++) {
if (!access_ok(VERIFY_WRITE, gamut_data.c0_data[i], sz)) { if (!access_ok(VERIFY_WRITE, gamut_data.c0_data[i], sz)) {
@ -902,6 +905,8 @@ bail_out:
} else if (gamut_cfg_data->flags & MDP_PP_OPS_ENABLE) { } else if (gamut_cfg_data->flags & MDP_PP_OPS_ENABLE) {
if (gamut_data->mode == mdp_gamut_coarse_mode) if (gamut_data->mode == mdp_gamut_coarse_mode)
val |= GAMUT_COARSE_EN; val |= GAMUT_COARSE_EN;
if (gamut_data->map_en)
val |= GAMUT_MAP_EN;
val |= GAMUT_ENABLE; val |= GAMUT_ENABLE;
writel_relaxed(val, base_addr + GAMUT_OP_MODE_OFF); writel_relaxed(val, base_addr + GAMUT_OP_MODE_OFF);
pp_sts->gamut_sts |= PP_STS_ENABLE; pp_sts->gamut_sts |= PP_STS_ENABLE;

View file

@ -1023,6 +1023,7 @@ enum {
struct mdp_gamut_data_v1_7 { struct mdp_gamut_data_v1_7 {
uint32_t mode; uint32_t mode;
uint32_t map_en;
uint32_t tbl_size[MDP_GAMUT_TABLE_NUM_V1_7]; uint32_t tbl_size[MDP_GAMUT_TABLE_NUM_V1_7];
uint32_t *c0_data[MDP_GAMUT_TABLE_NUM_V1_7]; uint32_t *c0_data[MDP_GAMUT_TABLE_NUM_V1_7];
uint32_t *c1_c2_data[MDP_GAMUT_TABLE_NUM_V1_7]; uint32_t *c1_c2_data[MDP_GAMUT_TABLE_NUM_V1_7];