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ASoC: wcd9335: Infinite loop when routing DMIC for handset ANC

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When routing DMIC input to ANC block for handset ANC usecase,
codec driver enters an infinite loop attempting to determine
the stream sample rate. Additionally since the noise DMIC is
configured prior to the rest of the usecase, we cannot deterine
the stream sample rate to configure the ANC block for half-rate.
Therefore revert that logic and let ANC block be configured
according to the device tree.

CRs-fixed: 997662
Change-Id: I311ad8f158b0be6e9d6481512860f9fac10afc1f
Signed-off-by: Stephen Oglesby <soglesby@codeaurora.org>
This commit is contained in:
Stephen Oglesby 2016-03-29 15:53:39 -07:00 • committed by Kyle Yan
parent 85b2e6c6a4
commit 4e9f522a76
1 changed files with 14 additions and 24 deletions
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38
sound/soc/codecs/wcd9335.c
View file

@ -5429,26 +5429,6 @@ out:
return ret; return ret;
} }
static void tasha_set_anc_dmic_mode(struct snd_soc_codec *codec,
u8 dmic_ctl_val)
{
u8 anc_ctl_value;
if (dmic_ctl_val == WCD9335_DMIC_CLK_DIV_2)
anc_ctl_value = WCD9335_ANC_DMIC_X2_FULL_RATE;
else
anc_ctl_value = WCD9335_ANC_DMIC_X2_HALF_RATE;
snd_soc_update_bits(codec, WCD9335_CDC_ANC0_MODE_2_CTL,
0x40, anc_ctl_value << 6);
snd_soc_update_bits(codec, WCD9335_CDC_ANC0_MODE_2_CTL,
0x20, anc_ctl_value << 5);
snd_soc_update_bits(codec, WCD9335_CDC_ANC1_MODE_2_CTL,
0x40, anc_ctl_value << 6);
snd_soc_update_bits(codec, WCD9335_CDC_ANC1_MODE_2_CTL,
0x20, anc_ctl_value << 5);
}
static u32 tasha_get_dmic_sample_rate(struct snd_soc_codec *codec, static u32 tasha_get_dmic_sample_rate(struct snd_soc_codec *codec,
unsigned int dmic, struct wcd9xxx_pdata *pdata) unsigned int dmic, struct wcd9xxx_pdata *pdata)
{ {
@ -5470,6 +5450,7 @@ static u32 tasha_get_dmic_sample_rate(struct snd_soc_codec *codec,
adc_mux_sel = ((snd_soc_read(codec, adc_mux_ctl_reg) & adc_mux_sel = ((snd_soc_read(codec, adc_mux_ctl_reg) &
0x38) >> 3) - 1; 0x38) >> 3) - 1;
} else if (adc_mux_index == 9) { } else if (adc_mux_index == 9) {
++adc_mux_index;
continue; continue;
} }
if (adc_mux_sel == dmic) if (adc_mux_sel == dmic)
@ -5623,9 +5604,6 @@ static int tasha_codec_enable_dmic(struct snd_soc_dapm_widget *w,
pdata->mclk_rate, pdata->mclk_rate,
dmic_sample_rate); dmic_sample_rate);
/* Set ANC dmic control bits to match dmic rate */
tasha_set_anc_dmic_mode(codec, dmic_rate_val);
(*dmic_clk_cnt)++; (*dmic_clk_cnt)++;
if (*dmic_clk_cnt == 1) { if (*dmic_clk_cnt == 1) {
snd_soc_update_bits(codec, dmic_clk_reg, snd_soc_update_bits(codec, dmic_clk_reg,
@ -11977,6 +11955,7 @@ static int tasha_handle_pdata(struct tasha_priv *tasha,
{ {
struct snd_soc_codec *codec = tasha->codec; struct snd_soc_codec *codec = tasha->codec;
u8 dmic_ctl_val, mad_dmic_ctl_val; u8 dmic_ctl_val, mad_dmic_ctl_val;
u8 anc_ctl_value;
u32 def_dmic_rate, dmic_clk_drv; u32 def_dmic_rate, dmic_clk_drv;
int vout_ctl_1, vout_ctl_2, vout_ctl_3, vout_ctl_4; int vout_ctl_1, vout_ctl_2, vout_ctl_3, vout_ctl_4;
int rc = 0; int rc = 0;
@ -12086,8 +12065,19 @@ static int tasha_handle_pdata(struct tasha_priv *tasha,
pdata->mclk_rate, pdata->mclk_rate,
pdata->dmic_sample_rate); pdata->dmic_sample_rate);
tasha_set_anc_dmic_mode(codec, dmic_ctl_val); if (dmic_ctl_val == WCD9335_DMIC_CLK_DIV_2)
anc_ctl_value = WCD9335_ANC_DMIC_X2_FULL_RATE;
else
anc_ctl_value = WCD9335_ANC_DMIC_X2_HALF_RATE;
snd_soc_update_bits(codec, WCD9335_CDC_ANC0_MODE_2_CTL,
0x40, anc_ctl_value << 6);
snd_soc_update_bits(codec, WCD9335_CDC_ANC0_MODE_2_CTL,
0x20, anc_ctl_value << 5);
snd_soc_update_bits(codec, WCD9335_CDC_ANC1_MODE_2_CTL,
0x40, anc_ctl_value << 6);
snd_soc_update_bits(codec, WCD9335_CDC_ANC1_MODE_2_CTL,
0x20, anc_ctl_value << 5);
done: done:
return rc; return rc;
} }