rapidio/tsi721_dma: rework scatter-gather list handling
Rework Tsi721 RapidIO DMA engine support to allow handling data scatter/gather lists longer than number of hardware buffer descriptors in the DMA channel's descriptor list. The current implementation of Tsi721 DMA transfers requires that number of entries in a scatter/gather list provided by a caller of dmaengine_prep_rio_sg() should not exceed number of allocated hardware buffer descriptors. This patch removes the limitation by processing long scatter/gather lists by sections that can be transferred using hardware descriptor ring of configured size. It also introduces a module parameter "dma_desc_per_channel" to allow run-time configuration of Tsi721 hardware buffer descriptor rings. Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com> Cc: Matt Porter <mporter@kernel.crashing.org> Cc: Andre van Herk <andre.van.herk@prodrive-technologies.com> Cc: Stef van Os <stef.van.os@prodrive-technologies.com> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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3 changed files with 396 additions and 357 deletions
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@ -20,13 +20,26 @@ II. Known problems
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None.
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None.
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III. To do
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III. DMA Engine Support
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Add DMA data transfers (non-messaging).
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Tsi721 mport driver supports DMA data transfers between local system memory and
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Add inbound region (SRIO-to-PCIe) mapping.
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remote RapidIO devices. This functionality is implemented according to SLAVE
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mode API defined by common Linux kernel DMA Engine framework.
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Depending on system requirements RapidIO DMA operations can be included/excluded
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by setting CONFIG_RAPIDIO_DMA_ENGINE option. Tsi721 miniport driver uses seven
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out of eight available BDMA channels to support DMA data transfers.
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One BDMA channel is reserved for generation of maintenance read/write requests.
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If Tsi721 mport driver have been built with RAPIDIO_DMA_ENGINE support included,
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this driver will accept DMA-specific module parameter:
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"dma_desc_per_channel" - defines number of hardware buffer descriptors used by
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each BDMA channel of Tsi721 (by default - 128).
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IV. Version History
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IV. Version History
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1.1.0 - DMA operations re-worked to support data scatter/gather lists larger
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than hardware buffer descriptors ring.
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1.0.0 - Initial driver release.
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1.0.0 - Initial driver release.
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V. License
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V. License
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@ -644,27 +644,26 @@ enum tsi721_smsg_int_flag {
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#ifdef CONFIG_RAPIDIO_DMA_ENGINE
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#ifdef CONFIG_RAPIDIO_DMA_ENGINE
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#define TSI721_BDMA_BD_RING_SZ 128
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#define TSI721_BDMA_MAX_BCOUNT (TSI721_DMAD_BCOUNT1 + 1)
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#define TSI721_BDMA_MAX_BCOUNT (TSI721_DMAD_BCOUNT1 + 1)
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struct tsi721_tx_desc {
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struct tsi721_tx_desc {
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struct dma_async_tx_descriptor txd;
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struct dma_async_tx_descriptor txd;
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struct tsi721_dma_desc *hw_desc;
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u16 destid;
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u16 destid;
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/* low 64-bits of 66-bit RIO address */
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/* low 64-bits of 66-bit RIO address */
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u64 rio_addr;
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u64 rio_addr;
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/* upper 2-bits of 66-bit RIO address */
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/* upper 2-bits of 66-bit RIO address */
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u8 rio_addr_u;
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u8 rio_addr_u;
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u32 bcount;
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enum dma_rtype rtype;
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bool interrupt;
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struct list_head desc_node;
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struct list_head desc_node;
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struct list_head tx_list;
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struct scatterlist *sg;
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unsigned int sg_len;
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enum dma_status status;
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};
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};
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struct tsi721_bdma_chan {
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struct tsi721_bdma_chan {
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int id;
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int id;
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void __iomem *regs;
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void __iomem *regs;
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int bd_num; /* number of buffer descriptors */
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int bd_num; /* number of HW buffer descriptors */
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void *bd_base; /* start of DMA descriptors */
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void *bd_base; /* start of DMA descriptors */
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dma_addr_t bd_phys;
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dma_addr_t bd_phys;
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void *sts_base; /* start of DMA BD status FIFO */
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void *sts_base; /* start of DMA BD status FIFO */
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@ -680,7 +679,6 @@ struct tsi721_bdma_chan {
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struct list_head active_list;
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struct list_head active_list;
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struct list_head queue;
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struct list_head queue;
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struct list_head free_list;
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struct list_head free_list;
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dma_cookie_t completed_cookie;
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struct tasklet_struct tasklet;
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struct tasklet_struct tasklet;
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bool active;
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bool active;
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};
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};
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