From 97c202c6d7b417aa52bc9b98d252db916aafdf76 Mon Sep 17 00:00:00 2001 From: Jordan Crouse Date: Mon, 13 Feb 2017 10:14:34 -0700 Subject: [PATCH] drm/msm: Mark the microcode buffers as read-only The PFP/ME and GPMU memory needs to be GPU accessible but it does not need to be written by the GPU. Mark them as read-only to avoid corruption. Change-Id: Ic0dedbadc848f0a6693a4e57567077bbab38e9a5 Signed-off-by: Jordan Crouse --- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 3 ++- drivers/gpu/drm/msm/adreno/a5xx_power.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c index 9049bf2aa68b..f5847bc60c49 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c @@ -410,7 +410,8 @@ static struct drm_gem_object *a5xx_ucode_load_bo(struct msm_gpu *gpu, void *ptr; mutex_lock(&drm->struct_mutex); - bo = msm_gem_new(drm, fw->size - 4, MSM_BO_UNCACHED); + bo = msm_gem_new(drm, fw->size - 4, + MSM_BO_UNCACHED | MSM_BO_GPU_READONLY); mutex_unlock(&drm->struct_mutex); if (IS_ERR(bo)) diff --git a/drivers/gpu/drm/msm/adreno/a5xx_power.c b/drivers/gpu/drm/msm/adreno/a5xx_power.c index e77592e2272b..e04feaadefb9 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_power.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_power.c @@ -459,7 +459,8 @@ void a5xx_gpmu_ucode_init(struct msm_gpu *gpu) bosize = (cmds_size + (cmds_size / TYPE4_MAX_PAYLOAD) + 1) << 2; mutex_lock(&drm->struct_mutex); - a5xx_gpu->gpmu_bo = msm_gem_new(drm, bosize, MSM_BO_UNCACHED); + a5xx_gpu->gpmu_bo = msm_gem_new(drm, bosize, + MSM_BO_UNCACHED | MSM_BO_GPU_READONLY); mutex_unlock(&drm->struct_mutex); if (IS_ERR(a5xx_gpu->gpmu_bo))