msm: camera: uapi header split
Move userspace visible definitions to the uapi directory. Change-Id: I95b754a1f888f849eb50e449a211b18633aff6a2 Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org> Signed-off-by: Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
This commit is contained in:
Jeremy Gebben
David Keitel
parent
c5e2206a33
commit
52fc5f122d
20 changed files with 1995 additions and 1981 deletions
|
|
@ -26,8 +26,6 @@
|
|||
#include <media/v4l2-ioctl.h>
|
||||
#include <media/v4l2-device.h>
|
||||
#include <media/videobuf2-core.h>
|
||||
#include <media/msm_camera.h>
|
||||
#include <media/msm_isp.h>
|
||||
|
||||
#include "msm.h"
|
||||
#include "msm_buf_mgr.h"
|
||||
|
|
|
|||
|
|
@ -25,7 +25,6 @@
|
|||
#include <linux/timer.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/workqueue.h>
|
||||
#include <media/msm_isp.h>
|
||||
#include <media/v4l2-event.h>
|
||||
#include <media/v4l2-ioctl.h>
|
||||
#include <media/msmb_camera.h>
|
||||
|
|
|
|||
|
|
@ -17,7 +17,6 @@
|
|||
#include <linux/of.h>
|
||||
#include <linux/of_gpio.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <media/msm_isp.h>
|
||||
#include "msm_sd.h"
|
||||
#include "msm_cci.h"
|
||||
#include "msm_cam_cci_hwreg.h"
|
||||
|
|
|
|||
|
|
@ -1,311 +1,12 @@
|
|||
#ifndef __LINUX_MSM_CAM_SENSOR_H
|
||||
#define __LINUX_MSM_CAM_SENSOR_H
|
||||
|
||||
#ifdef MSM_CAMERA_BIONIC
|
||||
#include <sys/types.h>
|
||||
#endif
|
||||
#include <uapi/media/msm_cam_sensor.h>
|
||||
|
||||
#include <linux/v4l2-mediabus.h>
|
||||
#include <media/msm_camsensor_sdk.h>
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/i2c.h>
|
||||
#ifdef CONFIG_COMPAT
|
||||
#include <linux/compat.h>
|
||||
#endif
|
||||
|
||||
#define I2C_SEQ_REG_SETTING_MAX 5
|
||||
|
||||
#define MSM_SENSOR_MCLK_8HZ 8000000
|
||||
#define MSM_SENSOR_MCLK_16HZ 16000000
|
||||
#define MSM_SENSOR_MCLK_24HZ 24000000
|
||||
|
||||
#define MAX_SENSOR_NAME 32
|
||||
#define MAX_ACTUATOR_AF_TOTAL_STEPS 1024
|
||||
|
||||
#define MAX_OIS_MOD_NAME_SIZE 32
|
||||
#define MAX_OIS_NAME_SIZE 32
|
||||
#define MAX_OIS_REG_SETTINGS 800
|
||||
|
||||
#define MOVE_NEAR 0
|
||||
#define MOVE_FAR 1
|
||||
|
||||
#define MSM_ACTUATOR_MOVE_SIGNED_FAR -1
|
||||
#define MSM_ACTUATOR_MOVE_SIGNED_NEAR 1
|
||||
|
||||
#define MAX_ACTUATOR_REGION 5
|
||||
|
||||
#define MAX_EEPROM_NAME 32
|
||||
|
||||
#define MAX_AF_ITERATIONS 3
|
||||
#define MAX_NUMBER_OF_STEPS 47
|
||||
#define MAX_REGULATOR 5
|
||||
|
||||
#define MSM_V4L2_PIX_FMT_META v4l2_fourcc('M', 'E', 'T', 'A') /* META */
|
||||
#define MSM_V4L2_PIX_FMT_SBGGR14 v4l2_fourcc('B', 'G', '1', '4')
|
||||
/* 14 BGBG.. GRGR.. */
|
||||
#define MSM_V4L2_PIX_FMT_SGBRG14 v4l2_fourcc('G', 'B', '1', '4')
|
||||
/* 14 GBGB.. RGRG.. */
|
||||
#define MSM_V4L2_PIX_FMT_SGRBG14 v4l2_fourcc('B', 'A', '1', '4')
|
||||
/* 14 GRGR.. BGBG.. */
|
||||
#define MSM_V4L2_PIX_FMT_SRGGB14 v4l2_fourcc('R', 'G', '1', '4')
|
||||
/* 14 RGRG.. GBGB.. */
|
||||
|
||||
enum flash_type {
|
||||
LED_FLASH = 1,
|
||||
STROBE_FLASH,
|
||||
GPIO_FLASH
|
||||
};
|
||||
|
||||
enum msm_sensor_resolution_t {
|
||||
MSM_SENSOR_RES_FULL,
|
||||
MSM_SENSOR_RES_QTR,
|
||||
MSM_SENSOR_RES_2,
|
||||
MSM_SENSOR_RES_3,
|
||||
MSM_SENSOR_RES_4,
|
||||
MSM_SENSOR_RES_5,
|
||||
MSM_SENSOR_RES_6,
|
||||
MSM_SENSOR_RES_7,
|
||||
MSM_SENSOR_INVALID_RES,
|
||||
};
|
||||
|
||||
enum msm_camera_stream_type_t {
|
||||
MSM_CAMERA_STREAM_PREVIEW,
|
||||
MSM_CAMERA_STREAM_SNAPSHOT,
|
||||
MSM_CAMERA_STREAM_VIDEO,
|
||||
MSM_CAMERA_STREAM_INVALID,
|
||||
};
|
||||
|
||||
enum sensor_sub_module_t {
|
||||
SUB_MODULE_SENSOR,
|
||||
SUB_MODULE_CHROMATIX,
|
||||
SUB_MODULE_ACTUATOR,
|
||||
SUB_MODULE_EEPROM,
|
||||
SUB_MODULE_LED_FLASH,
|
||||
SUB_MODULE_STROBE_FLASH,
|
||||
SUB_MODULE_CSID,
|
||||
SUB_MODULE_CSID_3D,
|
||||
SUB_MODULE_CSIPHY,
|
||||
SUB_MODULE_CSIPHY_3D,
|
||||
SUB_MODULE_OIS,
|
||||
SUB_MODULE_EXT,
|
||||
SUB_MODULE_MAX,
|
||||
};
|
||||
|
||||
enum {
|
||||
MSM_CAMERA_EFFECT_MODE_OFF,
|
||||
MSM_CAMERA_EFFECT_MODE_MONO,
|
||||
MSM_CAMERA_EFFECT_MODE_NEGATIVE,
|
||||
MSM_CAMERA_EFFECT_MODE_SOLARIZE,
|
||||
MSM_CAMERA_EFFECT_MODE_SEPIA,
|
||||
MSM_CAMERA_EFFECT_MODE_POSTERIZE,
|
||||
MSM_CAMERA_EFFECT_MODE_WHITEBOARD,
|
||||
MSM_CAMERA_EFFECT_MODE_BLACKBOARD,
|
||||
MSM_CAMERA_EFFECT_MODE_AQUA,
|
||||
MSM_CAMERA_EFFECT_MODE_EMBOSS,
|
||||
MSM_CAMERA_EFFECT_MODE_SKETCH,
|
||||
MSM_CAMERA_EFFECT_MODE_NEON,
|
||||
MSM_CAMERA_EFFECT_MODE_MAX
|
||||
};
|
||||
|
||||
enum {
|
||||
MSM_CAMERA_WB_MODE_AUTO,
|
||||
MSM_CAMERA_WB_MODE_CUSTOM,
|
||||
MSM_CAMERA_WB_MODE_INCANDESCENT,
|
||||
MSM_CAMERA_WB_MODE_FLUORESCENT,
|
||||
MSM_CAMERA_WB_MODE_WARM_FLUORESCENT,
|
||||
MSM_CAMERA_WB_MODE_DAYLIGHT,
|
||||
MSM_CAMERA_WB_MODE_CLOUDY_DAYLIGHT,
|
||||
MSM_CAMERA_WB_MODE_TWILIGHT,
|
||||
MSM_CAMERA_WB_MODE_SHADE,
|
||||
MSM_CAMERA_WB_MODE_OFF,
|
||||
MSM_CAMERA_WB_MODE_MAX
|
||||
};
|
||||
|
||||
enum {
|
||||
MSM_CAMERA_SCENE_MODE_OFF,
|
||||
MSM_CAMERA_SCENE_MODE_AUTO,
|
||||
MSM_CAMERA_SCENE_MODE_LANDSCAPE,
|
||||
MSM_CAMERA_SCENE_MODE_SNOW,
|
||||
MSM_CAMERA_SCENE_MODE_BEACH,
|
||||
MSM_CAMERA_SCENE_MODE_SUNSET,
|
||||
MSM_CAMERA_SCENE_MODE_NIGHT,
|
||||
MSM_CAMERA_SCENE_MODE_PORTRAIT,
|
||||
MSM_CAMERA_SCENE_MODE_BACKLIGHT,
|
||||
MSM_CAMERA_SCENE_MODE_SPORTS,
|
||||
MSM_CAMERA_SCENE_MODE_ANTISHAKE,
|
||||
MSM_CAMERA_SCENE_MODE_FLOWERS,
|
||||
MSM_CAMERA_SCENE_MODE_CANDLELIGHT,
|
||||
MSM_CAMERA_SCENE_MODE_FIREWORKS,
|
||||
MSM_CAMERA_SCENE_MODE_PARTY,
|
||||
MSM_CAMERA_SCENE_MODE_NIGHT_PORTRAIT,
|
||||
MSM_CAMERA_SCENE_MODE_THEATRE,
|
||||
MSM_CAMERA_SCENE_MODE_ACTION,
|
||||
MSM_CAMERA_SCENE_MODE_AR,
|
||||
MSM_CAMERA_SCENE_MODE_FACE_PRIORITY,
|
||||
MSM_CAMERA_SCENE_MODE_BARCODE,
|
||||
MSM_CAMERA_SCENE_MODE_HDR,
|
||||
MSM_CAMERA_SCENE_MODE_MAX
|
||||
};
|
||||
|
||||
enum csid_cfg_type_t {
|
||||
CSID_INIT,
|
||||
CSID_CFG,
|
||||
CSID_TESTMODE_CFG,
|
||||
CSID_RELEASE,
|
||||
};
|
||||
|
||||
enum csiphy_cfg_type_t {
|
||||
CSIPHY_INIT,
|
||||
CSIPHY_CFG,
|
||||
CSIPHY_RELEASE,
|
||||
};
|
||||
|
||||
enum camera_vreg_type {
|
||||
VREG_TYPE_DEFAULT,
|
||||
VREG_TYPE_CUSTOM,
|
||||
};
|
||||
|
||||
enum sensor_af_t {
|
||||
SENSOR_AF_FOCUSSED,
|
||||
SENSOR_AF_NOT_FOCUSSED,
|
||||
};
|
||||
|
||||
enum cci_i2c_master_t {
|
||||
MASTER_0,
|
||||
MASTER_1,
|
||||
MASTER_MAX,
|
||||
};
|
||||
|
||||
struct msm_camera_i2c_array_write_config {
|
||||
struct msm_camera_i2c_reg_setting conf_array;
|
||||
uint16_t slave_addr;
|
||||
};
|
||||
|
||||
struct msm_camera_i2c_read_config {
|
||||
uint16_t slave_addr;
|
||||
uint16_t reg_addr;
|
||||
enum msm_camera_i2c_reg_addr_type addr_type;
|
||||
enum msm_camera_i2c_data_type data_type;
|
||||
uint16_t data;
|
||||
};
|
||||
|
||||
struct msm_camera_csi2_params {
|
||||
struct msm_camera_csid_params csid_params;
|
||||
struct msm_camera_csiphy_params csiphy_params;
|
||||
uint8_t csi_clk_scale_enable;
|
||||
};
|
||||
|
||||
struct msm_camera_csi_lane_params {
|
||||
uint16_t csi_lane_assign;
|
||||
uint16_t csi_lane_mask;
|
||||
};
|
||||
|
||||
struct csi_lane_params_t {
|
||||
uint16_t csi_lane_assign;
|
||||
uint8_t csi_lane_mask;
|
||||
uint8_t csi_if;
|
||||
int8_t csid_core[2];
|
||||
uint8_t csi_phy_sel;
|
||||
};
|
||||
|
||||
struct msm_sensor_info_t {
|
||||
char sensor_name[MAX_SENSOR_NAME];
|
||||
uint32_t session_id;
|
||||
int32_t subdev_id[SUB_MODULE_MAX];
|
||||
int32_t subdev_intf[SUB_MODULE_MAX];
|
||||
uint8_t is_mount_angle_valid;
|
||||
uint32_t sensor_mount_angle;
|
||||
int modes_supported;
|
||||
enum camb_position_t position;
|
||||
};
|
||||
|
||||
struct camera_vreg_t {
|
||||
const char *reg_name;
|
||||
int min_voltage;
|
||||
int max_voltage;
|
||||
int op_mode;
|
||||
uint32_t delay;
|
||||
const char *custom_vreg_name;
|
||||
enum camera_vreg_type type;
|
||||
};
|
||||
|
||||
struct sensorb_cfg_data {
|
||||
int cfgtype;
|
||||
union {
|
||||
struct msm_sensor_info_t sensor_info;
|
||||
struct msm_sensor_init_params sensor_init_params;
|
||||
void *setting;
|
||||
struct msm_sensor_i2c_sync_params sensor_i2c_sync_params;
|
||||
} cfg;
|
||||
};
|
||||
|
||||
struct csid_cfg_data {
|
||||
enum csid_cfg_type_t cfgtype;
|
||||
union {
|
||||
uint32_t csid_version;
|
||||
struct msm_camera_csid_params *csid_params;
|
||||
struct msm_camera_csid_testmode_parms *csid_testmode_params;
|
||||
} cfg;
|
||||
};
|
||||
|
||||
struct csiphy_cfg_data {
|
||||
enum csiphy_cfg_type_t cfgtype;
|
||||
union {
|
||||
struct msm_camera_csiphy_params *csiphy_params;
|
||||
struct msm_camera_csi_lane_params *csi_lane_params;
|
||||
} cfg;
|
||||
};
|
||||
|
||||
enum eeprom_cfg_type_t {
|
||||
CFG_EEPROM_GET_INFO,
|
||||
CFG_EEPROM_GET_CAL_DATA,
|
||||
CFG_EEPROM_READ_CAL_DATA,
|
||||
CFG_EEPROM_WRITE_DATA,
|
||||
CFG_EEPROM_GET_MM_INFO,
|
||||
CFG_EEPROM_INIT,
|
||||
};
|
||||
|
||||
struct eeprom_get_t {
|
||||
uint32_t num_bytes;
|
||||
};
|
||||
|
||||
struct eeprom_read_t {
|
||||
uint8_t *dbuffer;
|
||||
uint32_t num_bytes;
|
||||
};
|
||||
|
||||
struct eeprom_write_t {
|
||||
uint8_t *dbuffer;
|
||||
uint32_t num_bytes;
|
||||
};
|
||||
|
||||
struct eeprom_get_cmm_t {
|
||||
uint32_t cmm_support;
|
||||
uint32_t cmm_compression;
|
||||
uint32_t cmm_size;
|
||||
};
|
||||
|
||||
struct msm_eeprom_info_t {
|
||||
struct msm_sensor_power_setting_array *power_setting_array;
|
||||
enum i2c_freq_mode_t i2c_freq_mode;
|
||||
struct msm_eeprom_memory_map_array *mem_map_array;
|
||||
};
|
||||
|
||||
struct msm_eeprom_cfg_data {
|
||||
enum eeprom_cfg_type_t cfgtype;
|
||||
uint8_t is_supported;
|
||||
union {
|
||||
char eeprom_name[MAX_SENSOR_NAME];
|
||||
struct eeprom_get_t get_data;
|
||||
struct eeprom_read_t read_data;
|
||||
struct eeprom_write_t write_data;
|
||||
struct eeprom_get_cmm_t get_cmm_data;
|
||||
struct msm_eeprom_info_t eeprom_info;
|
||||
} cfg;
|
||||
};
|
||||
|
||||
#ifdef CONFIG_COMPAT
|
||||
|
||||
struct msm_sensor_power_setting32 {
|
||||
enum msm_sensor_power_seq_type_t seq_type;
|
||||
uint16_t seq_val;
|
||||
|
|
@ -405,271 +106,7 @@ struct msm_camera_i2c_seq_reg_setting32 {
|
|||
enum msm_camera_i2c_reg_addr_type addr_type;
|
||||
uint16_t delay;
|
||||
};
|
||||
#endif
|
||||
|
||||
enum msm_sensor_cfg_type_t {
|
||||
CFG_SET_SLAVE_INFO,
|
||||
CFG_SLAVE_READ_I2C,
|
||||
CFG_WRITE_I2C_ARRAY,
|
||||
CFG_SLAVE_WRITE_I2C_ARRAY,
|
||||
CFG_WRITE_I2C_SEQ_ARRAY,
|
||||
CFG_POWER_UP,
|
||||
CFG_POWER_DOWN,
|
||||
CFG_SET_STOP_STREAM_SETTING,
|
||||
CFG_GET_SENSOR_INFO,
|
||||
CFG_GET_SENSOR_INIT_PARAMS,
|
||||
CFG_SET_INIT_SETTING,
|
||||
CFG_SET_RESOLUTION,
|
||||
CFG_SET_STOP_STREAM,
|
||||
CFG_SET_START_STREAM,
|
||||
CFG_SET_SATURATION,
|
||||
CFG_SET_CONTRAST,
|
||||
CFG_SET_SHARPNESS,
|
||||
CFG_SET_ISO,
|
||||
CFG_SET_EXPOSURE_COMPENSATION,
|
||||
CFG_SET_ANTIBANDING,
|
||||
CFG_SET_BESTSHOT_MODE,
|
||||
CFG_SET_EFFECT,
|
||||
CFG_SET_WHITE_BALANCE,
|
||||
CFG_SET_AUTOFOCUS,
|
||||
CFG_CANCEL_AUTOFOCUS,
|
||||
CFG_SET_STREAM_TYPE,
|
||||
CFG_SET_I2C_SYNC_PARAM,
|
||||
CFG_WRITE_I2C_ARRAY_ASYNC,
|
||||
CFG_WRITE_I2C_ARRAY_SYNC,
|
||||
CFG_WRITE_I2C_ARRAY_SYNC_BLOCK,
|
||||
};
|
||||
|
||||
enum msm_actuator_cfg_type_t {
|
||||
CFG_GET_ACTUATOR_INFO,
|
||||
CFG_SET_ACTUATOR_INFO,
|
||||
CFG_SET_DEFAULT_FOCUS,
|
||||
CFG_MOVE_FOCUS,
|
||||
CFG_SET_POSITION,
|
||||
CFG_ACTUATOR_POWERDOWN,
|
||||
CFG_ACTUATOR_POWERUP,
|
||||
CFG_ACTUATOR_INIT,
|
||||
};
|
||||
|
||||
enum msm_ois_cfg_type_t {
|
||||
CFG_OIS_INIT,
|
||||
CFG_OIS_POWERDOWN,
|
||||
CFG_OIS_POWERUP,
|
||||
CFG_OIS_CONTROL,
|
||||
CFG_OIS_I2C_WRITE_SEQ_TABLE,
|
||||
};
|
||||
|
||||
enum msm_ois_i2c_operation {
|
||||
MSM_OIS_WRITE = 0,
|
||||
MSM_OIS_POLL,
|
||||
};
|
||||
|
||||
struct reg_settings_ois_t {
|
||||
uint16_t reg_addr;
|
||||
enum msm_camera_i2c_reg_addr_type addr_type;
|
||||
uint32_t reg_data;
|
||||
enum msm_camera_i2c_data_type data_type;
|
||||
enum msm_ois_i2c_operation i2c_operation;
|
||||
uint32_t delay;
|
||||
};
|
||||
|
||||
struct msm_ois_params_t {
|
||||
uint16_t data_size;
|
||||
uint16_t setting_size;
|
||||
uint32_t i2c_addr;
|
||||
enum i2c_freq_mode_t i2c_freq_mode;
|
||||
enum msm_camera_i2c_reg_addr_type i2c_addr_type;
|
||||
enum msm_camera_i2c_data_type i2c_data_type;
|
||||
struct reg_settings_ois_t *settings;
|
||||
};
|
||||
|
||||
struct msm_ois_set_info_t {
|
||||
struct msm_ois_params_t ois_params;
|
||||
};
|
||||
|
||||
struct msm_actuator_move_params_t {
|
||||
int8_t dir;
|
||||
int8_t sign_dir;
|
||||
int16_t dest_step_pos;
|
||||
int32_t num_steps;
|
||||
uint16_t curr_lens_pos;
|
||||
struct damping_params_t *ringing_params;
|
||||
};
|
||||
|
||||
struct msm_actuator_tuning_params_t {
|
||||
int16_t initial_code;
|
||||
uint16_t pwd_step;
|
||||
uint16_t region_size;
|
||||
uint32_t total_steps;
|
||||
struct region_params_t *region_params;
|
||||
};
|
||||
|
||||
struct park_lens_data_t {
|
||||
uint32_t damping_step;
|
||||
uint32_t damping_delay;
|
||||
uint32_t hw_params;
|
||||
uint32_t max_step;
|
||||
};
|
||||
|
||||
struct msm_actuator_params_t {
|
||||
enum actuator_type act_type;
|
||||
uint8_t reg_tbl_size;
|
||||
uint16_t data_size;
|
||||
uint16_t init_setting_size;
|
||||
uint32_t i2c_addr;
|
||||
enum i2c_freq_mode_t i2c_freq_mode;
|
||||
enum msm_actuator_addr_type i2c_addr_type;
|
||||
enum msm_actuator_data_type i2c_data_type;
|
||||
struct msm_actuator_reg_params_t *reg_tbl_params;
|
||||
struct reg_settings_t *init_settings;
|
||||
struct park_lens_data_t park_lens;
|
||||
};
|
||||
|
||||
struct msm_actuator_set_info_t {
|
||||
struct msm_actuator_params_t actuator_params;
|
||||
struct msm_actuator_tuning_params_t af_tuning_params;
|
||||
};
|
||||
|
||||
struct msm_actuator_get_info_t {
|
||||
uint32_t focal_length_num;
|
||||
uint32_t focal_length_den;
|
||||
uint32_t f_number_num;
|
||||
uint32_t f_number_den;
|
||||
uint32_t f_pix_num;
|
||||
uint32_t f_pix_den;
|
||||
uint32_t total_f_dist_num;
|
||||
uint32_t total_f_dist_den;
|
||||
uint32_t hor_view_angle_num;
|
||||
uint32_t hor_view_angle_den;
|
||||
uint32_t ver_view_angle_num;
|
||||
uint32_t ver_view_angle_den;
|
||||
};
|
||||
|
||||
enum af_camera_name {
|
||||
ACTUATOR_MAIN_CAM_0,
|
||||
ACTUATOR_MAIN_CAM_1,
|
||||
ACTUATOR_MAIN_CAM_2,
|
||||
ACTUATOR_MAIN_CAM_3,
|
||||
ACTUATOR_MAIN_CAM_4,
|
||||
ACTUATOR_MAIN_CAM_5,
|
||||
ACTUATOR_WEB_CAM_0,
|
||||
ACTUATOR_WEB_CAM_1,
|
||||
ACTUATOR_WEB_CAM_2,
|
||||
};
|
||||
|
||||
struct msm_ois_cfg_data {
|
||||
int cfgtype;
|
||||
union {
|
||||
struct msm_ois_set_info_t set_info;
|
||||
struct msm_camera_i2c_seq_reg_setting *settings;
|
||||
} cfg;
|
||||
};
|
||||
|
||||
struct msm_actuator_set_position_t {
|
||||
uint16_t number_of_steps;
|
||||
uint32_t hw_params;
|
||||
uint16_t pos[MAX_NUMBER_OF_STEPS];
|
||||
uint16_t delay[MAX_NUMBER_OF_STEPS];
|
||||
};
|
||||
|
||||
struct msm_actuator_cfg_data {
|
||||
int cfgtype;
|
||||
uint8_t is_af_supported;
|
||||
union {
|
||||
struct msm_actuator_move_params_t move;
|
||||
struct msm_actuator_set_info_t set_info;
|
||||
struct msm_actuator_get_info_t get_info;
|
||||
struct msm_actuator_set_position_t setpos;
|
||||
enum af_camera_name cam_name;
|
||||
} cfg;
|
||||
};
|
||||
|
||||
enum msm_camera_led_config_t {
|
||||
MSM_CAMERA_LED_OFF,
|
||||
MSM_CAMERA_LED_LOW,
|
||||
MSM_CAMERA_LED_HIGH,
|
||||
MSM_CAMERA_LED_INIT,
|
||||
MSM_CAMERA_LED_RELEASE,
|
||||
};
|
||||
|
||||
struct msm_camera_led_cfg_t {
|
||||
enum msm_camera_led_config_t cfgtype;
|
||||
int32_t torch_current[MAX_LED_TRIGGERS];
|
||||
int32_t flash_current[MAX_LED_TRIGGERS];
|
||||
int32_t flash_duration[MAX_LED_TRIGGERS];
|
||||
};
|
||||
|
||||
struct msm_flash_init_info_t {
|
||||
enum msm_flash_driver_type flash_driver_type;
|
||||
uint32_t slave_addr;
|
||||
enum i2c_freq_mode_t i2c_freq_mode;
|
||||
struct msm_sensor_power_setting_array *power_setting_array;
|
||||
struct msm_camera_i2c_reg_setting_array *settings;
|
||||
};
|
||||
|
||||
struct msm_flash_cfg_data_t {
|
||||
enum msm_flash_cfg_type_t cfg_type;
|
||||
int32_t flash_current[MAX_LED_TRIGGERS];
|
||||
int32_t flash_duration[MAX_LED_TRIGGERS];
|
||||
union {
|
||||
struct msm_flash_init_info_t *flash_init_info;
|
||||
struct msm_camera_i2c_reg_setting_array *settings;
|
||||
} cfg;
|
||||
};
|
||||
|
||||
/* sensor init structures and enums */
|
||||
enum msm_sensor_init_cfg_type_t {
|
||||
CFG_SINIT_PROBE,
|
||||
CFG_SINIT_PROBE_DONE,
|
||||
CFG_SINIT_PROBE_WAIT_DONE,
|
||||
};
|
||||
|
||||
struct sensor_init_cfg_data {
|
||||
enum msm_sensor_init_cfg_type_t cfgtype;
|
||||
struct msm_sensor_info_t probed_info;
|
||||
char entity_name[MAX_SENSOR_NAME];
|
||||
union {
|
||||
void *setting;
|
||||
} cfg;
|
||||
};
|
||||
|
||||
#define VIDIOC_MSM_SENSOR_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct sensorb_cfg_data)
|
||||
|
||||
#define VIDIOC_MSM_SENSOR_RELEASE \
|
||||
_IO('V', BASE_VIDIOC_PRIVATE + 2)
|
||||
|
||||
#define VIDIOC_MSM_SENSOR_GET_SUBDEV_ID \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 3, uint32_t)
|
||||
|
||||
#define VIDIOC_MSM_CSIPHY_IO_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct csiphy_cfg_data)
|
||||
|
||||
#define VIDIOC_MSM_CSID_IO_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct csid_cfg_data)
|
||||
|
||||
#define VIDIOC_MSM_ACTUATOR_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct msm_actuator_cfg_data)
|
||||
|
||||
#define VIDIOC_MSM_FLASH_LED_DATA_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_camera_led_cfg_t)
|
||||
|
||||
#define VIDIOC_MSM_EEPROM_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_eeprom_cfg_data)
|
||||
|
||||
#define VIDIOC_MSM_SENSOR_GET_AF_STATUS \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 9, uint32_t)
|
||||
|
||||
#define VIDIOC_MSM_SENSOR_INIT_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 10, struct sensor_init_cfg_data)
|
||||
|
||||
#define VIDIOC_MSM_OIS_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 11, struct msm_ois_cfg_data)
|
||||
|
||||
#define VIDIOC_MSM_FLASH_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 13, struct msm_flash_cfg_data_t)
|
||||
|
||||
#ifdef CONFIG_COMPAT
|
||||
struct msm_camera_i2c_reg_setting32 {
|
||||
compat_uptr_t reg_setting;
|
||||
uint16_t size;
|
||||
|
|
@ -823,4 +260,5 @@ struct msm_flash_cfg_data_t32 {
|
|||
_IOWR('V', BASE_VIDIOC_PRIVATE + 13, struct msm_flash_cfg_data_t32)
|
||||
#endif
|
||||
|
||||
#endif /* __LINUX_MSM_CAM_SENSOR_H */
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
|
||||
/* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
|
|
@ -13,5 +13,25 @@
|
|||
#define __MSM_FD__
|
||||
|
||||
#include <uapi/media/msm_fd.h>
|
||||
#include <linux/compat.h>
|
||||
|
||||
#ifdef CONFIG_COMPAT
|
||||
/*
|
||||
* struct msm_fd_result32 - Compat structure contain detected faces result.
|
||||
* @frame_id: Frame id of requested result.
|
||||
* @face_cnt: Number of result faces, driver can modify this value (to smaller)
|
||||
* @face_data: Pointer to array of face data structures.
|
||||
* Array size should not be smaller then face_cnt.
|
||||
*/
|
||||
struct msm_fd_result32 {
|
||||
__u32 frame_id;
|
||||
__u32 face_cnt;
|
||||
compat_uptr_t face_data;
|
||||
};
|
||||
|
||||
/* MSM FD compat private ioctl ID */
|
||||
#define VIDIOC_MSM_FD_GET_RESULT32 \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_fd_result32)
|
||||
#endif
|
||||
|
||||
#endif /* __MSM_FD__ */
|
||||
|
|
|
|||
|
|
@ -1,18 +0,0 @@
|
|||
/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __MSM_JPEG_DMA__
|
||||
#define __MSM_JPEG_DMA__
|
||||
|
||||
#include <uapi/media/msm_jpeg_dma.h>
|
||||
|
||||
#endif /* __MSM_JPEG_DMA__ */
|
||||
|
|
@ -1,27 +1,7 @@
|
|||
#ifndef __LINUX_MSMB_CAMERA_H
|
||||
#define __LINUX_MSMB_CAMERA_H
|
||||
|
||||
#include <linux/videodev2.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/ioctl.h>
|
||||
|
||||
#define MSM_CAM_LOGSYNC_FILE_NAME "logsync"
|
||||
#define MSM_CAM_LOGSYNC_FILE_BASEDIR "camera"
|
||||
|
||||
#define MSM_CAM_V4L2_IOCTL_NOTIFY \
|
||||
_IOW('V', BASE_VIDIOC_PRIVATE + 30, struct msm_v4l2_event_data)
|
||||
|
||||
#define MSM_CAM_V4L2_IOCTL_NOTIFY_META \
|
||||
_IOW('V', BASE_VIDIOC_PRIVATE + 31, struct msm_v4l2_event_data)
|
||||
|
||||
#define MSM_CAM_V4L2_IOCTL_CMD_ACK \
|
||||
_IOW('V', BASE_VIDIOC_PRIVATE + 32, struct msm_v4l2_event_data)
|
||||
|
||||
#define MSM_CAM_V4L2_IOCTL_NOTIFY_ERROR \
|
||||
_IOW('V', BASE_VIDIOC_PRIVATE + 33, struct msm_v4l2_event_data)
|
||||
|
||||
#define MSM_CAM_V4L2_IOCTL_NOTIFY_DEBUG \
|
||||
_IOW('V', BASE_VIDIOC_PRIVATE + 34, struct msm_v4l2_event_data)
|
||||
#include <uapi/media/msmb_camera.h>
|
||||
|
||||
#ifdef CONFIG_COMPAT
|
||||
#define MSM_CAM_V4L2_IOCTL_NOTIFY32 \
|
||||
|
|
@ -41,180 +21,5 @@
|
|||
|
||||
#endif
|
||||
|
||||
#define QCAMERA_DEVICE_GROUP_ID 1
|
||||
#define QCAMERA_VNODE_GROUP_ID 2
|
||||
#define MSM_CAMERA_NAME "msm_camera"
|
||||
#define MSM_CONFIGURATION_NAME "msm_config"
|
||||
#endif
|
||||
|
||||
#define MSM_CAMERA_SUBDEV_CSIPHY 0
|
||||
#define MSM_CAMERA_SUBDEV_CSID 1
|
||||
#define MSM_CAMERA_SUBDEV_ISPIF 2
|
||||
#define MSM_CAMERA_SUBDEV_VFE 3
|
||||
#define MSM_CAMERA_SUBDEV_AXI 4
|
||||
#define MSM_CAMERA_SUBDEV_VPE 5
|
||||
#define MSM_CAMERA_SUBDEV_SENSOR 6
|
||||
#define MSM_CAMERA_SUBDEV_ACTUATOR 7
|
||||
#define MSM_CAMERA_SUBDEV_EEPROM 8
|
||||
#define MSM_CAMERA_SUBDEV_CPP 9
|
||||
#define MSM_CAMERA_SUBDEV_CCI 10
|
||||
#define MSM_CAMERA_SUBDEV_LED_FLASH 11
|
||||
#define MSM_CAMERA_SUBDEV_STROBE_FLASH 12
|
||||
#define MSM_CAMERA_SUBDEV_BUF_MNGR 13
|
||||
#define MSM_CAMERA_SUBDEV_SENSOR_INIT 14
|
||||
#define MSM_CAMERA_SUBDEV_OIS 15
|
||||
#define MSM_CAMERA_SUBDEV_FLASH 16
|
||||
#define MSM_CAMERA_SUBDEV_EXT 17
|
||||
|
||||
#define MSM_MAX_CAMERA_SENSORS 5
|
||||
|
||||
/* The below macro is defined to put an upper limit on maximum
|
||||
* number of buffer requested per stream. In case of extremely
|
||||
* large value for number of buffer due to data structure corruption
|
||||
* we return error to avoid integer overflow. Group processing
|
||||
* can have max of 9 groups of 8 bufs each. This value may be
|
||||
* configured in future*/
|
||||
#define MSM_CAMERA_MAX_STREAM_BUF 72
|
||||
|
||||
/* Max batch size of processing */
|
||||
#define MSM_CAMERA_MAX_USER_BUFF_CNT 16
|
||||
|
||||
/* featur base */
|
||||
#define MSM_CAMERA_FEATURE_BASE 0x00010000
|
||||
#define MSM_CAMERA_FEATURE_SHUTDOWN (MSM_CAMERA_FEATURE_BASE + 1)
|
||||
|
||||
#define MSM_CAMERA_STATUS_BASE 0x00020000
|
||||
#define MSM_CAMERA_STATUS_FAIL (MSM_CAMERA_STATUS_BASE + 1)
|
||||
#define MSM_CAMERA_STATUS_SUCCESS (MSM_CAMERA_STATUS_BASE + 2)
|
||||
|
||||
/* event type */
|
||||
#define MSM_CAMERA_V4L2_EVENT_TYPE (V4L2_EVENT_PRIVATE_START + 0x00002000)
|
||||
|
||||
/* event id */
|
||||
#define MSM_CAMERA_EVENT_MIN 0
|
||||
#define MSM_CAMERA_NEW_SESSION (MSM_CAMERA_EVENT_MIN + 1)
|
||||
#define MSM_CAMERA_DEL_SESSION (MSM_CAMERA_EVENT_MIN + 2)
|
||||
#define MSM_CAMERA_SET_PARM (MSM_CAMERA_EVENT_MIN + 3)
|
||||
#define MSM_CAMERA_GET_PARM (MSM_CAMERA_EVENT_MIN + 4)
|
||||
#define MSM_CAMERA_MAPPING_CFG (MSM_CAMERA_EVENT_MIN + 5)
|
||||
#define MSM_CAMERA_MAPPING_SES (MSM_CAMERA_EVENT_MIN + 6)
|
||||
#define MSM_CAMERA_MSM_NOTIFY (MSM_CAMERA_EVENT_MIN + 7)
|
||||
#define MSM_CAMERA_EVENT_MAX (MSM_CAMERA_EVENT_MIN + 8)
|
||||
|
||||
/* data.command */
|
||||
#define MSM_CAMERA_PRIV_S_CROP (V4L2_CID_PRIVATE_BASE + 1)
|
||||
#define MSM_CAMERA_PRIV_G_CROP (V4L2_CID_PRIVATE_BASE + 2)
|
||||
#define MSM_CAMERA_PRIV_G_FMT (V4L2_CID_PRIVATE_BASE + 3)
|
||||
#define MSM_CAMERA_PRIV_S_FMT (V4L2_CID_PRIVATE_BASE + 4)
|
||||
#define MSM_CAMERA_PRIV_TRY_FMT (V4L2_CID_PRIVATE_BASE + 5)
|
||||
#define MSM_CAMERA_PRIV_METADATA (V4L2_CID_PRIVATE_BASE + 6)
|
||||
#define MSM_CAMERA_PRIV_QUERY_CAP (V4L2_CID_PRIVATE_BASE + 7)
|
||||
#define MSM_CAMERA_PRIV_STREAM_ON (V4L2_CID_PRIVATE_BASE + 8)
|
||||
#define MSM_CAMERA_PRIV_STREAM_OFF (V4L2_CID_PRIVATE_BASE + 9)
|
||||
#define MSM_CAMERA_PRIV_NEW_STREAM (V4L2_CID_PRIVATE_BASE + 10)
|
||||
#define MSM_CAMERA_PRIV_DEL_STREAM (V4L2_CID_PRIVATE_BASE + 11)
|
||||
#define MSM_CAMERA_PRIV_SHUTDOWN (V4L2_CID_PRIVATE_BASE + 12)
|
||||
#define MSM_CAMERA_PRIV_STREAM_INFO_SYNC \
|
||||
(V4L2_CID_PRIVATE_BASE + 13)
|
||||
#define MSM_CAMERA_PRIV_G_SESSION_ID (V4L2_CID_PRIVATE_BASE + 14)
|
||||
#define MSM_CAMERA_PRIV_CMD_MAX 20
|
||||
|
||||
/* data.status - success */
|
||||
#define MSM_CAMERA_CMD_SUCESS 0x00000001
|
||||
#define MSM_CAMERA_BUF_MAP_SUCESS 0x00000002
|
||||
|
||||
/* data.status - error */
|
||||
#define MSM_CAMERA_ERR_EVT_BASE 0x00010000
|
||||
#define MSM_CAMERA_ERR_CMD_FAIL (MSM_CAMERA_ERR_EVT_BASE + 1)
|
||||
#define MSM_CAMERA_ERR_MAPPING (MSM_CAMERA_ERR_EVT_BASE + 2)
|
||||
#define MSM_CAMERA_ERR_DEVICE_BUSY (MSM_CAMERA_ERR_EVT_BASE + 3)
|
||||
|
||||
/* The msm_v4l2_event_data structure should match the
|
||||
* v4l2_event.u.data field.
|
||||
* should not exceed 16 elements */
|
||||
struct msm_v4l2_event_data {
|
||||
/*word 0*/
|
||||
unsigned int command;
|
||||
/*word 1*/
|
||||
unsigned int status;
|
||||
/*word 2*/
|
||||
unsigned int session_id;
|
||||
/*word 3*/
|
||||
unsigned int stream_id;
|
||||
/*word 4*/
|
||||
unsigned int map_op;
|
||||
/*word 5*/
|
||||
unsigned int map_buf_idx;
|
||||
/*word 6*/
|
||||
unsigned int notify;
|
||||
/*word 7*/
|
||||
unsigned int arg_value;
|
||||
/*word 8*/
|
||||
unsigned int ret_value;
|
||||
/*word 9*/
|
||||
unsigned int v4l2_event_type;
|
||||
/*word 10*/
|
||||
unsigned int v4l2_event_id;
|
||||
/*word 11*/
|
||||
unsigned int handle;
|
||||
/*word 12*/
|
||||
unsigned int nop6;
|
||||
/*word 13*/
|
||||
unsigned int nop7;
|
||||
/*word 14*/
|
||||
unsigned int nop8;
|
||||
/*word 15*/
|
||||
unsigned int nop9;
|
||||
};
|
||||
|
||||
/* map to v4l2_format.fmt.raw_data */
|
||||
struct msm_v4l2_format_data {
|
||||
enum v4l2_buf_type type;
|
||||
unsigned int width;
|
||||
unsigned int height;
|
||||
unsigned int pixelformat; /* FOURCC */
|
||||
unsigned char num_planes;
|
||||
unsigned int plane_sizes[VIDEO_MAX_PLANES];
|
||||
};
|
||||
|
||||
/* MSM Four-character-code (FOURCC) */
|
||||
#define msm_v4l2_fourcc(a, b, c, d)\
|
||||
((__u32)(a) | ((__u32)(b) << 8) | ((__u32)(c) << 16) |\
|
||||
((__u32)(d) << 24))
|
||||
|
||||
/* Composite stats */
|
||||
#define MSM_V4L2_PIX_FMT_STATS_COMB v4l2_fourcc('S', 'T', 'C', 'M')
|
||||
/* AEC stats */
|
||||
#define MSM_V4L2_PIX_FMT_STATS_AE v4l2_fourcc('S', 'T', 'A', 'E')
|
||||
/* AF stats */
|
||||
#define MSM_V4L2_PIX_FMT_STATS_AF v4l2_fourcc('S', 'T', 'A', 'F')
|
||||
/* AWB stats */
|
||||
#define MSM_V4L2_PIX_FMT_STATS_AWB v4l2_fourcc('S', 'T', 'W', 'B')
|
||||
/* IHIST stats */
|
||||
#define MSM_V4L2_PIX_FMT_STATS_IHST v4l2_fourcc('I', 'H', 'S', 'T')
|
||||
/* Column count stats */
|
||||
#define MSM_V4L2_PIX_FMT_STATS_CS v4l2_fourcc('S', 'T', 'C', 'S')
|
||||
/* Row count stats */
|
||||
#define MSM_V4L2_PIX_FMT_STATS_RS v4l2_fourcc('S', 'T', 'R', 'S')
|
||||
/* Bayer Grid stats */
|
||||
#define MSM_V4L2_PIX_FMT_STATS_BG v4l2_fourcc('S', 'T', 'B', 'G')
|
||||
/* Bayer focus stats */
|
||||
#define MSM_V4L2_PIX_FMT_STATS_BF v4l2_fourcc('S', 'T', 'B', 'F')
|
||||
/* Bayer hist stats */
|
||||
#define MSM_V4L2_PIX_FMT_STATS_BHST v4l2_fourcc('B', 'H', 'S', 'T')
|
||||
|
||||
enum smmu_attach_mode {
|
||||
NON_SECURE_MODE = 0x01,
|
||||
SECURE_MODE = 0x02,
|
||||
MAX_PROTECTION_MODE = 0x03,
|
||||
};
|
||||
|
||||
struct msm_camera_smmu_attach_type {
|
||||
enum smmu_attach_mode attach;
|
||||
};
|
||||
|
||||
struct msm_camera_user_buf_cont_t {
|
||||
unsigned int buf_cnt;
|
||||
unsigned int buf_idx[MSM_CAMERA_MAX_USER_BUFF_CNT];
|
||||
};
|
||||
|
||||
#endif /* __LINUX_MSMB_CAMERA_H */
|
||||
|
|
|
|||
49
include/media/msmb_generic_buf_mgr.h
Normal file
49
include/media/msmb_generic_buf_mgr.h
Normal file
|
|
@ -0,0 +1,49 @@
|
|||
/* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __MEDIA_MSMB_GENERIC_BUF_MGR_H__
|
||||
#define __MEDIA_MSMB_GENERIC_BUF_MGR_H__
|
||||
|
||||
#include <uapi/media/msmb_generic_buf_mgr.h>
|
||||
#include <linux/compat.h>
|
||||
|
||||
struct v4l2_subdev *msm_buf_mngr_get_subdev(void);
|
||||
|
||||
#ifdef CONFIG_COMPAT
|
||||
|
||||
struct msm_buf_mngr_info32_t {
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
uint32_t frame_id;
|
||||
struct compat_timeval timestamp;
|
||||
uint32_t index;
|
||||
uint32_t reserved;
|
||||
enum msm_camera_buf_mngr_buf_type type;
|
||||
struct msm_camera_user_buf_cont_t user_buf;
|
||||
};
|
||||
|
||||
#define VIDIOC_MSM_BUF_MNGR_GET_BUF32 \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 33, struct msm_buf_mngr_info32_t)
|
||||
|
||||
#define VIDIOC_MSM_BUF_MNGR_PUT_BUF32 \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 34, struct msm_buf_mngr_info32_t)
|
||||
|
||||
#define VIDIOC_MSM_BUF_MNGR_BUF_DONE32 \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 35, struct msm_buf_mngr_info32_t)
|
||||
|
||||
#define VIDIOC_MSM_BUF_MNGR_FLUSH32 \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 39, struct msm_buf_mngr_info32_t)
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
|
|
@ -1,4 +1,4 @@
|
|||
/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
|
||||
/* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
|
|
@ -12,760 +12,7 @@
|
|||
#ifndef __MSMB_ISP__
|
||||
#define __MSMB_ISP__
|
||||
|
||||
#include <linux/videodev2.h>
|
||||
|
||||
#define MAX_PLANES_PER_STREAM 3
|
||||
#define MAX_NUM_STREAM 7
|
||||
|
||||
#define ISP_VERSION_47 47
|
||||
#define ISP_VERSION_46 46
|
||||
#define ISP_VERSION_44 44
|
||||
#define ISP_VERSION_40 40
|
||||
#define ISP_VERSION_32 32
|
||||
#define ISP_NATIVE_BUF_BIT (0x10000 << 0)
|
||||
#define ISP0_BIT (0x10000 << 1)
|
||||
#define ISP1_BIT (0x10000 << 2)
|
||||
#define ISP_META_CHANNEL_BIT (0x10000 << 3)
|
||||
#define ISP_SCRATCH_BUF_BIT (0x10000 << 4)
|
||||
#define ISP_OFFLINE_STATS_BIT (0x10000 << 5)
|
||||
#define ISP_STATS_STREAM_BIT 0x80000000
|
||||
|
||||
struct msm_vfe_cfg_cmd_list;
|
||||
|
||||
enum ISP_START_PIXEL_PATTERN {
|
||||
ISP_BAYER_RGRGRG,
|
||||
ISP_BAYER_GRGRGR,
|
||||
ISP_BAYER_BGBGBG,
|
||||
ISP_BAYER_GBGBGB,
|
||||
ISP_YUV_YCbYCr,
|
||||
ISP_YUV_YCrYCb,
|
||||
ISP_YUV_CbYCrY,
|
||||
ISP_YUV_CrYCbY,
|
||||
ISP_PIX_PATTERN_MAX
|
||||
};
|
||||
|
||||
enum msm_vfe_plane_fmt {
|
||||
Y_PLANE,
|
||||
CB_PLANE,
|
||||
CR_PLANE,
|
||||
CRCB_PLANE,
|
||||
CBCR_PLANE,
|
||||
VFE_PLANE_FMT_MAX
|
||||
};
|
||||
|
||||
enum msm_vfe_input_src {
|
||||
VFE_PIX_0,
|
||||
VFE_RAW_0,
|
||||
VFE_RAW_1,
|
||||
VFE_RAW_2,
|
||||
VFE_SRC_MAX,
|
||||
};
|
||||
|
||||
enum msm_vfe_axi_stream_src {
|
||||
PIX_ENCODER,
|
||||
PIX_VIEWFINDER,
|
||||
PIX_VIDEO,
|
||||
CAMIF_RAW,
|
||||
IDEAL_RAW,
|
||||
RDI_INTF_0,
|
||||
RDI_INTF_1,
|
||||
RDI_INTF_2,
|
||||
VFE_AXI_SRC_MAX
|
||||
};
|
||||
|
||||
enum msm_vfe_frame_skip_pattern {
|
||||
NO_SKIP,
|
||||
EVERY_2FRAME,
|
||||
EVERY_3FRAME,
|
||||
EVERY_4FRAME,
|
||||
EVERY_5FRAME,
|
||||
EVERY_6FRAME,
|
||||
EVERY_7FRAME,
|
||||
EVERY_8FRAME,
|
||||
EVERY_16FRAME,
|
||||
EVERY_32FRAME,
|
||||
SKIP_ALL,
|
||||
SKIP_RANGE,
|
||||
MAX_SKIP,
|
||||
};
|
||||
|
||||
/*
|
||||
* Define an unused period. When this period is set it means that the stream is
|
||||
* stopped(i.e the pattern is 0). We don't track the current pattern, just the
|
||||
* period defines what the pattern is, if period is this then pattern is 0 else
|
||||
* pattern is 1
|
||||
*/
|
||||
#define MSM_VFE_STREAM_STOP_PERIOD 15
|
||||
|
||||
enum msm_isp_stats_type {
|
||||
MSM_ISP_STATS_AEC, /* legacy based AEC */
|
||||
MSM_ISP_STATS_AF, /* legacy based AF */
|
||||
MSM_ISP_STATS_AWB, /* legacy based AWB */
|
||||
MSM_ISP_STATS_RS, /* legacy based RS */
|
||||
MSM_ISP_STATS_CS, /* legacy based CS */
|
||||
MSM_ISP_STATS_IHIST, /* legacy based HIST */
|
||||
MSM_ISP_STATS_SKIN, /* legacy based SKIN */
|
||||
MSM_ISP_STATS_BG, /* Bayer Grids */
|
||||
MSM_ISP_STATS_BF, /* Bayer Focus */
|
||||
MSM_ISP_STATS_BE, /* Bayer Exposure*/
|
||||
MSM_ISP_STATS_BHIST, /* Bayer Hist */
|
||||
MSM_ISP_STATS_BF_SCALE, /* Bayer Focus scale */
|
||||
MSM_ISP_STATS_HDR_BE, /* HDR Bayer Exposure */
|
||||
MSM_ISP_STATS_HDR_BHIST, /* HDR Bayer Hist */
|
||||
MSM_ISP_STATS_AEC_BG, /* AEC BG */
|
||||
MSM_ISP_STATS_MAX /* MAX */
|
||||
};
|
||||
|
||||
/*
|
||||
* @stats_type_mask: Stats type mask (enum msm_isp_stats_type).
|
||||
* @stream_src_mask: Stream src mask (enum msm_vfe_axi_stream_src)
|
||||
* @skip_mode: skip pattern, if skip mode is range only then min/max is used
|
||||
* @min_frame_id: minimum frame id (valid only if skip_mode = RANGE)
|
||||
* @max_frame_id: maximum frame id (valid only if skip_mode = RANGE)
|
||||
*/
|
||||
struct msm_isp_sw_framskip {
|
||||
uint32_t stats_type_mask;
|
||||
uint32_t stream_src_mask;
|
||||
enum msm_vfe_frame_skip_pattern skip_mode;
|
||||
uint32_t min_frame_id;
|
||||
uint32_t max_frame_id;
|
||||
};
|
||||
|
||||
enum msm_vfe_testgen_color_pattern {
|
||||
COLOR_BAR_8_COLOR,
|
||||
UNICOLOR_WHITE,
|
||||
UNICOLOR_YELLOW,
|
||||
UNICOLOR_CYAN,
|
||||
UNICOLOR_GREEN,
|
||||
UNICOLOR_MAGENTA,
|
||||
UNICOLOR_RED,
|
||||
UNICOLOR_BLUE,
|
||||
UNICOLOR_BLACK,
|
||||
MAX_COLOR,
|
||||
};
|
||||
|
||||
enum msm_vfe_camif_input {
|
||||
CAMIF_DISABLED,
|
||||
CAMIF_PAD_REG_INPUT,
|
||||
CAMIF_MIDDI_INPUT,
|
||||
CAMIF_MIPI_INPUT,
|
||||
};
|
||||
|
||||
struct msm_vfe_fetch_engine_cfg {
|
||||
uint32_t input_format;
|
||||
uint32_t buf_width;
|
||||
uint32_t buf_height;
|
||||
uint32_t fetch_width;
|
||||
uint32_t fetch_height;
|
||||
uint32_t x_offset;
|
||||
uint32_t y_offset;
|
||||
uint32_t buf_stride;
|
||||
};
|
||||
|
||||
enum msm_vfe_camif_output_format {
|
||||
CAMIF_QCOM_RAW,
|
||||
CAMIF_MIPI_RAW,
|
||||
CAMIF_PLAIN_8,
|
||||
CAMIF_PLAIN_16,
|
||||
CAMIF_MAX_FORMAT,
|
||||
};
|
||||
|
||||
/*
|
||||
* Camif output general configuration
|
||||
*/
|
||||
struct msm_vfe_camif_subsample_cfg {
|
||||
uint32_t irq_subsample_period;
|
||||
uint32_t irq_subsample_pattern;
|
||||
uint32_t sof_counter_step;
|
||||
uint32_t pixel_skip;
|
||||
uint32_t line_skip;
|
||||
uint32_t first_line;
|
||||
uint32_t last_line;
|
||||
uint32_t first_pixel;
|
||||
uint32_t last_pixel;
|
||||
enum msm_vfe_camif_output_format output_format;
|
||||
};
|
||||
|
||||
/*
|
||||
* Camif frame and window configuration
|
||||
*/
|
||||
struct msm_vfe_camif_cfg {
|
||||
uint32_t lines_per_frame;
|
||||
uint32_t pixels_per_line;
|
||||
uint32_t first_pixel;
|
||||
uint32_t last_pixel;
|
||||
uint32_t first_line;
|
||||
uint32_t last_line;
|
||||
uint32_t epoch_line0;
|
||||
uint32_t epoch_line1;
|
||||
uint32_t is_split;
|
||||
enum msm_vfe_camif_input camif_input;
|
||||
struct msm_vfe_camif_subsample_cfg subsample_cfg;
|
||||
};
|
||||
|
||||
struct msm_vfe_testgen_cfg {
|
||||
uint32_t lines_per_frame;
|
||||
uint32_t pixels_per_line;
|
||||
uint32_t v_blank;
|
||||
uint32_t h_blank;
|
||||
enum ISP_START_PIXEL_PATTERN pixel_bayer_pattern;
|
||||
uint32_t rotate_period;
|
||||
enum msm_vfe_testgen_color_pattern color_bar_pattern;
|
||||
uint32_t burst_num_frame;
|
||||
};
|
||||
|
||||
enum msm_vfe_inputmux {
|
||||
CAMIF,
|
||||
TESTGEN,
|
||||
EXTERNAL_READ,
|
||||
};
|
||||
|
||||
enum msm_vfe_stats_composite_group {
|
||||
STATS_COMPOSITE_GRP_NONE,
|
||||
STATS_COMPOSITE_GRP_1,
|
||||
STATS_COMPOSITE_GRP_2,
|
||||
STATS_COMPOSITE_GRP_MAX,
|
||||
};
|
||||
|
||||
enum msm_vfe_hvx_streaming_cmd {
|
||||
HVX_DISABLE,
|
||||
HVX_ONE_WAY,
|
||||
HVX_ROUND_TRIP
|
||||
};
|
||||
|
||||
struct msm_vfe_pix_cfg {
|
||||
struct msm_vfe_camif_cfg camif_cfg;
|
||||
struct msm_vfe_testgen_cfg testgen_cfg;
|
||||
struct msm_vfe_fetch_engine_cfg fetch_engine_cfg;
|
||||
enum msm_vfe_inputmux input_mux;
|
||||
enum ISP_START_PIXEL_PATTERN pixel_pattern;
|
||||
uint32_t input_format;
|
||||
enum msm_vfe_hvx_streaming_cmd hvx_cmd;
|
||||
uint32_t is_split;
|
||||
};
|
||||
|
||||
struct msm_vfe_rdi_cfg {
|
||||
uint8_t cid;
|
||||
uint8_t frame_based;
|
||||
};
|
||||
|
||||
struct msm_vfe_input_cfg {
|
||||
union {
|
||||
struct msm_vfe_pix_cfg pix_cfg;
|
||||
struct msm_vfe_rdi_cfg rdi_cfg;
|
||||
} d;
|
||||
enum msm_vfe_input_src input_src;
|
||||
uint32_t input_pix_clk;
|
||||
};
|
||||
|
||||
struct msm_vfe_fetch_eng_start {
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
uint32_t buf_idx;
|
||||
uint8_t offline_mode;
|
||||
uint32_t fd;
|
||||
uint32_t buf_addr;
|
||||
uint32_t frame_id;
|
||||
};
|
||||
|
||||
struct msm_vfe_axi_plane_cfg {
|
||||
uint32_t output_width; /*Include padding*/
|
||||
uint32_t output_height;
|
||||
uint32_t output_stride;
|
||||
uint32_t output_scan_lines;
|
||||
uint32_t output_plane_format; /*Y/Cb/Cr/CbCr*/
|
||||
uint32_t plane_addr_offset;
|
||||
uint8_t csid_src; /*RDI 0-2*/
|
||||
uint8_t rdi_cid;/*CID 1-16*/
|
||||
};
|
||||
|
||||
enum msm_stream_memory_input_t {
|
||||
MEMORY_INPUT_DISABLED,
|
||||
MEMORY_INPUT_ENABLED
|
||||
};
|
||||
|
||||
struct msm_vfe_axi_stream_request_cmd {
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
uint32_t vt_enable;
|
||||
uint32_t output_format;/*Planar/RAW/Misc*/
|
||||
enum msm_vfe_axi_stream_src stream_src; /*CAMIF/IDEAL/RDIs*/
|
||||
struct msm_vfe_axi_plane_cfg plane_cfg[MAX_PLANES_PER_STREAM];
|
||||
|
||||
uint32_t burst_count;
|
||||
uint32_t hfr_mode;
|
||||
uint8_t frame_base;
|
||||
|
||||
uint32_t init_frame_drop; /*MAX 31 Frames*/
|
||||
enum msm_vfe_frame_skip_pattern frame_skip_pattern;
|
||||
uint8_t buf_divert; /* if TRUE no vb2 buf done. */
|
||||
/*Return values*/
|
||||
uint32_t axi_stream_handle;
|
||||
uint32_t controllable_output;
|
||||
uint32_t burst_len;
|
||||
/* Flag indicating memory input stream */
|
||||
enum msm_stream_memory_input_t memory_input;
|
||||
};
|
||||
|
||||
struct msm_vfe_axi_stream_release_cmd {
|
||||
uint32_t stream_handle;
|
||||
};
|
||||
|
||||
enum msm_vfe_axi_stream_cmd {
|
||||
STOP_STREAM,
|
||||
START_STREAM,
|
||||
STOP_IMMEDIATELY,
|
||||
};
|
||||
|
||||
struct msm_vfe_axi_stream_cfg_cmd {
|
||||
uint8_t num_streams;
|
||||
uint32_t stream_handle[VFE_AXI_SRC_MAX];
|
||||
enum msm_vfe_axi_stream_cmd cmd;
|
||||
uint8_t sync_frame_id_src;
|
||||
};
|
||||
|
||||
enum msm_vfe_axi_stream_update_type {
|
||||
ENABLE_STREAM_BUF_DIVERT,
|
||||
DISABLE_STREAM_BUF_DIVERT,
|
||||
UPDATE_STREAM_FRAMEDROP_PATTERN,
|
||||
UPDATE_STREAM_STATS_FRAMEDROP_PATTERN,
|
||||
UPDATE_STREAM_AXI_CONFIG,
|
||||
UPDATE_STREAM_REQUEST_FRAMES,
|
||||
UPDATE_STREAM_ADD_BUFQ,
|
||||
UPDATE_STREAM_REMOVE_BUFQ,
|
||||
UPDATE_STREAM_SW_FRAME_DROP,
|
||||
};
|
||||
|
||||
enum msm_vfe_iommu_type {
|
||||
IOMMU_ATTACH,
|
||||
IOMMU_DETACH,
|
||||
};
|
||||
|
||||
enum msm_vfe_buff_queue_id {
|
||||
VFE_BUF_QUEUE_DEFAULT,
|
||||
VFE_BUF_QUEUE_SHARED,
|
||||
VFE_BUF_QUEUE_MAX,
|
||||
};
|
||||
|
||||
struct msm_vfe_axi_stream_cfg_update_info {
|
||||
uint32_t stream_handle;
|
||||
uint32_t output_format;
|
||||
uint32_t user_stream_id;
|
||||
uint32_t frame_id;
|
||||
enum msm_vfe_frame_skip_pattern skip_pattern;
|
||||
struct msm_vfe_axi_plane_cfg plane_cfg[MAX_PLANES_PER_STREAM];
|
||||
struct msm_isp_sw_framskip sw_skip_info;
|
||||
};
|
||||
|
||||
struct msm_vfe_axi_halt_cmd {
|
||||
uint32_t stop_camif;
|
||||
uint32_t overflow_detected;
|
||||
uint32_t blocking_halt;
|
||||
};
|
||||
|
||||
struct msm_vfe_axi_reset_cmd {
|
||||
uint32_t blocking;
|
||||
uint32_t frame_id;
|
||||
};
|
||||
|
||||
struct msm_vfe_axi_restart_cmd {
|
||||
uint32_t enable_camif;
|
||||
};
|
||||
|
||||
struct msm_vfe_axi_stream_update_cmd {
|
||||
uint32_t num_streams;
|
||||
enum msm_vfe_axi_stream_update_type update_type;
|
||||
struct msm_vfe_axi_stream_cfg_update_info
|
||||
update_info[MSM_ISP_STATS_MAX];
|
||||
};
|
||||
|
||||
struct msm_vfe_smmu_attach_cmd {
|
||||
uint32_t security_mode;
|
||||
uint32_t iommu_attach_mode;
|
||||
};
|
||||
|
||||
struct msm_vfe_stats_stream_request_cmd {
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
enum msm_isp_stats_type stats_type;
|
||||
uint32_t composite_flag;
|
||||
uint32_t framedrop_pattern;
|
||||
uint32_t init_frame_drop; /*MAX 31 Frames*/
|
||||
uint32_t irq_subsample_pattern;
|
||||
uint32_t buffer_offset;
|
||||
uint32_t stream_handle;
|
||||
};
|
||||
|
||||
struct msm_vfe_stats_stream_release_cmd {
|
||||
uint32_t stream_handle;
|
||||
};
|
||||
struct msm_vfe_stats_stream_cfg_cmd {
|
||||
uint8_t num_streams;
|
||||
uint32_t stream_handle[MSM_ISP_STATS_MAX];
|
||||
uint8_t enable;
|
||||
uint32_t stats_burst_len;
|
||||
};
|
||||
|
||||
enum msm_vfe_reg_cfg_type {
|
||||
VFE_WRITE,
|
||||
VFE_WRITE_MB,
|
||||
VFE_READ,
|
||||
VFE_CFG_MASK,
|
||||
VFE_WRITE_DMI_16BIT,
|
||||
VFE_WRITE_DMI_32BIT,
|
||||
VFE_WRITE_DMI_64BIT,
|
||||
VFE_READ_DMI_16BIT,
|
||||
VFE_READ_DMI_32BIT,
|
||||
VFE_READ_DMI_64BIT,
|
||||
GET_MAX_CLK_RATE,
|
||||
GET_CLK_RATES,
|
||||
GET_ISP_ID,
|
||||
VFE_HW_UPDATE_LOCK,
|
||||
VFE_HW_UPDATE_UNLOCK,
|
||||
SET_WM_UB_SIZE,
|
||||
SET_UB_POLICY,
|
||||
};
|
||||
|
||||
struct msm_vfe_cfg_cmd2 {
|
||||
uint16_t num_cfg;
|
||||
uint16_t cmd_len;
|
||||
void __user *cfg_data;
|
||||
void __user *cfg_cmd;
|
||||
};
|
||||
|
||||
struct msm_vfe_cfg_cmd_list {
|
||||
struct msm_vfe_cfg_cmd2 cfg_cmd;
|
||||
struct msm_vfe_cfg_cmd_list *next;
|
||||
uint32_t next_size;
|
||||
};
|
||||
|
||||
struct msm_vfe_reg_rw_info {
|
||||
uint32_t reg_offset;
|
||||
uint32_t cmd_data_offset;
|
||||
uint32_t len;
|
||||
};
|
||||
|
||||
struct msm_vfe_reg_mask_info {
|
||||
uint32_t reg_offset;
|
||||
uint32_t mask;
|
||||
uint32_t val;
|
||||
};
|
||||
|
||||
struct msm_vfe_reg_dmi_info {
|
||||
uint32_t hi_tbl_offset; /*Optional*/
|
||||
uint32_t lo_tbl_offset; /*Required*/
|
||||
uint32_t len;
|
||||
};
|
||||
|
||||
struct msm_vfe_reg_cfg_cmd {
|
||||
union {
|
||||
struct msm_vfe_reg_rw_info rw_info;
|
||||
struct msm_vfe_reg_mask_info mask_info;
|
||||
struct msm_vfe_reg_dmi_info dmi_info;
|
||||
} u;
|
||||
|
||||
enum msm_vfe_reg_cfg_type cmd_type;
|
||||
};
|
||||
|
||||
enum vfe_sd_type {
|
||||
VFE_SD_0 = 0,
|
||||
VFE_SD_1,
|
||||
VFE_SD_COMMON,
|
||||
VFE_SD_MAX,
|
||||
};
|
||||
|
||||
/* When you change the value below, check for the sof event_data size.
|
||||
* V4l2 limits payload to 64 bytes */
|
||||
#define MS_NUM_SLAVE_MAX 1
|
||||
|
||||
/* Usecases when 2 HW need to be related or synced */
|
||||
enum msm_vfe_dual_hw_type {
|
||||
DUAL_NONE = 0,
|
||||
DUAL_HW_VFE_SPLIT = 1,
|
||||
DUAL_HW_MASTER_SLAVE = 2,
|
||||
};
|
||||
|
||||
/* Type for 2 INTF when used in Master-Slave mode */
|
||||
enum msm_vfe_dual_hw_ms_type {
|
||||
MS_TYPE_NONE,
|
||||
MS_TYPE_MASTER,
|
||||
MS_TYPE_SLAVE,
|
||||
};
|
||||
|
||||
struct msm_isp_set_dual_hw_ms_cmd {
|
||||
uint8_t num_src;
|
||||
/* Each session can be only one type but multiple intf if YUV cam */
|
||||
enum msm_vfe_dual_hw_ms_type dual_hw_ms_type;
|
||||
/* Primary intf is mostly associated with preview.
|
||||
* This primary intf SOF frame_id and timestamp is tracked
|
||||
* and used to calculate delta */
|
||||
enum msm_vfe_input_src primary_intf;
|
||||
/* input_src array indicates other input INTF that may be Master/Slave.
|
||||
* For these additional intf, frame_id and timestamp are not saved.
|
||||
* However, if these are slaves then they will still get their
|
||||
* frame_id from Master */
|
||||
enum msm_vfe_input_src input_src[VFE_SRC_MAX];
|
||||
uint32_t sof_delta_threshold; /* In milliseconds. Sent for Master */
|
||||
};
|
||||
|
||||
enum msm_isp_buf_type {
|
||||
ISP_PRIVATE_BUF,
|
||||
ISP_SHARE_BUF,
|
||||
MAX_ISP_BUF_TYPE,
|
||||
};
|
||||
|
||||
struct msm_isp_unmap_buf_req {
|
||||
uint32_t fd;
|
||||
};
|
||||
|
||||
struct msm_isp_buf_request {
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
uint8_t num_buf;
|
||||
uint32_t handle;
|
||||
enum msm_isp_buf_type buf_type;
|
||||
};
|
||||
|
||||
struct msm_isp_qbuf_plane {
|
||||
uint32_t addr;
|
||||
uint32_t offset;
|
||||
uint32_t length;
|
||||
};
|
||||
|
||||
struct msm_isp_qbuf_buffer {
|
||||
struct msm_isp_qbuf_plane planes[MAX_PLANES_PER_STREAM];
|
||||
uint32_t num_planes;
|
||||
};
|
||||
|
||||
struct msm_isp_qbuf_info {
|
||||
uint32_t handle;
|
||||
int32_t buf_idx;
|
||||
/*Only used for prepare buffer*/
|
||||
struct msm_isp_qbuf_buffer buffer;
|
||||
/*Only used for diverted buffer*/
|
||||
uint32_t dirty_buf;
|
||||
};
|
||||
|
||||
struct msm_isp_clk_rates {
|
||||
uint32_t svs_rate;
|
||||
uint32_t nominal_rate;
|
||||
uint32_t high_rate;
|
||||
};
|
||||
|
||||
struct msm_vfe_axi_src_state {
|
||||
enum msm_vfe_input_src input_src;
|
||||
uint32_t src_active;
|
||||
uint32_t src_frame_id;
|
||||
};
|
||||
|
||||
enum msm_isp_event_mask_index {
|
||||
ISP_EVENT_MASK_INDEX_STATS_NOTIFY = 0,
|
||||
ISP_EVENT_MASK_INDEX_ERROR = 1,
|
||||
ISP_EVENT_MASK_INDEX_IOMMU_P_FAULT = 2,
|
||||
ISP_EVENT_MASK_INDEX_STREAM_UPDATE_DONE = 3,
|
||||
ISP_EVENT_MASK_INDEX_REG_UPDATE = 4,
|
||||
ISP_EVENT_MASK_INDEX_SOF = 5,
|
||||
ISP_EVENT_MASK_INDEX_BUF_DIVERT = 6,
|
||||
ISP_EVENT_MASK_INDEX_COMP_STATS_NOTIFY = 7,
|
||||
ISP_EVENT_MASK_INDEX_MASK_FE_READ_DONE = 8,
|
||||
ISP_EVENT_MASK_INDEX_BUF_DONE = 9,
|
||||
ISP_EVENT_MASK_INDEX_REG_UPDATE_MISSING = 10,
|
||||
ISP_EVENT_MASK_INDEX_PING_PONG_MISMATCH = 11,
|
||||
ISP_EVENT_MASK_INDEX_BUF_FATAL_ERROR = 12,
|
||||
};
|
||||
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_NONE 0
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_STATS_NOTIFY \
|
||||
(1 << ISP_EVENT_MASK_INDEX_STATS_NOTIFY)
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_ERROR \
|
||||
(1 << ISP_EVENT_MASK_INDEX_ERROR)
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_IOMMU_P_FAULT \
|
||||
(1 << ISP_EVENT_MASK_INDEX_IOMMU_P_FAULT)
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_STREAM_UPDATE_DONE \
|
||||
(1 << ISP_EVENT_MASK_INDEX_STREAM_UPDATE_DONE)
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_REG_UPDATE \
|
||||
(1 << ISP_EVENT_MASK_INDEX_REG_UPDATE)
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_SOF \
|
||||
(1 << ISP_EVENT_MASK_INDEX_SOF)
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_BUF_DIVERT \
|
||||
(1 << ISP_EVENT_MASK_INDEX_BUF_DIVERT)
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_COMP_STATS_NOTIFY \
|
||||
(1 << ISP_EVENT_MASK_INDEX_COMP_STATS_NOTIFY)
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_FE_READ_DONE \
|
||||
(1 << ISP_EVENT_MASK_INDEX_MASK_FE_READ_DONE)
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_BUF_DONE \
|
||||
(1 << ISP_EVENT_MASK_INDEX_BUF_DONE)
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_REG_UPDATE_MISSING \
|
||||
(1 << ISP_EVENT_MASK_INDEX_REG_UPDATE_MISSING)
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_PING_PONG_MISMATCH \
|
||||
(1 << ISP_EVENT_MASK_INDEX_PING_PONG_MISMATCH)
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_BUF_FATAL_ERROR \
|
||||
(1 << ISP_EVENT_MASK_INDEX_BUF_FATAL_ERROR)
|
||||
|
||||
enum msm_isp_event_idx {
|
||||
ISP_REG_UPDATE = 0,
|
||||
ISP_EPOCH_0 = 1,
|
||||
ISP_EPOCH_1 = 2,
|
||||
ISP_START_ACK = 3,
|
||||
ISP_STOP_ACK = 4,
|
||||
ISP_IRQ_VIOLATION = 5,
|
||||
ISP_STATS_OVERFLOW = 6,
|
||||
ISP_BUF_DONE = 7,
|
||||
ISP_FE_RD_DONE = 8,
|
||||
ISP_IOMMU_P_FAULT = 9,
|
||||
ISP_ERROR = 10,
|
||||
ISP_HW_FATAL_ERROR = 11,
|
||||
ISP_PING_PONG_MISMATCH = 12,
|
||||
ISP_REG_UPDATE_MISSING = 13,
|
||||
ISP_BUF_FATAL_ERROR = 14,
|
||||
ISP_EVENT_MAX = 15
|
||||
};
|
||||
|
||||
#define ISP_EVENT_OFFSET 8
|
||||
#define ISP_EVENT_BASE (V4L2_EVENT_PRIVATE_START)
|
||||
#define ISP_BUF_EVENT_BASE (ISP_EVENT_BASE + (1 << ISP_EVENT_OFFSET))
|
||||
#define ISP_STATS_EVENT_BASE (ISP_EVENT_BASE + (2 << ISP_EVENT_OFFSET))
|
||||
#define ISP_CAMIF_EVENT_BASE (ISP_EVENT_BASE + (3 << ISP_EVENT_OFFSET))
|
||||
#define ISP_STREAM_EVENT_BASE (ISP_EVENT_BASE + (4 << ISP_EVENT_OFFSET))
|
||||
#define ISP_EVENT_REG_UPDATE (ISP_EVENT_BASE + ISP_REG_UPDATE)
|
||||
#define ISP_EVENT_EPOCH_0 (ISP_EVENT_BASE + ISP_EPOCH_0)
|
||||
#define ISP_EVENT_EPOCH_1 (ISP_EVENT_BASE + ISP_EPOCH_1)
|
||||
#define ISP_EVENT_START_ACK (ISP_EVENT_BASE + ISP_START_ACK)
|
||||
#define ISP_EVENT_STOP_ACK (ISP_EVENT_BASE + ISP_STOP_ACK)
|
||||
#define ISP_EVENT_IRQ_VIOLATION (ISP_EVENT_BASE + ISP_IRQ_VIOLATION)
|
||||
#define ISP_EVENT_STATS_OVERFLOW (ISP_EVENT_BASE + ISP_STATS_OVERFLOW)
|
||||
#define ISP_EVENT_ERROR (ISP_EVENT_BASE + ISP_ERROR)
|
||||
#define ISP_EVENT_SOF (ISP_CAMIF_EVENT_BASE)
|
||||
#define ISP_EVENT_EOF (ISP_CAMIF_EVENT_BASE + 1)
|
||||
#define ISP_EVENT_BUF_DONE (ISP_EVENT_BASE + ISP_BUF_DONE)
|
||||
#define ISP_EVENT_BUF_DIVERT (ISP_BUF_EVENT_BASE)
|
||||
#define ISP_EVENT_STATS_NOTIFY (ISP_STATS_EVENT_BASE)
|
||||
#define ISP_EVENT_COMP_STATS_NOTIFY (ISP_EVENT_STATS_NOTIFY + MSM_ISP_STATS_MAX)
|
||||
#define ISP_EVENT_FE_READ_DONE (ISP_EVENT_BASE + ISP_FE_RD_DONE)
|
||||
#define ISP_EVENT_IOMMU_P_FAULT (ISP_EVENT_BASE + ISP_IOMMU_P_FAULT)
|
||||
#define ISP_EVENT_HW_FATAL_ERROR (ISP_EVENT_BASE + ISP_HW_FATAL_ERROR)
|
||||
#define ISP_EVENT_PING_PONG_MISMATCH (ISP_EVENT_BASE + ISP_PING_PONG_MISMATCH)
|
||||
#define ISP_EVENT_REG_UPDATE_MISSING (ISP_EVENT_BASE + ISP_REG_UPDATE_MISSING)
|
||||
#define ISP_EVENT_BUF_FATAL_ERROR (ISP_EVENT_BASE + ISP_BUF_FATAL_ERROR)
|
||||
#define ISP_EVENT_STREAM_UPDATE_DONE (ISP_STREAM_EVENT_BASE)
|
||||
|
||||
/* The msm_v4l2_event_data structure should match the
|
||||
* v4l2_event.u.data field.
|
||||
* should not exceed 64 bytes */
|
||||
|
||||
struct msm_isp_buf_event {
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
uint32_t handle;
|
||||
uint32_t output_format;
|
||||
int8_t buf_idx;
|
||||
};
|
||||
struct msm_isp_fetch_eng_event {
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
uint32_t handle;
|
||||
uint32_t fd;
|
||||
int8_t buf_idx;
|
||||
int8_t offline_mode;
|
||||
};
|
||||
struct msm_isp_stats_event {
|
||||
uint32_t stats_mask; /* 4 bytes */
|
||||
uint8_t stats_buf_idxs[MSM_ISP_STATS_MAX]; /* 11 bytes */
|
||||
};
|
||||
|
||||
struct msm_isp_stream_ack {
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
uint32_t handle;
|
||||
};
|
||||
|
||||
enum msm_vfe_error_type {
|
||||
ISP_ERROR_NONE,
|
||||
ISP_ERROR_CAMIF,
|
||||
ISP_ERROR_BUS_OVERFLOW,
|
||||
ISP_ERROR_RETURN_EMPTY_BUFFER,
|
||||
ISP_ERROR_FRAME_ID_MISMATCH,
|
||||
ISP_ERROR_MAX,
|
||||
};
|
||||
|
||||
struct msm_isp_error_info {
|
||||
enum msm_vfe_error_type err_type;
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
uint32_t stream_id_mask;
|
||||
};
|
||||
|
||||
/* This structure reports delta between master and slave */
|
||||
struct msm_isp_ms_delta_info {
|
||||
uint8_t num_delta_info;
|
||||
uint32_t delta[MS_NUM_SLAVE_MAX];
|
||||
};
|
||||
|
||||
/* This is sent in EPOCH irq */
|
||||
struct msm_isp_output_info {
|
||||
uint8_t regs_not_updated;
|
||||
/* mask with bufq_handle for regs not updated or return empty */
|
||||
uint16_t output_err_mask;
|
||||
/* mask with stream_idx for get_buf failed */
|
||||
uint8_t stream_framedrop_mask;
|
||||
/* mask with stats stream_idx for get_buf failed */
|
||||
uint16_t stats_framedrop_mask;
|
||||
/* delta between master and slave */
|
||||
};
|
||||
|
||||
/* This structure is piggybacked with SOF event */
|
||||
struct msm_isp_sof_info {
|
||||
uint8_t regs_not_updated;
|
||||
/* mask with AXI_SRC for regs not updated */
|
||||
uint16_t reg_update_fail_mask;
|
||||
/* mask with bufq_handle for get_buf failed */
|
||||
uint32_t stream_get_buf_fail_mask;
|
||||
/* mask with stats stream_idx for get_buf failed */
|
||||
uint16_t stats_get_buf_fail_mask;
|
||||
/* delta between master and slave */
|
||||
struct msm_isp_ms_delta_info ms_delta_info;
|
||||
};
|
||||
|
||||
struct msm_isp_event_data {
|
||||
/*Wall clock except for buffer divert events
|
||||
*which use monotonic clock
|
||||
*/
|
||||
struct timeval timestamp;
|
||||
/* Monotonic timestamp since bootup */
|
||||
struct timeval mono_timestamp;
|
||||
uint32_t frame_id;
|
||||
union {
|
||||
/* Sent for Stats_Done event */
|
||||
struct msm_isp_stats_event stats;
|
||||
/* Sent for Buf_Divert event */
|
||||
struct msm_isp_buf_event buf_done;
|
||||
/* Sent for offline fetch done event */
|
||||
struct msm_isp_fetch_eng_event fetch_done;
|
||||
/* Sent for Error_Event */
|
||||
struct msm_isp_error_info error_info;
|
||||
/*
|
||||
* This struct needs to be removed once
|
||||
* userspace switches to sof_info
|
||||
*/
|
||||
struct msm_isp_output_info output_info;
|
||||
/* Sent for SOF event */
|
||||
struct msm_isp_sof_info sof_info;
|
||||
} u; /* union can have max 52 bytes */
|
||||
};
|
||||
#include <uapi/media/msmb_isp.h>
|
||||
|
||||
#ifdef CONFIG_COMPAT
|
||||
struct msm_isp_event_data32 {
|
||||
|
|
@ -783,109 +30,5 @@ struct msm_isp_event_data32 {
|
|||
};
|
||||
#endif
|
||||
|
||||
#define V4L2_PIX_FMT_QBGGR8 v4l2_fourcc('Q', 'B', 'G', '8')
|
||||
#define V4L2_PIX_FMT_QGBRG8 v4l2_fourcc('Q', 'G', 'B', '8')
|
||||
#define V4L2_PIX_FMT_QGRBG8 v4l2_fourcc('Q', 'G', 'R', '8')
|
||||
#define V4L2_PIX_FMT_QRGGB8 v4l2_fourcc('Q', 'R', 'G', '8')
|
||||
#define V4L2_PIX_FMT_QBGGR10 v4l2_fourcc('Q', 'B', 'G', '0')
|
||||
#define V4L2_PIX_FMT_QGBRG10 v4l2_fourcc('Q', 'G', 'B', '0')
|
||||
#define V4L2_PIX_FMT_QGRBG10 v4l2_fourcc('Q', 'G', 'R', '0')
|
||||
#define V4L2_PIX_FMT_QRGGB10 v4l2_fourcc('Q', 'R', 'G', '0')
|
||||
#define V4L2_PIX_FMT_QBGGR12 v4l2_fourcc('Q', 'B', 'G', '2')
|
||||
#define V4L2_PIX_FMT_QGBRG12 v4l2_fourcc('Q', 'G', 'B', '2')
|
||||
#define V4L2_PIX_FMT_QGRBG12 v4l2_fourcc('Q', 'G', 'R', '2')
|
||||
#define V4L2_PIX_FMT_QRGGB12 v4l2_fourcc('Q', 'R', 'G', '2')
|
||||
#define V4L2_PIX_FMT_QBGGR14 v4l2_fourcc('Q', 'B', 'G', '4')
|
||||
#define V4L2_PIX_FMT_QGBRG14 v4l2_fourcc('Q', 'G', 'B', '4')
|
||||
#define V4L2_PIX_FMT_QGRBG14 v4l2_fourcc('Q', 'G', 'R', '4')
|
||||
#define V4L2_PIX_FMT_QRGGB14 v4l2_fourcc('Q', 'R', 'G', '4')
|
||||
#define V4L2_PIX_FMT_P16BGGR10 v4l2_fourcc('P', 'B', 'G', '0')
|
||||
#define V4L2_PIX_FMT_P16GBRG10 v4l2_fourcc('P', 'G', 'B', '0')
|
||||
#define V4L2_PIX_FMT_P16GRBG10 v4l2_fourcc('P', 'G', 'R', '0')
|
||||
#define V4L2_PIX_FMT_P16RGGB10 v4l2_fourcc('P', 'R', 'G', '0')
|
||||
#define V4L2_PIX_FMT_NV14 v4l2_fourcc('N', 'V', '1', '4')
|
||||
#define V4L2_PIX_FMT_NV41 v4l2_fourcc('N', 'V', '4', '1')
|
||||
#define V4L2_PIX_FMT_META v4l2_fourcc('Q', 'M', 'E', 'T')
|
||||
#define V4L2_PIX_FMT_SBGGR14 v4l2_fourcc('B', 'G', '1', '4') /* 14 BGBG.GRGR.*/
|
||||
#define V4L2_PIX_FMT_SGBRG14 v4l2_fourcc('G', 'B', '1', '4') /* 14 GBGB.RGRG.*/
|
||||
#define V4L2_PIX_FMT_SGRBG14 v4l2_fourcc('B', 'A', '1', '4') /* 14 GRGR.BGBG.*/
|
||||
#define V4L2_PIX_FMT_SRGGB14 v4l2_fourcc('R', 'G', '1', '4') /* 14 RGRG.GBGB.*/
|
||||
#endif
|
||||
|
||||
#define VIDIOC_MSM_VFE_REG_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_vfe_cfg_cmd2)
|
||||
|
||||
#define VIDIOC_MSM_ISP_REQUEST_BUF \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+1, struct msm_isp_buf_request)
|
||||
|
||||
#define VIDIOC_MSM_ISP_ENQUEUE_BUF \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+2, struct msm_isp_qbuf_info)
|
||||
|
||||
#define VIDIOC_MSM_ISP_RELEASE_BUF \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+3, struct msm_isp_buf_request)
|
||||
|
||||
#define VIDIOC_MSM_ISP_REQUEST_STREAM \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+4, struct msm_vfe_axi_stream_request_cmd)
|
||||
|
||||
#define VIDIOC_MSM_ISP_CFG_STREAM \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+5, struct msm_vfe_axi_stream_cfg_cmd)
|
||||
|
||||
#define VIDIOC_MSM_ISP_RELEASE_STREAM \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+6, struct msm_vfe_axi_stream_release_cmd)
|
||||
|
||||
#define VIDIOC_MSM_ISP_INPUT_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+7, struct msm_vfe_input_cfg)
|
||||
|
||||
#define VIDIOC_MSM_ISP_SET_SRC_STATE \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+8, struct msm_vfe_axi_src_state)
|
||||
|
||||
#define VIDIOC_MSM_ISP_REQUEST_STATS_STREAM \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+9, \
|
||||
struct msm_vfe_stats_stream_request_cmd)
|
||||
|
||||
#define VIDIOC_MSM_ISP_CFG_STATS_STREAM \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+10, struct msm_vfe_stats_stream_cfg_cmd)
|
||||
|
||||
#define VIDIOC_MSM_ISP_RELEASE_STATS_STREAM \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+11, \
|
||||
struct msm_vfe_stats_stream_release_cmd)
|
||||
|
||||
#define VIDIOC_MSM_ISP_REG_UPDATE_CMD \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+12, enum msm_vfe_input_src)
|
||||
|
||||
#define VIDIOC_MSM_ISP_UPDATE_STREAM \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+13, struct msm_vfe_axi_stream_update_cmd)
|
||||
|
||||
#define VIDIOC_MSM_VFE_REG_LIST_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+14, struct msm_vfe_cfg_cmd_list)
|
||||
|
||||
#define VIDIOC_MSM_ISP_SMMU_ATTACH \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+15, struct msm_vfe_smmu_attach_cmd)
|
||||
|
||||
#define VIDIOC_MSM_ISP_UPDATE_STATS_STREAM \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+16, struct msm_vfe_axi_stream_update_cmd)
|
||||
|
||||
#define VIDIOC_MSM_ISP_AXI_HALT \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+17, struct msm_vfe_axi_halt_cmd)
|
||||
|
||||
#define VIDIOC_MSM_ISP_AXI_RESET \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+18, struct msm_vfe_axi_reset_cmd)
|
||||
|
||||
#define VIDIOC_MSM_ISP_AXI_RESTART \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+19, struct msm_vfe_axi_restart_cmd)
|
||||
|
||||
#define VIDIOC_MSM_ISP_FETCH_ENG_START \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+20, struct msm_vfe_fetch_eng_start)
|
||||
|
||||
#define VIDIOC_MSM_ISP_DEQUEUE_BUF \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+21, struct msm_isp_qbuf_info)
|
||||
|
||||
#define VIDIOC_MSM_ISP_SET_DUAL_HW_MASTER_SLAVE \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+22, struct msm_isp_set_dual_hw_ms_cmd)
|
||||
|
||||
#define VIDIOC_MSM_ISP_MAP_BUF_START_FE \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+23, struct msm_vfe_fetch_eng_start)
|
||||
|
||||
#define VIDIOC_MSM_ISP_UNMAP_BUF \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+24, struct msm_isp_unmap_buf_req)
|
||||
|
||||
#endif /* __MSMB_ISP__ */
|
||||
|
|
|
|||
|
|
@ -1,260 +1,9 @@
|
|||
#ifndef __MSMB_PPROC_H
|
||||
#define __MSMB_PPROC_H
|
||||
|
||||
#ifdef MSM_CAMERA_BIONIC
|
||||
#include <sys/types.h>
|
||||
#endif
|
||||
#ifdef CONFIG_COMPAT
|
||||
#include <uapi/media/msmb_pproc.h>
|
||||
|
||||
#include <linux/compat.h>
|
||||
#endif
|
||||
#include <linux/videodev2.h>
|
||||
#include <linux/types.h>
|
||||
#include <media/msmb_generic_buf_mgr.h>
|
||||
|
||||
/* Should be same as VIDEO_MAX_PLANES in videodev2.h */
|
||||
#define MAX_PLANES VIDEO_MAX_PLANES
|
||||
/* PARTIAL_FRAME_STRIPE_COUNT must be even */
|
||||
#define PARTIAL_FRAME_STRIPE_COUNT 4
|
||||
|
||||
#define MAX_NUM_CPP_STRIPS 8
|
||||
#define MSM_CPP_MAX_NUM_PLANES 3
|
||||
#define MSM_CPP_MIN_FRAME_LENGTH 13
|
||||
#define MSM_CPP_MAX_FRAME_LENGTH 4096
|
||||
#define MSM_CPP_MAX_FW_NAME_LEN 32
|
||||
#define MAX_FREQ_TBL 10
|
||||
|
||||
enum msm_cpp_frame_type {
|
||||
MSM_CPP_OFFLINE_FRAME,
|
||||
MSM_CPP_REALTIME_FRAME,
|
||||
};
|
||||
|
||||
enum msm_vpe_frame_type {
|
||||
MSM_VPE_OFFLINE_FRAME,
|
||||
MSM_VPE_REALTIME_FRAME,
|
||||
};
|
||||
|
||||
struct msm_cpp_buffer_info_t {
|
||||
int32_t fd;
|
||||
uint32_t index;
|
||||
uint32_t offset;
|
||||
uint8_t native_buff;
|
||||
uint8_t processed_divert;
|
||||
uint32_t identity;
|
||||
};
|
||||
|
||||
struct msm_cpp_stream_buff_info_t {
|
||||
uint32_t identity;
|
||||
uint32_t num_buffs;
|
||||
struct msm_cpp_buffer_info_t *buffer_info;
|
||||
};
|
||||
|
||||
enum msm_cpp_batch_mode_t {
|
||||
BATCH_MODE_NONE,
|
||||
BATCH_MODE_VIDEO,
|
||||
BATCH_MODE_PREVIEW
|
||||
};
|
||||
|
||||
struct msm_cpp_batch_info_t {
|
||||
enum msm_cpp_batch_mode_t batch_mode;
|
||||
uint32_t batch_size;
|
||||
uint32_t intra_plane_offset[MAX_PLANES];
|
||||
uint32_t pick_preview_idx;
|
||||
uint32_t cont_idx;
|
||||
};
|
||||
|
||||
struct msm_cpp_frame_info_t {
|
||||
int32_t frame_id;
|
||||
struct timeval timestamp;
|
||||
uint32_t inst_id;
|
||||
uint32_t identity;
|
||||
uint32_t client_id;
|
||||
enum msm_cpp_frame_type frame_type;
|
||||
uint32_t num_strips;
|
||||
uint32_t msg_len;
|
||||
uint32_t *cpp_cmd_msg;
|
||||
int src_fd;
|
||||
int dst_fd;
|
||||
struct timeval in_time, out_time;
|
||||
void __user *cookie;
|
||||
int32_t *status;
|
||||
int32_t duplicate_output;
|
||||
uint32_t duplicate_identity;
|
||||
uint32_t feature_mask;
|
||||
uint8_t we_disable;
|
||||
struct msm_cpp_buffer_info_t input_buffer_info;
|
||||
struct msm_cpp_buffer_info_t output_buffer_info[8];
|
||||
struct msm_cpp_buffer_info_t duplicate_buffer_info;
|
||||
struct msm_cpp_buffer_info_t tnr_scratch_buffer_info[2];
|
||||
uint32_t reserved;
|
||||
uint8_t partial_frame_indicator;
|
||||
/* the followings are used only for partial_frame type
|
||||
* and is only used for offline frame processing and
|
||||
* only if payload big enough and need to be split into partial_frame
|
||||
* if first_payload, kernel acquires output buffer
|
||||
* first payload must have the last stripe
|
||||
* buffer addresses from 0 to last_stripe_index are updated.
|
||||
* kernel updates payload with msg_len and stripe_info
|
||||
* kernel sends top level, plane level, then only stripes
|
||||
* starting with first_stripe_index and
|
||||
* ends with last_stripe_index
|
||||
* kernel then sends trailing flag at frame done,
|
||||
* if last payload, kernel queues the output buffer to HAL
|
||||
*/
|
||||
uint8_t first_payload;
|
||||
uint8_t last_payload;
|
||||
uint32_t first_stripe_index;
|
||||
uint32_t last_stripe_index;
|
||||
uint32_t stripe_info_offset;
|
||||
uint32_t stripe_info;
|
||||
struct msm_cpp_batch_info_t batch_info;
|
||||
};
|
||||
|
||||
struct msm_cpp_pop_stream_info_t {
|
||||
int32_t frame_id;
|
||||
uint32_t identity;
|
||||
};
|
||||
|
||||
struct cpp_hw_info {
|
||||
uint32_t cpp_hw_version;
|
||||
uint32_t cpp_hw_caps;
|
||||
unsigned long freq_tbl[MAX_FREQ_TBL];
|
||||
uint32_t freq_tbl_count;
|
||||
};
|
||||
|
||||
struct msm_vpe_frame_strip_info {
|
||||
uint32_t src_w;
|
||||
uint32_t src_h;
|
||||
uint32_t dst_w;
|
||||
uint32_t dst_h;
|
||||
uint32_t src_x;
|
||||
uint32_t src_y;
|
||||
uint32_t phase_step_x;
|
||||
uint32_t phase_step_y;
|
||||
uint32_t phase_init_x;
|
||||
uint32_t phase_init_y;
|
||||
};
|
||||
|
||||
struct msm_vpe_buffer_info_t {
|
||||
int32_t fd;
|
||||
uint32_t index;
|
||||
uint32_t offset;
|
||||
uint8_t native_buff;
|
||||
uint8_t processed_divert;
|
||||
};
|
||||
|
||||
struct msm_vpe_stream_buff_info_t {
|
||||
uint32_t identity;
|
||||
uint32_t num_buffs;
|
||||
struct msm_vpe_buffer_info_t *buffer_info;
|
||||
};
|
||||
|
||||
struct msm_vpe_frame_info_t {
|
||||
int32_t frame_id;
|
||||
struct timeval timestamp;
|
||||
uint32_t inst_id;
|
||||
uint32_t identity;
|
||||
uint32_t client_id;
|
||||
enum msm_vpe_frame_type frame_type;
|
||||
struct msm_vpe_frame_strip_info strip_info;
|
||||
unsigned long src_fd;
|
||||
unsigned long dst_fd;
|
||||
struct ion_handle *src_ion_handle;
|
||||
struct ion_handle *dest_ion_handle;
|
||||
unsigned long src_phyaddr;
|
||||
unsigned long dest_phyaddr;
|
||||
unsigned long src_chroma_plane_offset;
|
||||
unsigned long dest_chroma_plane_offset;
|
||||
struct timeval in_time, out_time;
|
||||
void *cookie;
|
||||
|
||||
struct msm_vpe_buffer_info_t input_buffer_info;
|
||||
struct msm_vpe_buffer_info_t output_buffer_info;
|
||||
};
|
||||
|
||||
struct msm_pproc_queue_buf_info {
|
||||
struct msm_buf_mngr_info buff_mgr_info;
|
||||
uint8_t is_buf_dirty;
|
||||
};
|
||||
|
||||
struct msm_cpp_clock_settings_t {
|
||||
unsigned long clock_rate;
|
||||
uint64_t avg;
|
||||
uint64_t inst;
|
||||
};
|
||||
|
||||
#define VIDIOC_MSM_CPP_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_GET_EVENTPAYLOAD \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_GET_INST_INFO \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_LOAD_FIRMWARE \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_GET_HW_INFO \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_FLUSH_QUEUE \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_ENQUEUE_STREAM_BUFF_INFO \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_DEQUEUE_STREAM_BUFF_INFO \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_VPE_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_VPE_TRANSACTION_SETUP \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 9, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_VPE_GET_EVENTPAYLOAD \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 10, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_VPE_GET_INST_INFO \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 11, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_VPE_ENQUEUE_STREAM_BUFF_INFO \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 12, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_VPE_DEQUEUE_STREAM_BUFF_INFO \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 13, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_QUEUE_BUF \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 14, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_APPEND_STREAM_BUFF_INFO \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 15, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_SET_CLOCK \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 16, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_POP_STREAM_BUFFER \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 17, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_IOMMU_ATTACH \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 18, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_IOMMU_DETACH \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 19, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_DELETE_STREAM_BUFF\
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 20, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
|
||||
#define V4L2_EVENT_CPP_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 0)
|
||||
#define V4L2_EVENT_VPE_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 1)
|
||||
|
||||
struct msm_camera_v4l2_ioctl_t {
|
||||
uint32_t id;
|
||||
size_t len;
|
||||
int32_t trans_code;
|
||||
void __user *ioctl_ptr;
|
||||
};
|
||||
|
||||
#ifdef CONFIG_COMPAT
|
||||
struct msm_cpp_frame_info32_t {
|
||||
|
|
@ -400,4 +149,5 @@ struct msm_camera_v4l2_ioctl32_t {
|
|||
};
|
||||
#endif
|
||||
|
||||
#endif /* __MSMB_PPROC_H */
|
||||
#endif
|
||||
|
||||
|
|
|
|||
564
include/uapi/media/msm_cam_sensor.h
Normal file
564
include/uapi/media/msm_cam_sensor.h
Normal file
|
|
@ -0,0 +1,564 @@
|
|||
#ifndef __UAPI_LINUX_MSM_CAM_SENSOR_H
|
||||
#define __UAPI_LINUX_MSM_CAM_SENSOR_H
|
||||
|
||||
#include <linux/v4l2-mediabus.h>
|
||||
#include <media/msm_camsensor_sdk.h>
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/i2c.h>
|
||||
|
||||
#define I2C_SEQ_REG_SETTING_MAX 5
|
||||
|
||||
#define MSM_SENSOR_MCLK_8HZ 8000000
|
||||
#define MSM_SENSOR_MCLK_16HZ 16000000
|
||||
#define MSM_SENSOR_MCLK_24HZ 24000000
|
||||
|
||||
#define MAX_SENSOR_NAME 32
|
||||
#define MAX_ACTUATOR_AF_TOTAL_STEPS 1024
|
||||
|
||||
#define MAX_OIS_MOD_NAME_SIZE 32
|
||||
#define MAX_OIS_NAME_SIZE 32
|
||||
#define MAX_OIS_REG_SETTINGS 800
|
||||
|
||||
#define MOVE_NEAR 0
|
||||
#define MOVE_FAR 1
|
||||
|
||||
#define MSM_ACTUATOR_MOVE_SIGNED_FAR -1
|
||||
#define MSM_ACTUATOR_MOVE_SIGNED_NEAR 1
|
||||
|
||||
#define MAX_ACTUATOR_REGION 5
|
||||
|
||||
#define MAX_EEPROM_NAME 32
|
||||
|
||||
#define MAX_AF_ITERATIONS 3
|
||||
#define MAX_NUMBER_OF_STEPS 47
|
||||
#define MAX_REGULATOR 5
|
||||
|
||||
#define MSM_V4L2_PIX_FMT_META v4l2_fourcc('M', 'E', 'T', 'A') /* META */
|
||||
#define MSM_V4L2_PIX_FMT_SBGGR14 v4l2_fourcc('B', 'G', '1', '4')
|
||||
/* 14 BGBG.. GRGR.. */
|
||||
#define MSM_V4L2_PIX_FMT_SGBRG14 v4l2_fourcc('G', 'B', '1', '4')
|
||||
/* 14 GBGB.. RGRG.. */
|
||||
#define MSM_V4L2_PIX_FMT_SGRBG14 v4l2_fourcc('B', 'A', '1', '4')
|
||||
/* 14 GRGR.. BGBG.. */
|
||||
#define MSM_V4L2_PIX_FMT_SRGGB14 v4l2_fourcc('R', 'G', '1', '4')
|
||||
/* 14 RGRG.. GBGB.. */
|
||||
|
||||
enum flash_type {
|
||||
LED_FLASH = 1,
|
||||
STROBE_FLASH,
|
||||
GPIO_FLASH
|
||||
};
|
||||
|
||||
enum msm_sensor_resolution_t {
|
||||
MSM_SENSOR_RES_FULL,
|
||||
MSM_SENSOR_RES_QTR,
|
||||
MSM_SENSOR_RES_2,
|
||||
MSM_SENSOR_RES_3,
|
||||
MSM_SENSOR_RES_4,
|
||||
MSM_SENSOR_RES_5,
|
||||
MSM_SENSOR_RES_6,
|
||||
MSM_SENSOR_RES_7,
|
||||
MSM_SENSOR_INVALID_RES,
|
||||
};
|
||||
|
||||
enum msm_camera_stream_type_t {
|
||||
MSM_CAMERA_STREAM_PREVIEW,
|
||||
MSM_CAMERA_STREAM_SNAPSHOT,
|
||||
MSM_CAMERA_STREAM_VIDEO,
|
||||
MSM_CAMERA_STREAM_INVALID,
|
||||
};
|
||||
|
||||
enum sensor_sub_module_t {
|
||||
SUB_MODULE_SENSOR,
|
||||
SUB_MODULE_CHROMATIX,
|
||||
SUB_MODULE_ACTUATOR,
|
||||
SUB_MODULE_EEPROM,
|
||||
SUB_MODULE_LED_FLASH,
|
||||
SUB_MODULE_STROBE_FLASH,
|
||||
SUB_MODULE_CSID,
|
||||
SUB_MODULE_CSID_3D,
|
||||
SUB_MODULE_CSIPHY,
|
||||
SUB_MODULE_CSIPHY_3D,
|
||||
SUB_MODULE_OIS,
|
||||
SUB_MODULE_EXT,
|
||||
SUB_MODULE_MAX,
|
||||
};
|
||||
|
||||
enum {
|
||||
MSM_CAMERA_EFFECT_MODE_OFF,
|
||||
MSM_CAMERA_EFFECT_MODE_MONO,
|
||||
MSM_CAMERA_EFFECT_MODE_NEGATIVE,
|
||||
MSM_CAMERA_EFFECT_MODE_SOLARIZE,
|
||||
MSM_CAMERA_EFFECT_MODE_SEPIA,
|
||||
MSM_CAMERA_EFFECT_MODE_POSTERIZE,
|
||||
MSM_CAMERA_EFFECT_MODE_WHITEBOARD,
|
||||
MSM_CAMERA_EFFECT_MODE_BLACKBOARD,
|
||||
MSM_CAMERA_EFFECT_MODE_AQUA,
|
||||
MSM_CAMERA_EFFECT_MODE_EMBOSS,
|
||||
MSM_CAMERA_EFFECT_MODE_SKETCH,
|
||||
MSM_CAMERA_EFFECT_MODE_NEON,
|
||||
MSM_CAMERA_EFFECT_MODE_MAX
|
||||
};
|
||||
|
||||
enum {
|
||||
MSM_CAMERA_WB_MODE_AUTO,
|
||||
MSM_CAMERA_WB_MODE_CUSTOM,
|
||||
MSM_CAMERA_WB_MODE_INCANDESCENT,
|
||||
MSM_CAMERA_WB_MODE_FLUORESCENT,
|
||||
MSM_CAMERA_WB_MODE_WARM_FLUORESCENT,
|
||||
MSM_CAMERA_WB_MODE_DAYLIGHT,
|
||||
MSM_CAMERA_WB_MODE_CLOUDY_DAYLIGHT,
|
||||
MSM_CAMERA_WB_MODE_TWILIGHT,
|
||||
MSM_CAMERA_WB_MODE_SHADE,
|
||||
MSM_CAMERA_WB_MODE_OFF,
|
||||
MSM_CAMERA_WB_MODE_MAX
|
||||
};
|
||||
|
||||
enum {
|
||||
MSM_CAMERA_SCENE_MODE_OFF,
|
||||
MSM_CAMERA_SCENE_MODE_AUTO,
|
||||
MSM_CAMERA_SCENE_MODE_LANDSCAPE,
|
||||
MSM_CAMERA_SCENE_MODE_SNOW,
|
||||
MSM_CAMERA_SCENE_MODE_BEACH,
|
||||
MSM_CAMERA_SCENE_MODE_SUNSET,
|
||||
MSM_CAMERA_SCENE_MODE_NIGHT,
|
||||
MSM_CAMERA_SCENE_MODE_PORTRAIT,
|
||||
MSM_CAMERA_SCENE_MODE_BACKLIGHT,
|
||||
MSM_CAMERA_SCENE_MODE_SPORTS,
|
||||
MSM_CAMERA_SCENE_MODE_ANTISHAKE,
|
||||
MSM_CAMERA_SCENE_MODE_FLOWERS,
|
||||
MSM_CAMERA_SCENE_MODE_CANDLELIGHT,
|
||||
MSM_CAMERA_SCENE_MODE_FIREWORKS,
|
||||
MSM_CAMERA_SCENE_MODE_PARTY,
|
||||
MSM_CAMERA_SCENE_MODE_NIGHT_PORTRAIT,
|
||||
MSM_CAMERA_SCENE_MODE_THEATRE,
|
||||
MSM_CAMERA_SCENE_MODE_ACTION,
|
||||
MSM_CAMERA_SCENE_MODE_AR,
|
||||
MSM_CAMERA_SCENE_MODE_FACE_PRIORITY,
|
||||
MSM_CAMERA_SCENE_MODE_BARCODE,
|
||||
MSM_CAMERA_SCENE_MODE_HDR,
|
||||
MSM_CAMERA_SCENE_MODE_MAX
|
||||
};
|
||||
|
||||
enum csid_cfg_type_t {
|
||||
CSID_INIT,
|
||||
CSID_CFG,
|
||||
CSID_TESTMODE_CFG,
|
||||
CSID_RELEASE,
|
||||
};
|
||||
|
||||
enum csiphy_cfg_type_t {
|
||||
CSIPHY_INIT,
|
||||
CSIPHY_CFG,
|
||||
CSIPHY_RELEASE,
|
||||
};
|
||||
|
||||
enum camera_vreg_type {
|
||||
VREG_TYPE_DEFAULT,
|
||||
VREG_TYPE_CUSTOM,
|
||||
};
|
||||
|
||||
enum sensor_af_t {
|
||||
SENSOR_AF_FOCUSSED,
|
||||
SENSOR_AF_NOT_FOCUSSED,
|
||||
};
|
||||
|
||||
enum cci_i2c_master_t {
|
||||
MASTER_0,
|
||||
MASTER_1,
|
||||
MASTER_MAX,
|
||||
};
|
||||
|
||||
struct msm_camera_i2c_array_write_config {
|
||||
struct msm_camera_i2c_reg_setting conf_array;
|
||||
uint16_t slave_addr;
|
||||
};
|
||||
|
||||
struct msm_camera_i2c_read_config {
|
||||
uint16_t slave_addr;
|
||||
uint16_t reg_addr;
|
||||
enum msm_camera_i2c_reg_addr_type addr_type;
|
||||
enum msm_camera_i2c_data_type data_type;
|
||||
uint16_t data;
|
||||
};
|
||||
|
||||
struct msm_camera_csi2_params {
|
||||
struct msm_camera_csid_params csid_params;
|
||||
struct msm_camera_csiphy_params csiphy_params;
|
||||
uint8_t csi_clk_scale_enable;
|
||||
};
|
||||
|
||||
struct msm_camera_csi_lane_params {
|
||||
uint16_t csi_lane_assign;
|
||||
uint16_t csi_lane_mask;
|
||||
};
|
||||
|
||||
struct csi_lane_params_t {
|
||||
uint16_t csi_lane_assign;
|
||||
uint8_t csi_lane_mask;
|
||||
uint8_t csi_if;
|
||||
int8_t csid_core[2];
|
||||
uint8_t csi_phy_sel;
|
||||
};
|
||||
|
||||
struct msm_sensor_info_t {
|
||||
char sensor_name[MAX_SENSOR_NAME];
|
||||
uint32_t session_id;
|
||||
int32_t subdev_id[SUB_MODULE_MAX];
|
||||
int32_t subdev_intf[SUB_MODULE_MAX];
|
||||
uint8_t is_mount_angle_valid;
|
||||
uint32_t sensor_mount_angle;
|
||||
int modes_supported;
|
||||
enum camb_position_t position;
|
||||
};
|
||||
|
||||
struct camera_vreg_t {
|
||||
const char *reg_name;
|
||||
int min_voltage;
|
||||
int max_voltage;
|
||||
int op_mode;
|
||||
uint32_t delay;
|
||||
const char *custom_vreg_name;
|
||||
enum camera_vreg_type type;
|
||||
};
|
||||
|
||||
struct sensorb_cfg_data {
|
||||
int cfgtype;
|
||||
union {
|
||||
struct msm_sensor_info_t sensor_info;
|
||||
struct msm_sensor_init_params sensor_init_params;
|
||||
void *setting;
|
||||
struct msm_sensor_i2c_sync_params sensor_i2c_sync_params;
|
||||
} cfg;
|
||||
};
|
||||
|
||||
struct csid_cfg_data {
|
||||
enum csid_cfg_type_t cfgtype;
|
||||
union {
|
||||
uint32_t csid_version;
|
||||
struct msm_camera_csid_params *csid_params;
|
||||
struct msm_camera_csid_testmode_parms *csid_testmode_params;
|
||||
} cfg;
|
||||
};
|
||||
|
||||
struct csiphy_cfg_data {
|
||||
enum csiphy_cfg_type_t cfgtype;
|
||||
union {
|
||||
struct msm_camera_csiphy_params *csiphy_params;
|
||||
struct msm_camera_csi_lane_params *csi_lane_params;
|
||||
} cfg;
|
||||
};
|
||||
|
||||
enum eeprom_cfg_type_t {
|
||||
CFG_EEPROM_GET_INFO,
|
||||
CFG_EEPROM_GET_CAL_DATA,
|
||||
CFG_EEPROM_READ_CAL_DATA,
|
||||
CFG_EEPROM_WRITE_DATA,
|
||||
CFG_EEPROM_GET_MM_INFO,
|
||||
CFG_EEPROM_INIT,
|
||||
};
|
||||
|
||||
struct eeprom_get_t {
|
||||
uint32_t num_bytes;
|
||||
};
|
||||
|
||||
struct eeprom_read_t {
|
||||
uint8_t *dbuffer;
|
||||
uint32_t num_bytes;
|
||||
};
|
||||
|
||||
struct eeprom_write_t {
|
||||
uint8_t *dbuffer;
|
||||
uint32_t num_bytes;
|
||||
};
|
||||
|
||||
struct eeprom_get_cmm_t {
|
||||
uint32_t cmm_support;
|
||||
uint32_t cmm_compression;
|
||||
uint32_t cmm_size;
|
||||
};
|
||||
|
||||
struct msm_eeprom_info_t {
|
||||
struct msm_sensor_power_setting_array *power_setting_array;
|
||||
enum i2c_freq_mode_t i2c_freq_mode;
|
||||
struct msm_eeprom_memory_map_array *mem_map_array;
|
||||
};
|
||||
|
||||
struct msm_eeprom_cfg_data {
|
||||
enum eeprom_cfg_type_t cfgtype;
|
||||
uint8_t is_supported;
|
||||
union {
|
||||
char eeprom_name[MAX_SENSOR_NAME];
|
||||
struct eeprom_get_t get_data;
|
||||
struct eeprom_read_t read_data;
|
||||
struct eeprom_write_t write_data;
|
||||
struct eeprom_get_cmm_t get_cmm_data;
|
||||
struct msm_eeprom_info_t eeprom_info;
|
||||
} cfg;
|
||||
};
|
||||
|
||||
enum msm_sensor_cfg_type_t {
|
||||
CFG_SET_SLAVE_INFO,
|
||||
CFG_SLAVE_READ_I2C,
|
||||
CFG_WRITE_I2C_ARRAY,
|
||||
CFG_SLAVE_WRITE_I2C_ARRAY,
|
||||
CFG_WRITE_I2C_SEQ_ARRAY,
|
||||
CFG_POWER_UP,
|
||||
CFG_POWER_DOWN,
|
||||
CFG_SET_STOP_STREAM_SETTING,
|
||||
CFG_GET_SENSOR_INFO,
|
||||
CFG_GET_SENSOR_INIT_PARAMS,
|
||||
CFG_SET_INIT_SETTING,
|
||||
CFG_SET_RESOLUTION,
|
||||
CFG_SET_STOP_STREAM,
|
||||
CFG_SET_START_STREAM,
|
||||
CFG_SET_SATURATION,
|
||||
CFG_SET_CONTRAST,
|
||||
CFG_SET_SHARPNESS,
|
||||
CFG_SET_ISO,
|
||||
CFG_SET_EXPOSURE_COMPENSATION,
|
||||
CFG_SET_ANTIBANDING,
|
||||
CFG_SET_BESTSHOT_MODE,
|
||||
CFG_SET_EFFECT,
|
||||
CFG_SET_WHITE_BALANCE,
|
||||
CFG_SET_AUTOFOCUS,
|
||||
CFG_CANCEL_AUTOFOCUS,
|
||||
CFG_SET_STREAM_TYPE,
|
||||
CFG_SET_I2C_SYNC_PARAM,
|
||||
CFG_WRITE_I2C_ARRAY_ASYNC,
|
||||
CFG_WRITE_I2C_ARRAY_SYNC,
|
||||
CFG_WRITE_I2C_ARRAY_SYNC_BLOCK,
|
||||
};
|
||||
|
||||
enum msm_actuator_cfg_type_t {
|
||||
CFG_GET_ACTUATOR_INFO,
|
||||
CFG_SET_ACTUATOR_INFO,
|
||||
CFG_SET_DEFAULT_FOCUS,
|
||||
CFG_MOVE_FOCUS,
|
||||
CFG_SET_POSITION,
|
||||
CFG_ACTUATOR_POWERDOWN,
|
||||
CFG_ACTUATOR_POWERUP,
|
||||
CFG_ACTUATOR_INIT,
|
||||
};
|
||||
|
||||
enum msm_ois_cfg_type_t {
|
||||
CFG_OIS_INIT,
|
||||
CFG_OIS_POWERDOWN,
|
||||
CFG_OIS_POWERUP,
|
||||
CFG_OIS_CONTROL,
|
||||
CFG_OIS_I2C_WRITE_SEQ_TABLE,
|
||||
};
|
||||
|
||||
enum msm_ois_i2c_operation {
|
||||
MSM_OIS_WRITE = 0,
|
||||
MSM_OIS_POLL,
|
||||
};
|
||||
|
||||
struct reg_settings_ois_t {
|
||||
uint16_t reg_addr;
|
||||
enum msm_camera_i2c_reg_addr_type addr_type;
|
||||
uint32_t reg_data;
|
||||
enum msm_camera_i2c_data_type data_type;
|
||||
enum msm_ois_i2c_operation i2c_operation;
|
||||
uint32_t delay;
|
||||
};
|
||||
|
||||
struct msm_ois_params_t {
|
||||
uint16_t data_size;
|
||||
uint16_t setting_size;
|
||||
uint32_t i2c_addr;
|
||||
enum i2c_freq_mode_t i2c_freq_mode;
|
||||
enum msm_camera_i2c_reg_addr_type i2c_addr_type;
|
||||
enum msm_camera_i2c_data_type i2c_data_type;
|
||||
struct reg_settings_ois_t *settings;
|
||||
};
|
||||
|
||||
struct msm_ois_set_info_t {
|
||||
struct msm_ois_params_t ois_params;
|
||||
};
|
||||
|
||||
struct msm_actuator_move_params_t {
|
||||
int8_t dir;
|
||||
int8_t sign_dir;
|
||||
int16_t dest_step_pos;
|
||||
int32_t num_steps;
|
||||
uint16_t curr_lens_pos;
|
||||
struct damping_params_t *ringing_params;
|
||||
};
|
||||
|
||||
struct msm_actuator_tuning_params_t {
|
||||
int16_t initial_code;
|
||||
uint16_t pwd_step;
|
||||
uint16_t region_size;
|
||||
uint32_t total_steps;
|
||||
struct region_params_t *region_params;
|
||||
};
|
||||
|
||||
struct park_lens_data_t {
|
||||
uint32_t damping_step;
|
||||
uint32_t damping_delay;
|
||||
uint32_t hw_params;
|
||||
uint32_t max_step;
|
||||
};
|
||||
|
||||
struct msm_actuator_params_t {
|
||||
enum actuator_type act_type;
|
||||
uint8_t reg_tbl_size;
|
||||
uint16_t data_size;
|
||||
uint16_t init_setting_size;
|
||||
uint32_t i2c_addr;
|
||||
enum i2c_freq_mode_t i2c_freq_mode;
|
||||
enum msm_actuator_addr_type i2c_addr_type;
|
||||
enum msm_actuator_data_type i2c_data_type;
|
||||
struct msm_actuator_reg_params_t *reg_tbl_params;
|
||||
struct reg_settings_t *init_settings;
|
||||
struct park_lens_data_t park_lens;
|
||||
};
|
||||
|
||||
struct msm_actuator_set_info_t {
|
||||
struct msm_actuator_params_t actuator_params;
|
||||
struct msm_actuator_tuning_params_t af_tuning_params;
|
||||
};
|
||||
|
||||
struct msm_actuator_get_info_t {
|
||||
uint32_t focal_length_num;
|
||||
uint32_t focal_length_den;
|
||||
uint32_t f_number_num;
|
||||
uint32_t f_number_den;
|
||||
uint32_t f_pix_num;
|
||||
uint32_t f_pix_den;
|
||||
uint32_t total_f_dist_num;
|
||||
uint32_t total_f_dist_den;
|
||||
uint32_t hor_view_angle_num;
|
||||
uint32_t hor_view_angle_den;
|
||||
uint32_t ver_view_angle_num;
|
||||
uint32_t ver_view_angle_den;
|
||||
};
|
||||
|
||||
enum af_camera_name {
|
||||
ACTUATOR_MAIN_CAM_0,
|
||||
ACTUATOR_MAIN_CAM_1,
|
||||
ACTUATOR_MAIN_CAM_2,
|
||||
ACTUATOR_MAIN_CAM_3,
|
||||
ACTUATOR_MAIN_CAM_4,
|
||||
ACTUATOR_MAIN_CAM_5,
|
||||
ACTUATOR_WEB_CAM_0,
|
||||
ACTUATOR_WEB_CAM_1,
|
||||
ACTUATOR_WEB_CAM_2,
|
||||
};
|
||||
|
||||
struct msm_ois_cfg_data {
|
||||
int cfgtype;
|
||||
union {
|
||||
struct msm_ois_set_info_t set_info;
|
||||
struct msm_camera_i2c_seq_reg_setting *settings;
|
||||
} cfg;
|
||||
};
|
||||
|
||||
struct msm_actuator_set_position_t {
|
||||
uint16_t number_of_steps;
|
||||
uint32_t hw_params;
|
||||
uint16_t pos[MAX_NUMBER_OF_STEPS];
|
||||
uint16_t delay[MAX_NUMBER_OF_STEPS];
|
||||
};
|
||||
|
||||
struct msm_actuator_cfg_data {
|
||||
int cfgtype;
|
||||
uint8_t is_af_supported;
|
||||
union {
|
||||
struct msm_actuator_move_params_t move;
|
||||
struct msm_actuator_set_info_t set_info;
|
||||
struct msm_actuator_get_info_t get_info;
|
||||
struct msm_actuator_set_position_t setpos;
|
||||
enum af_camera_name cam_name;
|
||||
} cfg;
|
||||
};
|
||||
|
||||
enum msm_camera_led_config_t {
|
||||
MSM_CAMERA_LED_OFF,
|
||||
MSM_CAMERA_LED_LOW,
|
||||
MSM_CAMERA_LED_HIGH,
|
||||
MSM_CAMERA_LED_INIT,
|
||||
MSM_CAMERA_LED_RELEASE,
|
||||
};
|
||||
|
||||
struct msm_camera_led_cfg_t {
|
||||
enum msm_camera_led_config_t cfgtype;
|
||||
int32_t torch_current[MAX_LED_TRIGGERS];
|
||||
int32_t flash_current[MAX_LED_TRIGGERS];
|
||||
int32_t flash_duration[MAX_LED_TRIGGERS];
|
||||
};
|
||||
|
||||
struct msm_flash_init_info_t {
|
||||
enum msm_flash_driver_type flash_driver_type;
|
||||
uint32_t slave_addr;
|
||||
enum i2c_freq_mode_t i2c_freq_mode;
|
||||
struct msm_sensor_power_setting_array *power_setting_array;
|
||||
struct msm_camera_i2c_reg_setting_array *settings;
|
||||
};
|
||||
|
||||
struct msm_flash_cfg_data_t {
|
||||
enum msm_flash_cfg_type_t cfg_type;
|
||||
int32_t flash_current[MAX_LED_TRIGGERS];
|
||||
int32_t flash_duration[MAX_LED_TRIGGERS];
|
||||
union {
|
||||
struct msm_flash_init_info_t *flash_init_info;
|
||||
struct msm_camera_i2c_reg_setting_array *settings;
|
||||
} cfg;
|
||||
};
|
||||
|
||||
/* sensor init structures and enums */
|
||||
enum msm_sensor_init_cfg_type_t {
|
||||
CFG_SINIT_PROBE,
|
||||
CFG_SINIT_PROBE_DONE,
|
||||
CFG_SINIT_PROBE_WAIT_DONE,
|
||||
};
|
||||
|
||||
struct sensor_init_cfg_data {
|
||||
enum msm_sensor_init_cfg_type_t cfgtype;
|
||||
struct msm_sensor_info_t probed_info;
|
||||
char entity_name[MAX_SENSOR_NAME];
|
||||
union {
|
||||
void *setting;
|
||||
} cfg;
|
||||
};
|
||||
|
||||
#define VIDIOC_MSM_SENSOR_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct sensorb_cfg_data)
|
||||
|
||||
#define VIDIOC_MSM_SENSOR_RELEASE \
|
||||
_IO('V', BASE_VIDIOC_PRIVATE + 2)
|
||||
|
||||
#define VIDIOC_MSM_SENSOR_GET_SUBDEV_ID \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 3, uint32_t)
|
||||
|
||||
#define VIDIOC_MSM_CSIPHY_IO_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct csiphy_cfg_data)
|
||||
|
||||
#define VIDIOC_MSM_CSID_IO_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct csid_cfg_data)
|
||||
|
||||
#define VIDIOC_MSM_ACTUATOR_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct msm_actuator_cfg_data)
|
||||
|
||||
#define VIDIOC_MSM_FLASH_LED_DATA_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_camera_led_cfg_t)
|
||||
|
||||
#define VIDIOC_MSM_EEPROM_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_eeprom_cfg_data)
|
||||
|
||||
#define VIDIOC_MSM_SENSOR_GET_AF_STATUS \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 9, uint32_t)
|
||||
|
||||
#define VIDIOC_MSM_SENSOR_INIT_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 10, struct sensor_init_cfg_data)
|
||||
|
||||
#define VIDIOC_MSM_OIS_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 11, struct msm_ois_cfg_data)
|
||||
|
||||
#define VIDIOC_MSM_FLASH_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 13, struct msm_flash_cfg_data_t)
|
||||
|
||||
#endif
|
||||
|
||||
|
|
@ -1,4 +1,4 @@
|
|||
/* Copyright (c) 2009-2012, 2014-2015 The Linux Foundation. All rights reserved.
|
||||
/* Copyright (c) 2009-2012, 2014-2016 The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
|
|
@ -13,17 +13,9 @@
|
|||
#ifndef __UAPI_MSM_CAMERA_H
|
||||
#define __UAPI_MSM_CAMERA_H
|
||||
|
||||
#ifdef MSM_CAMERA_BIONIC
|
||||
#include <sys/types.h>
|
||||
#endif
|
||||
#include <linux/videodev2.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/ioctl.h>
|
||||
#ifdef MSM_CAMERA_GCC
|
||||
#include <time.h>
|
||||
#else
|
||||
#include <linux/time.h>
|
||||
#endif
|
||||
|
||||
#include <linux/msm_ion.h>
|
||||
|
||||
|
|
@ -690,7 +682,7 @@ struct outputCfg {
|
|||
#define OUTPUT_ALL_CHNLS 8
|
||||
#define OUTPUT_VIDEO_ALL_CHNLS 9
|
||||
#define OUTPUT_ZSL_ALL_CHNLS 10
|
||||
#define LAST_AXI_OUTPUT_MODE_ENUM = OUTPUT_ZSL_ALL_CHNLS
|
||||
#define LAST_AXI_OUTPUT_MODE_ENUM OUTPUT_ZSL_ALL_CHNLS
|
||||
|
||||
#define OUTPUT_PRIM BIT(8)
|
||||
#define OUTPUT_PRIM_ALL_CHNLS BIT(9)
|
||||
|
|
@ -2070,7 +2062,7 @@ struct msm_mctl_set_sdev_data {
|
|||
_IOWR('V', BASE_VIDIOC_PRIVATE + 22, void *)
|
||||
|
||||
#define VIDIOC_MSM_AXI_RDI_COUNT_UPDATE \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 23, struct rdi_count_msg)
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 23, void *)
|
||||
|
||||
#define VIDIOC_MSM_VFE_INIT \
|
||||
_IO('V', BASE_VIDIOC_PRIVATE + 24)
|
||||
|
|
@ -2229,5 +2221,4 @@ struct msm_ver_num_info {
|
|||
((handle & 0x80) ? (handle & 0x7F) : 0xFF)
|
||||
#define SET_VIDEO_INST_IDX(handle, data) \
|
||||
(handle |= (0x1 << 7) | (data & 0x7F))
|
||||
|
||||
#endif /* __UAPI_MSM_CAMERA_H */
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,5 +1,7 @@
|
|||
#ifndef __LINUX_MSM_CAMSENSOR_SDK_H
|
||||
#define __LINUX_MSM_CAMSENSOR_SDK_H
|
||||
#ifndef __UAPI_LINUX_MSM_CAMSENSOR_SDK_H
|
||||
#define __UAPI_LINUX_MSM_CAMSENSOR_SDK_H
|
||||
|
||||
#include <linux/videodev2.h>
|
||||
|
||||
#define KVERSION 0x1
|
||||
|
||||
|
|
@ -379,4 +381,5 @@ struct msm_camera_i2c_reg_setting_array {
|
|||
enum msm_camera_i2c_data_type data_type;
|
||||
unsigned short delay;
|
||||
};
|
||||
#endif /* __LINUX_MSM_CAM_SENSOR_H */
|
||||
|
||||
#endif
|
||||
|
|
@ -1,18 +1,8 @@
|
|||
/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
#ifndef __UAPI_MSM_FD__
|
||||
#define __UAPI_MSM_FD__
|
||||
|
||||
#include <linux/videodev2.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
/*
|
||||
* struct msm_fd_event - Structure contain event info.
|
||||
|
|
@ -66,25 +56,6 @@ struct msm_fd_result {
|
|||
struct msm_fd_face_data __user *face_data;
|
||||
};
|
||||
|
||||
#ifdef CONFIG_COMPAT
|
||||
/*
|
||||
* struct msm_fd_result32 - Compat structure contain detected faces result.
|
||||
* @frame_id: Frame id of requested result.
|
||||
* @face_cnt: Number of result faces, driver can modify this value (to smaller)
|
||||
* @face_data: Pointer to array of face data structures.
|
||||
* Array size should not be smaller then face_cnt.
|
||||
*/
|
||||
struct msm_fd_result32 {
|
||||
__u32 frame_id;
|
||||
__u32 face_cnt;
|
||||
compat_uptr_t face_data;
|
||||
};
|
||||
|
||||
/* MSM FD compat private ioctl ID */
|
||||
#define VIDIOC_MSM_FD_GET_RESULT32 \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_fd_result32)
|
||||
#endif
|
||||
|
||||
/* MSM FD private ioctl ID */
|
||||
#define VIDIOC_MSM_FD_GET_RESULT \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_fd_result)
|
||||
|
|
@ -101,4 +72,5 @@ struct msm_fd_result32 {
|
|||
#define V4L2_CID_FD_WORK_MEMORY_SIZE (V4L2_CID_PRIVATE_BASE + 5)
|
||||
#define V4L2_CID_FD_WORK_MEMORY_FD (V4L2_CID_PRIVATE_BASE + 6)
|
||||
|
||||
#endif /* __UAPI_MSM_FD__ */
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
#ifndef __LINUX_MSM_JPEG_H
|
||||
#define __LINUX_MSM_JPEG_H
|
||||
#ifndef __UAPI_LINUX_MSM_JPEG_H
|
||||
#define __UAPI_LINUX_MSM_JPEG_H
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/ioctl.h>
|
||||
|
|
@ -121,4 +121,5 @@ struct msm_jpeg_hw_cmds {
|
|||
struct msm_jpeg_hw_cmd hw_cmd[1];
|
||||
};
|
||||
|
||||
#endif /* __LINUX_MSM_JPEG_H */
|
||||
#endif
|
||||
|
||||
203
include/uapi/media/msmb_camera.h
Normal file
203
include/uapi/media/msmb_camera.h
Normal file
|
|
@ -0,0 +1,203 @@
|
|||
#ifndef __UAPI_LINUX_MSMB_CAMERA_H
|
||||
#define __UAPI_LINUX_MSMB_CAMERA_H
|
||||
|
||||
#include <linux/videodev2.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/ioctl.h>
|
||||
|
||||
#define MSM_CAM_LOGSYNC_FILE_NAME "logsync"
|
||||
#define MSM_CAM_LOGSYNC_FILE_BASEDIR "camera"
|
||||
|
||||
#define MSM_CAM_V4L2_IOCTL_NOTIFY \
|
||||
_IOW('V', BASE_VIDIOC_PRIVATE + 30, struct msm_v4l2_event_data)
|
||||
|
||||
#define MSM_CAM_V4L2_IOCTL_NOTIFY_META \
|
||||
_IOW('V', BASE_VIDIOC_PRIVATE + 31, struct msm_v4l2_event_data)
|
||||
|
||||
#define MSM_CAM_V4L2_IOCTL_CMD_ACK \
|
||||
_IOW('V', BASE_VIDIOC_PRIVATE + 32, struct msm_v4l2_event_data)
|
||||
|
||||
#define MSM_CAM_V4L2_IOCTL_NOTIFY_ERROR \
|
||||
_IOW('V', BASE_VIDIOC_PRIVATE + 33, struct msm_v4l2_event_data)
|
||||
|
||||
#define MSM_CAM_V4L2_IOCTL_NOTIFY_DEBUG \
|
||||
_IOW('V', BASE_VIDIOC_PRIVATE + 34, struct msm_v4l2_event_data)
|
||||
|
||||
#define QCAMERA_DEVICE_GROUP_ID 1
|
||||
#define QCAMERA_VNODE_GROUP_ID 2
|
||||
#define MSM_CAMERA_NAME "msm_camera"
|
||||
#define MSM_CONFIGURATION_NAME "msm_config"
|
||||
|
||||
#define MSM_CAMERA_SUBDEV_CSIPHY 0
|
||||
#define MSM_CAMERA_SUBDEV_CSID 1
|
||||
#define MSM_CAMERA_SUBDEV_ISPIF 2
|
||||
#define MSM_CAMERA_SUBDEV_VFE 3
|
||||
#define MSM_CAMERA_SUBDEV_AXI 4
|
||||
#define MSM_CAMERA_SUBDEV_VPE 5
|
||||
#define MSM_CAMERA_SUBDEV_SENSOR 6
|
||||
#define MSM_CAMERA_SUBDEV_ACTUATOR 7
|
||||
#define MSM_CAMERA_SUBDEV_EEPROM 8
|
||||
#define MSM_CAMERA_SUBDEV_CPP 9
|
||||
#define MSM_CAMERA_SUBDEV_CCI 10
|
||||
#define MSM_CAMERA_SUBDEV_LED_FLASH 11
|
||||
#define MSM_CAMERA_SUBDEV_STROBE_FLASH 12
|
||||
#define MSM_CAMERA_SUBDEV_BUF_MNGR 13
|
||||
#define MSM_CAMERA_SUBDEV_SENSOR_INIT 14
|
||||
#define MSM_CAMERA_SUBDEV_OIS 15
|
||||
#define MSM_CAMERA_SUBDEV_FLASH 16
|
||||
#define MSM_CAMERA_SUBDEV_EXT 17
|
||||
|
||||
#define MSM_MAX_CAMERA_SENSORS 5
|
||||
|
||||
/* The below macro is defined to put an upper limit on maximum
|
||||
* number of buffer requested per stream. In case of extremely
|
||||
* large value for number of buffer due to data structure corruption
|
||||
* we return error to avoid integer overflow. Group processing
|
||||
* can have max of 9 groups of 8 bufs each. This value may be
|
||||
* configured in future*/
|
||||
#define MSM_CAMERA_MAX_STREAM_BUF 72
|
||||
|
||||
/* Max batch size of processing */
|
||||
#define MSM_CAMERA_MAX_USER_BUFF_CNT 16
|
||||
|
||||
/* featur base */
|
||||
#define MSM_CAMERA_FEATURE_BASE 0x00010000
|
||||
#define MSM_CAMERA_FEATURE_SHUTDOWN (MSM_CAMERA_FEATURE_BASE + 1)
|
||||
|
||||
#define MSM_CAMERA_STATUS_BASE 0x00020000
|
||||
#define MSM_CAMERA_STATUS_FAIL (MSM_CAMERA_STATUS_BASE + 1)
|
||||
#define MSM_CAMERA_STATUS_SUCCESS (MSM_CAMERA_STATUS_BASE + 2)
|
||||
|
||||
/* event type */
|
||||
#define MSM_CAMERA_V4L2_EVENT_TYPE (V4L2_EVENT_PRIVATE_START + 0x00002000)
|
||||
|
||||
/* event id */
|
||||
#define MSM_CAMERA_EVENT_MIN 0
|
||||
#define MSM_CAMERA_NEW_SESSION (MSM_CAMERA_EVENT_MIN + 1)
|
||||
#define MSM_CAMERA_DEL_SESSION (MSM_CAMERA_EVENT_MIN + 2)
|
||||
#define MSM_CAMERA_SET_PARM (MSM_CAMERA_EVENT_MIN + 3)
|
||||
#define MSM_CAMERA_GET_PARM (MSM_CAMERA_EVENT_MIN + 4)
|
||||
#define MSM_CAMERA_MAPPING_CFG (MSM_CAMERA_EVENT_MIN + 5)
|
||||
#define MSM_CAMERA_MAPPING_SES (MSM_CAMERA_EVENT_MIN + 6)
|
||||
#define MSM_CAMERA_MSM_NOTIFY (MSM_CAMERA_EVENT_MIN + 7)
|
||||
#define MSM_CAMERA_EVENT_MAX (MSM_CAMERA_EVENT_MIN + 8)
|
||||
|
||||
/* data.command */
|
||||
#define MSM_CAMERA_PRIV_S_CROP (V4L2_CID_PRIVATE_BASE + 1)
|
||||
#define MSM_CAMERA_PRIV_G_CROP (V4L2_CID_PRIVATE_BASE + 2)
|
||||
#define MSM_CAMERA_PRIV_G_FMT (V4L2_CID_PRIVATE_BASE + 3)
|
||||
#define MSM_CAMERA_PRIV_S_FMT (V4L2_CID_PRIVATE_BASE + 4)
|
||||
#define MSM_CAMERA_PRIV_TRY_FMT (V4L2_CID_PRIVATE_BASE + 5)
|
||||
#define MSM_CAMERA_PRIV_METADATA (V4L2_CID_PRIVATE_BASE + 6)
|
||||
#define MSM_CAMERA_PRIV_QUERY_CAP (V4L2_CID_PRIVATE_BASE + 7)
|
||||
#define MSM_CAMERA_PRIV_STREAM_ON (V4L2_CID_PRIVATE_BASE + 8)
|
||||
#define MSM_CAMERA_PRIV_STREAM_OFF (V4L2_CID_PRIVATE_BASE + 9)
|
||||
#define MSM_CAMERA_PRIV_NEW_STREAM (V4L2_CID_PRIVATE_BASE + 10)
|
||||
#define MSM_CAMERA_PRIV_DEL_STREAM (V4L2_CID_PRIVATE_BASE + 11)
|
||||
#define MSM_CAMERA_PRIV_SHUTDOWN (V4L2_CID_PRIVATE_BASE + 12)
|
||||
#define MSM_CAMERA_PRIV_STREAM_INFO_SYNC \
|
||||
(V4L2_CID_PRIVATE_BASE + 13)
|
||||
#define MSM_CAMERA_PRIV_G_SESSION_ID (V4L2_CID_PRIVATE_BASE + 14)
|
||||
#define MSM_CAMERA_PRIV_CMD_MAX 20
|
||||
|
||||
/* data.status - success */
|
||||
#define MSM_CAMERA_CMD_SUCESS 0x00000001
|
||||
#define MSM_CAMERA_BUF_MAP_SUCESS 0x00000002
|
||||
|
||||
/* data.status - error */
|
||||
#define MSM_CAMERA_ERR_EVT_BASE 0x00010000
|
||||
#define MSM_CAMERA_ERR_CMD_FAIL (MSM_CAMERA_ERR_EVT_BASE + 1)
|
||||
#define MSM_CAMERA_ERR_MAPPING (MSM_CAMERA_ERR_EVT_BASE + 2)
|
||||
#define MSM_CAMERA_ERR_DEVICE_BUSY (MSM_CAMERA_ERR_EVT_BASE + 3)
|
||||
|
||||
/* The msm_v4l2_event_data structure should match the
|
||||
* v4l2_event.u.data field.
|
||||
* should not exceed 16 elements */
|
||||
struct msm_v4l2_event_data {
|
||||
/*word 0*/
|
||||
unsigned int command;
|
||||
/*word 1*/
|
||||
unsigned int status;
|
||||
/*word 2*/
|
||||
unsigned int session_id;
|
||||
/*word 3*/
|
||||
unsigned int stream_id;
|
||||
/*word 4*/
|
||||
unsigned int map_op;
|
||||
/*word 5*/
|
||||
unsigned int map_buf_idx;
|
||||
/*word 6*/
|
||||
unsigned int notify;
|
||||
/*word 7*/
|
||||
unsigned int arg_value;
|
||||
/*word 8*/
|
||||
unsigned int ret_value;
|
||||
/*word 9*/
|
||||
unsigned int v4l2_event_type;
|
||||
/*word 10*/
|
||||
unsigned int v4l2_event_id;
|
||||
/*word 11*/
|
||||
unsigned int handle;
|
||||
/*word 12*/
|
||||
unsigned int nop6;
|
||||
/*word 13*/
|
||||
unsigned int nop7;
|
||||
/*word 14*/
|
||||
unsigned int nop8;
|
||||
/*word 15*/
|
||||
unsigned int nop9;
|
||||
};
|
||||
|
||||
/* map to v4l2_format.fmt.raw_data */
|
||||
struct msm_v4l2_format_data {
|
||||
enum v4l2_buf_type type;
|
||||
unsigned int width;
|
||||
unsigned int height;
|
||||
unsigned int pixelformat; /* FOURCC */
|
||||
unsigned char num_planes;
|
||||
unsigned int plane_sizes[VIDEO_MAX_PLANES];
|
||||
};
|
||||
|
||||
/* MSM Four-character-code (FOURCC) */
|
||||
#define msm_v4l2_fourcc(a, b, c, d)\
|
||||
((__u32)(a) | ((__u32)(b) << 8) | ((__u32)(c) << 16) |\
|
||||
((__u32)(d) << 24))
|
||||
|
||||
/* Composite stats */
|
||||
#define MSM_V4L2_PIX_FMT_STATS_COMB v4l2_fourcc('S', 'T', 'C', 'M')
|
||||
/* AEC stats */
|
||||
#define MSM_V4L2_PIX_FMT_STATS_AE v4l2_fourcc('S', 'T', 'A', 'E')
|
||||
/* AF stats */
|
||||
#define MSM_V4L2_PIX_FMT_STATS_AF v4l2_fourcc('S', 'T', 'A', 'F')
|
||||
/* AWB stats */
|
||||
#define MSM_V4L2_PIX_FMT_STATS_AWB v4l2_fourcc('S', 'T', 'W', 'B')
|
||||
/* IHIST stats */
|
||||
#define MSM_V4L2_PIX_FMT_STATS_IHST v4l2_fourcc('I', 'H', 'S', 'T')
|
||||
/* Column count stats */
|
||||
#define MSM_V4L2_PIX_FMT_STATS_CS v4l2_fourcc('S', 'T', 'C', 'S')
|
||||
/* Row count stats */
|
||||
#define MSM_V4L2_PIX_FMT_STATS_RS v4l2_fourcc('S', 'T', 'R', 'S')
|
||||
/* Bayer Grid stats */
|
||||
#define MSM_V4L2_PIX_FMT_STATS_BG v4l2_fourcc('S', 'T', 'B', 'G')
|
||||
/* Bayer focus stats */
|
||||
#define MSM_V4L2_PIX_FMT_STATS_BF v4l2_fourcc('S', 'T', 'B', 'F')
|
||||
/* Bayer hist stats */
|
||||
#define MSM_V4L2_PIX_FMT_STATS_BHST v4l2_fourcc('B', 'H', 'S', 'T')
|
||||
|
||||
enum smmu_attach_mode {
|
||||
NON_SECURE_MODE = 0x01,
|
||||
SECURE_MODE = 0x02,
|
||||
MAX_PROTECTION_MODE = 0x03,
|
||||
};
|
||||
|
||||
struct msm_camera_smmu_attach_type {
|
||||
enum smmu_attach_mode attach;
|
||||
};
|
||||
|
||||
struct msm_camera_user_buf_cont_t {
|
||||
unsigned int buf_cnt;
|
||||
unsigned int buf_idx[MSM_CAMERA_MAX_USER_BUFF_CNT];
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
#ifndef __UAPI_MEDIA_MSMB_BUF_MNGR_H__
|
||||
#define __UAPI_MEDIA_MSMB_BUF_MNGR_H__
|
||||
#ifndef __UAPI_MEDIA_MSMB_GENERIC_BUF_MGR_H__
|
||||
#define __UAPI_MEDIA_MSMB_GENERIC_BUF_MGR_H__
|
||||
|
||||
#include <media/msmb_camera.h>
|
||||
|
||||
|
|
@ -34,8 +34,6 @@ struct msm_buf_mngr_main_cont_info {
|
|||
int32_t cont_fd;
|
||||
};
|
||||
|
||||
struct v4l2_subdev *msm_buf_mngr_get_subdev(void);
|
||||
|
||||
#define VIDIOC_MSM_BUF_MNGR_GET_BUF \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 33, struct msm_buf_mngr_info)
|
||||
|
||||
|
|
@ -57,29 +55,5 @@ struct v4l2_subdev *msm_buf_mngr_get_subdev(void);
|
|||
#define VIDIOC_MSM_BUF_MNGR_FLUSH \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 39, struct msm_buf_mngr_info)
|
||||
|
||||
#ifdef CONFIG_COMPAT
|
||||
struct msm_buf_mngr_info32_t {
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
uint32_t frame_id;
|
||||
struct compat_timeval timestamp;
|
||||
uint32_t index;
|
||||
uint32_t reserved;
|
||||
enum msm_camera_buf_mngr_buf_type type;
|
||||
struct msm_camera_user_buf_cont_t user_buf;
|
||||
};
|
||||
|
||||
#define VIDIOC_MSM_BUF_MNGR_GET_BUF32 \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 33, struct msm_buf_mngr_info32_t)
|
||||
|
||||
#define VIDIOC_MSM_BUF_MNGR_PUT_BUF32 \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 34, struct msm_buf_mngr_info32_t)
|
||||
|
||||
#define VIDIOC_MSM_BUF_MNGR_BUF_DONE32 \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 35, struct msm_buf_mngr_info32_t)
|
||||
|
||||
#define VIDIOC_MSM_BUF_MNGR_FLUSH32 \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 39, struct msm_buf_mngr_info32_t)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
|||
864
include/uapi/media/msmb_isp.h
Normal file
864
include/uapi/media/msmb_isp.h
Normal file
|
|
@ -0,0 +1,864 @@
|
|||
#ifndef __UAPI_MSMB_ISP__
|
||||
#define __UAPI_MSMB_ISP__
|
||||
|
||||
#include <linux/videodev2.h>
|
||||
|
||||
#define MAX_PLANES_PER_STREAM 3
|
||||
#define MAX_NUM_STREAM 7
|
||||
|
||||
#define ISP_VERSION_47 47
|
||||
#define ISP_VERSION_46 46
|
||||
#define ISP_VERSION_44 44
|
||||
#define ISP_VERSION_40 40
|
||||
#define ISP_VERSION_32 32
|
||||
#define ISP_NATIVE_BUF_BIT (0x10000 << 0)
|
||||
#define ISP0_BIT (0x10000 << 1)
|
||||
#define ISP1_BIT (0x10000 << 2)
|
||||
#define ISP_META_CHANNEL_BIT (0x10000 << 3)
|
||||
#define ISP_SCRATCH_BUF_BIT (0x10000 << 4)
|
||||
#define ISP_OFFLINE_STATS_BIT (0x10000 << 5)
|
||||
#define ISP_STATS_STREAM_BIT 0x80000000
|
||||
|
||||
struct msm_vfe_cfg_cmd_list;
|
||||
|
||||
enum ISP_START_PIXEL_PATTERN {
|
||||
ISP_BAYER_RGRGRG,
|
||||
ISP_BAYER_GRGRGR,
|
||||
ISP_BAYER_BGBGBG,
|
||||
ISP_BAYER_GBGBGB,
|
||||
ISP_YUV_YCbYCr,
|
||||
ISP_YUV_YCrYCb,
|
||||
ISP_YUV_CbYCrY,
|
||||
ISP_YUV_CrYCbY,
|
||||
ISP_PIX_PATTERN_MAX
|
||||
};
|
||||
|
||||
enum msm_vfe_plane_fmt {
|
||||
Y_PLANE,
|
||||
CB_PLANE,
|
||||
CR_PLANE,
|
||||
CRCB_PLANE,
|
||||
CBCR_PLANE,
|
||||
VFE_PLANE_FMT_MAX
|
||||
};
|
||||
|
||||
enum msm_vfe_input_src {
|
||||
VFE_PIX_0,
|
||||
VFE_RAW_0,
|
||||
VFE_RAW_1,
|
||||
VFE_RAW_2,
|
||||
VFE_SRC_MAX,
|
||||
};
|
||||
|
||||
enum msm_vfe_axi_stream_src {
|
||||
PIX_ENCODER,
|
||||
PIX_VIEWFINDER,
|
||||
PIX_VIDEO,
|
||||
CAMIF_RAW,
|
||||
IDEAL_RAW,
|
||||
RDI_INTF_0,
|
||||
RDI_INTF_1,
|
||||
RDI_INTF_2,
|
||||
VFE_AXI_SRC_MAX
|
||||
};
|
||||
|
||||
enum msm_vfe_frame_skip_pattern {
|
||||
NO_SKIP,
|
||||
EVERY_2FRAME,
|
||||
EVERY_3FRAME,
|
||||
EVERY_4FRAME,
|
||||
EVERY_5FRAME,
|
||||
EVERY_6FRAME,
|
||||
EVERY_7FRAME,
|
||||
EVERY_8FRAME,
|
||||
EVERY_16FRAME,
|
||||
EVERY_32FRAME,
|
||||
SKIP_ALL,
|
||||
SKIP_RANGE,
|
||||
MAX_SKIP,
|
||||
};
|
||||
|
||||
/*
|
||||
* Define an unused period. When this period is set it means that the stream is
|
||||
* stopped(i.e the pattern is 0). We don't track the current pattern, just the
|
||||
* period defines what the pattern is, if period is this then pattern is 0 else
|
||||
* pattern is 1
|
||||
*/
|
||||
#define MSM_VFE_STREAM_STOP_PERIOD 15
|
||||
|
||||
enum msm_isp_stats_type {
|
||||
MSM_ISP_STATS_AEC, /* legacy based AEC */
|
||||
MSM_ISP_STATS_AF, /* legacy based AF */
|
||||
MSM_ISP_STATS_AWB, /* legacy based AWB */
|
||||
MSM_ISP_STATS_RS, /* legacy based RS */
|
||||
MSM_ISP_STATS_CS, /* legacy based CS */
|
||||
MSM_ISP_STATS_IHIST, /* legacy based HIST */
|
||||
MSM_ISP_STATS_SKIN, /* legacy based SKIN */
|
||||
MSM_ISP_STATS_BG, /* Bayer Grids */
|
||||
MSM_ISP_STATS_BF, /* Bayer Focus */
|
||||
MSM_ISP_STATS_BE, /* Bayer Exposure*/
|
||||
MSM_ISP_STATS_BHIST, /* Bayer Hist */
|
||||
MSM_ISP_STATS_BF_SCALE, /* Bayer Focus scale */
|
||||
MSM_ISP_STATS_HDR_BE, /* HDR Bayer Exposure */
|
||||
MSM_ISP_STATS_HDR_BHIST, /* HDR Bayer Hist */
|
||||
MSM_ISP_STATS_AEC_BG, /* AEC BG */
|
||||
MSM_ISP_STATS_MAX /* MAX */
|
||||
};
|
||||
|
||||
/*
|
||||
* @stats_type_mask: Stats type mask (enum msm_isp_stats_type).
|
||||
* @stream_src_mask: Stream src mask (enum msm_vfe_axi_stream_src)
|
||||
* @skip_mode: skip pattern, if skip mode is range only then min/max is used
|
||||
* @min_frame_id: minimum frame id (valid only if skip_mode = RANGE)
|
||||
* @max_frame_id: maximum frame id (valid only if skip_mode = RANGE)
|
||||
*/
|
||||
struct msm_isp_sw_framskip {
|
||||
uint32_t stats_type_mask;
|
||||
uint32_t stream_src_mask;
|
||||
enum msm_vfe_frame_skip_pattern skip_mode;
|
||||
uint32_t min_frame_id;
|
||||
uint32_t max_frame_id;
|
||||
};
|
||||
|
||||
enum msm_vfe_testgen_color_pattern {
|
||||
COLOR_BAR_8_COLOR,
|
||||
UNICOLOR_WHITE,
|
||||
UNICOLOR_YELLOW,
|
||||
UNICOLOR_CYAN,
|
||||
UNICOLOR_GREEN,
|
||||
UNICOLOR_MAGENTA,
|
||||
UNICOLOR_RED,
|
||||
UNICOLOR_BLUE,
|
||||
UNICOLOR_BLACK,
|
||||
MAX_COLOR,
|
||||
};
|
||||
|
||||
enum msm_vfe_camif_input {
|
||||
CAMIF_DISABLED,
|
||||
CAMIF_PAD_REG_INPUT,
|
||||
CAMIF_MIDDI_INPUT,
|
||||
CAMIF_MIPI_INPUT,
|
||||
};
|
||||
|
||||
struct msm_vfe_fetch_engine_cfg {
|
||||
uint32_t input_format;
|
||||
uint32_t buf_width;
|
||||
uint32_t buf_height;
|
||||
uint32_t fetch_width;
|
||||
uint32_t fetch_height;
|
||||
uint32_t x_offset;
|
||||
uint32_t y_offset;
|
||||
uint32_t buf_stride;
|
||||
};
|
||||
|
||||
enum msm_vfe_camif_output_format {
|
||||
CAMIF_QCOM_RAW,
|
||||
CAMIF_MIPI_RAW,
|
||||
CAMIF_PLAIN_8,
|
||||
CAMIF_PLAIN_16,
|
||||
CAMIF_MAX_FORMAT,
|
||||
};
|
||||
|
||||
/*
|
||||
* Camif output general configuration
|
||||
*/
|
||||
struct msm_vfe_camif_subsample_cfg {
|
||||
uint32_t irq_subsample_period;
|
||||
uint32_t irq_subsample_pattern;
|
||||
uint32_t sof_counter_step;
|
||||
uint32_t pixel_skip;
|
||||
uint32_t line_skip;
|
||||
uint32_t first_line;
|
||||
uint32_t last_line;
|
||||
uint32_t first_pixel;
|
||||
uint32_t last_pixel;
|
||||
enum msm_vfe_camif_output_format output_format;
|
||||
};
|
||||
|
||||
/*
|
||||
* Camif frame and window configuration
|
||||
*/
|
||||
struct msm_vfe_camif_cfg {
|
||||
uint32_t lines_per_frame;
|
||||
uint32_t pixels_per_line;
|
||||
uint32_t first_pixel;
|
||||
uint32_t last_pixel;
|
||||
uint32_t first_line;
|
||||
uint32_t last_line;
|
||||
uint32_t epoch_line0;
|
||||
uint32_t epoch_line1;
|
||||
uint32_t is_split;
|
||||
enum msm_vfe_camif_input camif_input;
|
||||
struct msm_vfe_camif_subsample_cfg subsample_cfg;
|
||||
};
|
||||
|
||||
struct msm_vfe_testgen_cfg {
|
||||
uint32_t lines_per_frame;
|
||||
uint32_t pixels_per_line;
|
||||
uint32_t v_blank;
|
||||
uint32_t h_blank;
|
||||
enum ISP_START_PIXEL_PATTERN pixel_bayer_pattern;
|
||||
uint32_t rotate_period;
|
||||
enum msm_vfe_testgen_color_pattern color_bar_pattern;
|
||||
uint32_t burst_num_frame;
|
||||
};
|
||||
|
||||
enum msm_vfe_inputmux {
|
||||
CAMIF,
|
||||
TESTGEN,
|
||||
EXTERNAL_READ,
|
||||
};
|
||||
|
||||
enum msm_vfe_stats_composite_group {
|
||||
STATS_COMPOSITE_GRP_NONE,
|
||||
STATS_COMPOSITE_GRP_1,
|
||||
STATS_COMPOSITE_GRP_2,
|
||||
STATS_COMPOSITE_GRP_MAX,
|
||||
};
|
||||
|
||||
enum msm_vfe_hvx_streaming_cmd {
|
||||
HVX_DISABLE,
|
||||
HVX_ONE_WAY,
|
||||
HVX_ROUND_TRIP
|
||||
};
|
||||
|
||||
struct msm_vfe_pix_cfg {
|
||||
struct msm_vfe_camif_cfg camif_cfg;
|
||||
struct msm_vfe_testgen_cfg testgen_cfg;
|
||||
struct msm_vfe_fetch_engine_cfg fetch_engine_cfg;
|
||||
enum msm_vfe_inputmux input_mux;
|
||||
enum ISP_START_PIXEL_PATTERN pixel_pattern;
|
||||
uint32_t input_format;
|
||||
enum msm_vfe_hvx_streaming_cmd hvx_cmd;
|
||||
uint32_t is_split;
|
||||
};
|
||||
|
||||
struct msm_vfe_rdi_cfg {
|
||||
uint8_t cid;
|
||||
uint8_t frame_based;
|
||||
};
|
||||
|
||||
struct msm_vfe_input_cfg {
|
||||
union {
|
||||
struct msm_vfe_pix_cfg pix_cfg;
|
||||
struct msm_vfe_rdi_cfg rdi_cfg;
|
||||
} d;
|
||||
enum msm_vfe_input_src input_src;
|
||||
uint32_t input_pix_clk;
|
||||
};
|
||||
|
||||
struct msm_vfe_fetch_eng_start {
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
uint32_t buf_idx;
|
||||
uint8_t offline_mode;
|
||||
uint32_t fd;
|
||||
uint32_t buf_addr;
|
||||
uint32_t frame_id;
|
||||
};
|
||||
|
||||
struct msm_vfe_axi_plane_cfg {
|
||||
uint32_t output_width; /*Include padding*/
|
||||
uint32_t output_height;
|
||||
uint32_t output_stride;
|
||||
uint32_t output_scan_lines;
|
||||
uint32_t output_plane_format; /*Y/Cb/Cr/CbCr*/
|
||||
uint32_t plane_addr_offset;
|
||||
uint8_t csid_src; /*RDI 0-2*/
|
||||
uint8_t rdi_cid;/*CID 1-16*/
|
||||
};
|
||||
|
||||
enum msm_stream_memory_input_t {
|
||||
MEMORY_INPUT_DISABLED,
|
||||
MEMORY_INPUT_ENABLED
|
||||
};
|
||||
|
||||
struct msm_vfe_axi_stream_request_cmd {
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
uint32_t vt_enable;
|
||||
uint32_t output_format;/*Planar/RAW/Misc*/
|
||||
enum msm_vfe_axi_stream_src stream_src; /*CAMIF/IDEAL/RDIs*/
|
||||
struct msm_vfe_axi_plane_cfg plane_cfg[MAX_PLANES_PER_STREAM];
|
||||
|
||||
uint32_t burst_count;
|
||||
uint32_t hfr_mode;
|
||||
uint8_t frame_base;
|
||||
|
||||
uint32_t init_frame_drop; /*MAX 31 Frames*/
|
||||
enum msm_vfe_frame_skip_pattern frame_skip_pattern;
|
||||
uint8_t buf_divert; /* if TRUE no vb2 buf done. */
|
||||
/*Return values*/
|
||||
uint32_t axi_stream_handle;
|
||||
uint32_t controllable_output;
|
||||
uint32_t burst_len;
|
||||
/* Flag indicating memory input stream */
|
||||
enum msm_stream_memory_input_t memory_input;
|
||||
};
|
||||
|
||||
struct msm_vfe_axi_stream_release_cmd {
|
||||
uint32_t stream_handle;
|
||||
};
|
||||
|
||||
enum msm_vfe_axi_stream_cmd {
|
||||
STOP_STREAM,
|
||||
START_STREAM,
|
||||
STOP_IMMEDIATELY,
|
||||
};
|
||||
|
||||
struct msm_vfe_axi_stream_cfg_cmd {
|
||||
uint8_t num_streams;
|
||||
uint32_t stream_handle[VFE_AXI_SRC_MAX];
|
||||
enum msm_vfe_axi_stream_cmd cmd;
|
||||
uint8_t sync_frame_id_src;
|
||||
};
|
||||
|
||||
enum msm_vfe_axi_stream_update_type {
|
||||
ENABLE_STREAM_BUF_DIVERT,
|
||||
DISABLE_STREAM_BUF_DIVERT,
|
||||
UPDATE_STREAM_FRAMEDROP_PATTERN,
|
||||
UPDATE_STREAM_STATS_FRAMEDROP_PATTERN,
|
||||
UPDATE_STREAM_AXI_CONFIG,
|
||||
UPDATE_STREAM_REQUEST_FRAMES,
|
||||
UPDATE_STREAM_ADD_BUFQ,
|
||||
UPDATE_STREAM_REMOVE_BUFQ,
|
||||
UPDATE_STREAM_SW_FRAME_DROP,
|
||||
};
|
||||
|
||||
enum msm_vfe_iommu_type {
|
||||
IOMMU_ATTACH,
|
||||
IOMMU_DETACH,
|
||||
};
|
||||
|
||||
enum msm_vfe_buff_queue_id {
|
||||
VFE_BUF_QUEUE_DEFAULT,
|
||||
VFE_BUF_QUEUE_SHARED,
|
||||
VFE_BUF_QUEUE_MAX,
|
||||
};
|
||||
|
||||
struct msm_vfe_axi_stream_cfg_update_info {
|
||||
uint32_t stream_handle;
|
||||
uint32_t output_format;
|
||||
uint32_t user_stream_id;
|
||||
uint32_t frame_id;
|
||||
enum msm_vfe_frame_skip_pattern skip_pattern;
|
||||
struct msm_vfe_axi_plane_cfg plane_cfg[MAX_PLANES_PER_STREAM];
|
||||
struct msm_isp_sw_framskip sw_skip_info;
|
||||
};
|
||||
|
||||
struct msm_vfe_axi_halt_cmd {
|
||||
uint32_t stop_camif;
|
||||
uint32_t overflow_detected;
|
||||
uint32_t blocking_halt;
|
||||
};
|
||||
|
||||
struct msm_vfe_axi_reset_cmd {
|
||||
uint32_t blocking;
|
||||
uint32_t frame_id;
|
||||
};
|
||||
|
||||
struct msm_vfe_axi_restart_cmd {
|
||||
uint32_t enable_camif;
|
||||
};
|
||||
|
||||
struct msm_vfe_axi_stream_update_cmd {
|
||||
uint32_t num_streams;
|
||||
enum msm_vfe_axi_stream_update_type update_type;
|
||||
struct msm_vfe_axi_stream_cfg_update_info
|
||||
update_info[MSM_ISP_STATS_MAX];
|
||||
};
|
||||
|
||||
struct msm_vfe_smmu_attach_cmd {
|
||||
uint32_t security_mode;
|
||||
uint32_t iommu_attach_mode;
|
||||
};
|
||||
|
||||
struct msm_vfe_stats_stream_request_cmd {
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
enum msm_isp_stats_type stats_type;
|
||||
uint32_t composite_flag;
|
||||
uint32_t framedrop_pattern;
|
||||
uint32_t init_frame_drop; /*MAX 31 Frames*/
|
||||
uint32_t irq_subsample_pattern;
|
||||
uint32_t buffer_offset;
|
||||
uint32_t stream_handle;
|
||||
};
|
||||
|
||||
struct msm_vfe_stats_stream_release_cmd {
|
||||
uint32_t stream_handle;
|
||||
};
|
||||
struct msm_vfe_stats_stream_cfg_cmd {
|
||||
uint8_t num_streams;
|
||||
uint32_t stream_handle[MSM_ISP_STATS_MAX];
|
||||
uint8_t enable;
|
||||
uint32_t stats_burst_len;
|
||||
};
|
||||
|
||||
enum msm_vfe_reg_cfg_type {
|
||||
VFE_WRITE,
|
||||
VFE_WRITE_MB,
|
||||
VFE_READ,
|
||||
VFE_CFG_MASK,
|
||||
VFE_WRITE_DMI_16BIT,
|
||||
VFE_WRITE_DMI_32BIT,
|
||||
VFE_WRITE_DMI_64BIT,
|
||||
VFE_READ_DMI_16BIT,
|
||||
VFE_READ_DMI_32BIT,
|
||||
VFE_READ_DMI_64BIT,
|
||||
GET_MAX_CLK_RATE,
|
||||
GET_CLK_RATES,
|
||||
GET_ISP_ID,
|
||||
VFE_HW_UPDATE_LOCK,
|
||||
VFE_HW_UPDATE_UNLOCK,
|
||||
SET_WM_UB_SIZE,
|
||||
SET_UB_POLICY,
|
||||
};
|
||||
|
||||
struct msm_vfe_cfg_cmd2 {
|
||||
uint16_t num_cfg;
|
||||
uint16_t cmd_len;
|
||||
void __user *cfg_data;
|
||||
void __user *cfg_cmd;
|
||||
};
|
||||
|
||||
struct msm_vfe_cfg_cmd_list {
|
||||
struct msm_vfe_cfg_cmd2 cfg_cmd;
|
||||
struct msm_vfe_cfg_cmd_list *next;
|
||||
uint32_t next_size;
|
||||
};
|
||||
|
||||
struct msm_vfe_reg_rw_info {
|
||||
uint32_t reg_offset;
|
||||
uint32_t cmd_data_offset;
|
||||
uint32_t len;
|
||||
};
|
||||
|
||||
struct msm_vfe_reg_mask_info {
|
||||
uint32_t reg_offset;
|
||||
uint32_t mask;
|
||||
uint32_t val;
|
||||
};
|
||||
|
||||
struct msm_vfe_reg_dmi_info {
|
||||
uint32_t hi_tbl_offset; /*Optional*/
|
||||
uint32_t lo_tbl_offset; /*Required*/
|
||||
uint32_t len;
|
||||
};
|
||||
|
||||
struct msm_vfe_reg_cfg_cmd {
|
||||
union {
|
||||
struct msm_vfe_reg_rw_info rw_info;
|
||||
struct msm_vfe_reg_mask_info mask_info;
|
||||
struct msm_vfe_reg_dmi_info dmi_info;
|
||||
} u;
|
||||
|
||||
enum msm_vfe_reg_cfg_type cmd_type;
|
||||
};
|
||||
|
||||
enum vfe_sd_type {
|
||||
VFE_SD_0 = 0,
|
||||
VFE_SD_1,
|
||||
VFE_SD_COMMON,
|
||||
VFE_SD_MAX,
|
||||
};
|
||||
|
||||
/* When you change the value below, check for the sof event_data size.
|
||||
* V4l2 limits payload to 64 bytes */
|
||||
#define MS_NUM_SLAVE_MAX 1
|
||||
|
||||
/* Usecases when 2 HW need to be related or synced */
|
||||
enum msm_vfe_dual_hw_type {
|
||||
DUAL_NONE = 0,
|
||||
DUAL_HW_VFE_SPLIT = 1,
|
||||
DUAL_HW_MASTER_SLAVE = 2,
|
||||
};
|
||||
|
||||
/* Type for 2 INTF when used in Master-Slave mode */
|
||||
enum msm_vfe_dual_hw_ms_type {
|
||||
MS_TYPE_NONE,
|
||||
MS_TYPE_MASTER,
|
||||
MS_TYPE_SLAVE,
|
||||
};
|
||||
|
||||
struct msm_isp_set_dual_hw_ms_cmd {
|
||||
uint8_t num_src;
|
||||
/* Each session can be only one type but multiple intf if YUV cam */
|
||||
enum msm_vfe_dual_hw_ms_type dual_hw_ms_type;
|
||||
/* Primary intf is mostly associated with preview.
|
||||
* This primary intf SOF frame_id and timestamp is tracked
|
||||
* and used to calculate delta */
|
||||
enum msm_vfe_input_src primary_intf;
|
||||
/* input_src array indicates other input INTF that may be Master/Slave.
|
||||
* For these additional intf, frame_id and timestamp are not saved.
|
||||
* However, if these are slaves then they will still get their
|
||||
* frame_id from Master */
|
||||
enum msm_vfe_input_src input_src[VFE_SRC_MAX];
|
||||
uint32_t sof_delta_threshold; /* In milliseconds. Sent for Master */
|
||||
};
|
||||
|
||||
enum msm_isp_buf_type {
|
||||
ISP_PRIVATE_BUF,
|
||||
ISP_SHARE_BUF,
|
||||
MAX_ISP_BUF_TYPE,
|
||||
};
|
||||
|
||||
struct msm_isp_unmap_buf_req {
|
||||
uint32_t fd;
|
||||
};
|
||||
|
||||
struct msm_isp_buf_request {
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
uint8_t num_buf;
|
||||
uint32_t handle;
|
||||
enum msm_isp_buf_type buf_type;
|
||||
};
|
||||
|
||||
struct msm_isp_qbuf_plane {
|
||||
uint32_t addr;
|
||||
uint32_t offset;
|
||||
uint32_t length;
|
||||
};
|
||||
|
||||
struct msm_isp_qbuf_buffer {
|
||||
struct msm_isp_qbuf_plane planes[MAX_PLANES_PER_STREAM];
|
||||
uint32_t num_planes;
|
||||
};
|
||||
|
||||
struct msm_isp_qbuf_info {
|
||||
uint32_t handle;
|
||||
int32_t buf_idx;
|
||||
/*Only used for prepare buffer*/
|
||||
struct msm_isp_qbuf_buffer buffer;
|
||||
/*Only used for diverted buffer*/
|
||||
uint32_t dirty_buf;
|
||||
};
|
||||
|
||||
struct msm_isp_clk_rates {
|
||||
uint32_t svs_rate;
|
||||
uint32_t nominal_rate;
|
||||
uint32_t high_rate;
|
||||
};
|
||||
|
||||
struct msm_vfe_axi_src_state {
|
||||
enum msm_vfe_input_src input_src;
|
||||
uint32_t src_active;
|
||||
uint32_t src_frame_id;
|
||||
};
|
||||
|
||||
enum msm_isp_event_mask_index {
|
||||
ISP_EVENT_MASK_INDEX_STATS_NOTIFY = 0,
|
||||
ISP_EVENT_MASK_INDEX_ERROR = 1,
|
||||
ISP_EVENT_MASK_INDEX_IOMMU_P_FAULT = 2,
|
||||
ISP_EVENT_MASK_INDEX_STREAM_UPDATE_DONE = 3,
|
||||
ISP_EVENT_MASK_INDEX_REG_UPDATE = 4,
|
||||
ISP_EVENT_MASK_INDEX_SOF = 5,
|
||||
ISP_EVENT_MASK_INDEX_BUF_DIVERT = 6,
|
||||
ISP_EVENT_MASK_INDEX_COMP_STATS_NOTIFY = 7,
|
||||
ISP_EVENT_MASK_INDEX_MASK_FE_READ_DONE = 8,
|
||||
ISP_EVENT_MASK_INDEX_BUF_DONE = 9,
|
||||
ISP_EVENT_MASK_INDEX_REG_UPDATE_MISSING = 10,
|
||||
ISP_EVENT_MASK_INDEX_PING_PONG_MISMATCH = 11,
|
||||
ISP_EVENT_MASK_INDEX_BUF_FATAL_ERROR = 12,
|
||||
};
|
||||
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_NONE 0
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_STATS_NOTIFY \
|
||||
(1 << ISP_EVENT_MASK_INDEX_STATS_NOTIFY)
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_ERROR \
|
||||
(1 << ISP_EVENT_MASK_INDEX_ERROR)
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_IOMMU_P_FAULT \
|
||||
(1 << ISP_EVENT_MASK_INDEX_IOMMU_P_FAULT)
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_STREAM_UPDATE_DONE \
|
||||
(1 << ISP_EVENT_MASK_INDEX_STREAM_UPDATE_DONE)
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_REG_UPDATE \
|
||||
(1 << ISP_EVENT_MASK_INDEX_REG_UPDATE)
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_SOF \
|
||||
(1 << ISP_EVENT_MASK_INDEX_SOF)
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_BUF_DIVERT \
|
||||
(1 << ISP_EVENT_MASK_INDEX_BUF_DIVERT)
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_COMP_STATS_NOTIFY \
|
||||
(1 << ISP_EVENT_MASK_INDEX_COMP_STATS_NOTIFY)
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_FE_READ_DONE \
|
||||
(1 << ISP_EVENT_MASK_INDEX_MASK_FE_READ_DONE)
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_BUF_DONE \
|
||||
(1 << ISP_EVENT_MASK_INDEX_BUF_DONE)
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_REG_UPDATE_MISSING \
|
||||
(1 << ISP_EVENT_MASK_INDEX_REG_UPDATE_MISSING)
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_PING_PONG_MISMATCH \
|
||||
(1 << ISP_EVENT_MASK_INDEX_PING_PONG_MISMATCH)
|
||||
|
||||
#define ISP_EVENT_SUBS_MASK_BUF_FATAL_ERROR \
|
||||
(1 << ISP_EVENT_MASK_INDEX_BUF_FATAL_ERROR)
|
||||
|
||||
enum msm_isp_event_idx {
|
||||
ISP_REG_UPDATE = 0,
|
||||
ISP_EPOCH_0 = 1,
|
||||
ISP_EPOCH_1 = 2,
|
||||
ISP_START_ACK = 3,
|
||||
ISP_STOP_ACK = 4,
|
||||
ISP_IRQ_VIOLATION = 5,
|
||||
ISP_STATS_OVERFLOW = 6,
|
||||
ISP_BUF_DONE = 7,
|
||||
ISP_FE_RD_DONE = 8,
|
||||
ISP_IOMMU_P_FAULT = 9,
|
||||
ISP_ERROR = 10,
|
||||
ISP_HW_FATAL_ERROR = 11,
|
||||
ISP_PING_PONG_MISMATCH = 12,
|
||||
ISP_REG_UPDATE_MISSING = 13,
|
||||
ISP_BUF_FATAL_ERROR = 14,
|
||||
ISP_EVENT_MAX = 15
|
||||
};
|
||||
|
||||
#define ISP_EVENT_OFFSET 8
|
||||
#define ISP_EVENT_BASE (V4L2_EVENT_PRIVATE_START)
|
||||
#define ISP_BUF_EVENT_BASE (ISP_EVENT_BASE + (1 << ISP_EVENT_OFFSET))
|
||||
#define ISP_STATS_EVENT_BASE (ISP_EVENT_BASE + (2 << ISP_EVENT_OFFSET))
|
||||
#define ISP_CAMIF_EVENT_BASE (ISP_EVENT_BASE + (3 << ISP_EVENT_OFFSET))
|
||||
#define ISP_STREAM_EVENT_BASE (ISP_EVENT_BASE + (4 << ISP_EVENT_OFFSET))
|
||||
#define ISP_EVENT_REG_UPDATE (ISP_EVENT_BASE + ISP_REG_UPDATE)
|
||||
#define ISP_EVENT_EPOCH_0 (ISP_EVENT_BASE + ISP_EPOCH_0)
|
||||
#define ISP_EVENT_EPOCH_1 (ISP_EVENT_BASE + ISP_EPOCH_1)
|
||||
#define ISP_EVENT_START_ACK (ISP_EVENT_BASE + ISP_START_ACK)
|
||||
#define ISP_EVENT_STOP_ACK (ISP_EVENT_BASE + ISP_STOP_ACK)
|
||||
#define ISP_EVENT_IRQ_VIOLATION (ISP_EVENT_BASE + ISP_IRQ_VIOLATION)
|
||||
#define ISP_EVENT_STATS_OVERFLOW (ISP_EVENT_BASE + ISP_STATS_OVERFLOW)
|
||||
#define ISP_EVENT_ERROR (ISP_EVENT_BASE + ISP_ERROR)
|
||||
#define ISP_EVENT_SOF (ISP_CAMIF_EVENT_BASE)
|
||||
#define ISP_EVENT_EOF (ISP_CAMIF_EVENT_BASE + 1)
|
||||
#define ISP_EVENT_BUF_DONE (ISP_EVENT_BASE + ISP_BUF_DONE)
|
||||
#define ISP_EVENT_BUF_DIVERT (ISP_BUF_EVENT_BASE)
|
||||
#define ISP_EVENT_STATS_NOTIFY (ISP_STATS_EVENT_BASE)
|
||||
#define ISP_EVENT_COMP_STATS_NOTIFY (ISP_EVENT_STATS_NOTIFY + MSM_ISP_STATS_MAX)
|
||||
#define ISP_EVENT_FE_READ_DONE (ISP_EVENT_BASE + ISP_FE_RD_DONE)
|
||||
#define ISP_EVENT_IOMMU_P_FAULT (ISP_EVENT_BASE + ISP_IOMMU_P_FAULT)
|
||||
#define ISP_EVENT_HW_FATAL_ERROR (ISP_EVENT_BASE + ISP_HW_FATAL_ERROR)
|
||||
#define ISP_EVENT_PING_PONG_MISMATCH (ISP_EVENT_BASE + ISP_PING_PONG_MISMATCH)
|
||||
#define ISP_EVENT_REG_UPDATE_MISSING (ISP_EVENT_BASE + ISP_REG_UPDATE_MISSING)
|
||||
#define ISP_EVENT_BUF_FATAL_ERROR (ISP_EVENT_BASE + ISP_BUF_FATAL_ERROR)
|
||||
#define ISP_EVENT_STREAM_UPDATE_DONE (ISP_STREAM_EVENT_BASE)
|
||||
|
||||
/* The msm_v4l2_event_data structure should match the
|
||||
* v4l2_event.u.data field.
|
||||
* should not exceed 64 bytes */
|
||||
|
||||
struct msm_isp_buf_event {
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
uint32_t handle;
|
||||
uint32_t output_format;
|
||||
int8_t buf_idx;
|
||||
};
|
||||
struct msm_isp_fetch_eng_event {
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
uint32_t handle;
|
||||
uint32_t fd;
|
||||
int8_t buf_idx;
|
||||
int8_t offline_mode;
|
||||
};
|
||||
struct msm_isp_stats_event {
|
||||
uint32_t stats_mask; /* 4 bytes */
|
||||
uint8_t stats_buf_idxs[MSM_ISP_STATS_MAX]; /* 11 bytes */
|
||||
};
|
||||
|
||||
struct msm_isp_stream_ack {
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
uint32_t handle;
|
||||
};
|
||||
|
||||
enum msm_vfe_error_type {
|
||||
ISP_ERROR_NONE,
|
||||
ISP_ERROR_CAMIF,
|
||||
ISP_ERROR_BUS_OVERFLOW,
|
||||
ISP_ERROR_RETURN_EMPTY_BUFFER,
|
||||
ISP_ERROR_FRAME_ID_MISMATCH,
|
||||
ISP_ERROR_MAX,
|
||||
};
|
||||
|
||||
struct msm_isp_error_info {
|
||||
enum msm_vfe_error_type err_type;
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
uint32_t stream_id_mask;
|
||||
};
|
||||
|
||||
/* This structure reports delta between master and slave */
|
||||
struct msm_isp_ms_delta_info {
|
||||
uint8_t num_delta_info;
|
||||
uint32_t delta[MS_NUM_SLAVE_MAX];
|
||||
};
|
||||
|
||||
/* This is sent in EPOCH irq */
|
||||
struct msm_isp_output_info {
|
||||
uint8_t regs_not_updated;
|
||||
/* mask with bufq_handle for regs not updated or return empty */
|
||||
uint16_t output_err_mask;
|
||||
/* mask with stream_idx for get_buf failed */
|
||||
uint8_t stream_framedrop_mask;
|
||||
/* mask with stats stream_idx for get_buf failed */
|
||||
uint16_t stats_framedrop_mask;
|
||||
/* delta between master and slave */
|
||||
};
|
||||
|
||||
/* This structure is piggybacked with SOF event */
|
||||
struct msm_isp_sof_info {
|
||||
uint8_t regs_not_updated;
|
||||
/* mask with AXI_SRC for regs not updated */
|
||||
uint16_t reg_update_fail_mask;
|
||||
/* mask with bufq_handle for get_buf failed */
|
||||
uint32_t stream_get_buf_fail_mask;
|
||||
/* mask with stats stream_idx for get_buf failed */
|
||||
uint16_t stats_get_buf_fail_mask;
|
||||
/* delta between master and slave */
|
||||
struct msm_isp_ms_delta_info ms_delta_info;
|
||||
};
|
||||
|
||||
struct msm_isp_event_data {
|
||||
/*Wall clock except for buffer divert events
|
||||
*which use monotonic clock
|
||||
*/
|
||||
struct timeval timestamp;
|
||||
/* Monotonic timestamp since bootup */
|
||||
struct timeval mono_timestamp;
|
||||
uint32_t frame_id;
|
||||
union {
|
||||
/* Sent for Stats_Done event */
|
||||
struct msm_isp_stats_event stats;
|
||||
/* Sent for Buf_Divert event */
|
||||
struct msm_isp_buf_event buf_done;
|
||||
/* Sent for offline fetch done event */
|
||||
struct msm_isp_fetch_eng_event fetch_done;
|
||||
/* Sent for Error_Event */
|
||||
struct msm_isp_error_info error_info;
|
||||
/*
|
||||
* This struct needs to be removed once
|
||||
* userspace switches to sof_info
|
||||
*/
|
||||
struct msm_isp_output_info output_info;
|
||||
/* Sent for SOF event */
|
||||
struct msm_isp_sof_info sof_info;
|
||||
} u; /* union can have max 52 bytes */
|
||||
};
|
||||
|
||||
#define V4L2_PIX_FMT_QBGGR8 v4l2_fourcc('Q', 'B', 'G', '8')
|
||||
#define V4L2_PIX_FMT_QGBRG8 v4l2_fourcc('Q', 'G', 'B', '8')
|
||||
#define V4L2_PIX_FMT_QGRBG8 v4l2_fourcc('Q', 'G', 'R', '8')
|
||||
#define V4L2_PIX_FMT_QRGGB8 v4l2_fourcc('Q', 'R', 'G', '8')
|
||||
#define V4L2_PIX_FMT_QBGGR10 v4l2_fourcc('Q', 'B', 'G', '0')
|
||||
#define V4L2_PIX_FMT_QGBRG10 v4l2_fourcc('Q', 'G', 'B', '0')
|
||||
#define V4L2_PIX_FMT_QGRBG10 v4l2_fourcc('Q', 'G', 'R', '0')
|
||||
#define V4L2_PIX_FMT_QRGGB10 v4l2_fourcc('Q', 'R', 'G', '0')
|
||||
#define V4L2_PIX_FMT_QBGGR12 v4l2_fourcc('Q', 'B', 'G', '2')
|
||||
#define V4L2_PIX_FMT_QGBRG12 v4l2_fourcc('Q', 'G', 'B', '2')
|
||||
#define V4L2_PIX_FMT_QGRBG12 v4l2_fourcc('Q', 'G', 'R', '2')
|
||||
#define V4L2_PIX_FMT_QRGGB12 v4l2_fourcc('Q', 'R', 'G', '2')
|
||||
#define V4L2_PIX_FMT_QBGGR14 v4l2_fourcc('Q', 'B', 'G', '4')
|
||||
#define V4L2_PIX_FMT_QGBRG14 v4l2_fourcc('Q', 'G', 'B', '4')
|
||||
#define V4L2_PIX_FMT_QGRBG14 v4l2_fourcc('Q', 'G', 'R', '4')
|
||||
#define V4L2_PIX_FMT_QRGGB14 v4l2_fourcc('Q', 'R', 'G', '4')
|
||||
#define V4L2_PIX_FMT_P16BGGR10 v4l2_fourcc('P', 'B', 'G', '0')
|
||||
#define V4L2_PIX_FMT_P16GBRG10 v4l2_fourcc('P', 'G', 'B', '0')
|
||||
#define V4L2_PIX_FMT_P16GRBG10 v4l2_fourcc('P', 'G', 'R', '0')
|
||||
#define V4L2_PIX_FMT_P16RGGB10 v4l2_fourcc('P', 'R', 'G', '0')
|
||||
#define V4L2_PIX_FMT_NV14 v4l2_fourcc('N', 'V', '1', '4')
|
||||
#define V4L2_PIX_FMT_NV41 v4l2_fourcc('N', 'V', '4', '1')
|
||||
#define V4L2_PIX_FMT_META v4l2_fourcc('Q', 'M', 'E', 'T')
|
||||
#define V4L2_PIX_FMT_SBGGR14 v4l2_fourcc('B', 'G', '1', '4') /* 14 BGBG.GRGR.*/
|
||||
#define V4L2_PIX_FMT_SGBRG14 v4l2_fourcc('G', 'B', '1', '4') /* 14 GBGB.RGRG.*/
|
||||
#define V4L2_PIX_FMT_SGRBG14 v4l2_fourcc('B', 'A', '1', '4') /* 14 GRGR.BGBG.*/
|
||||
#define V4L2_PIX_FMT_SRGGB14 v4l2_fourcc('R', 'G', '1', '4') /* 14 RGRG.GBGB.*/
|
||||
|
||||
#define VIDIOC_MSM_VFE_REG_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_vfe_cfg_cmd2)
|
||||
|
||||
#define VIDIOC_MSM_ISP_REQUEST_BUF \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+1, struct msm_isp_buf_request)
|
||||
|
||||
#define VIDIOC_MSM_ISP_ENQUEUE_BUF \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+2, struct msm_isp_qbuf_info)
|
||||
|
||||
#define VIDIOC_MSM_ISP_RELEASE_BUF \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+3, struct msm_isp_buf_request)
|
||||
|
||||
#define VIDIOC_MSM_ISP_REQUEST_STREAM \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+4, struct msm_vfe_axi_stream_request_cmd)
|
||||
|
||||
#define VIDIOC_MSM_ISP_CFG_STREAM \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+5, struct msm_vfe_axi_stream_cfg_cmd)
|
||||
|
||||
#define VIDIOC_MSM_ISP_RELEASE_STREAM \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+6, struct msm_vfe_axi_stream_release_cmd)
|
||||
|
||||
#define VIDIOC_MSM_ISP_INPUT_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+7, struct msm_vfe_input_cfg)
|
||||
|
||||
#define VIDIOC_MSM_ISP_SET_SRC_STATE \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+8, struct msm_vfe_axi_src_state)
|
||||
|
||||
#define VIDIOC_MSM_ISP_REQUEST_STATS_STREAM \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+9, \
|
||||
struct msm_vfe_stats_stream_request_cmd)
|
||||
|
||||
#define VIDIOC_MSM_ISP_CFG_STATS_STREAM \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+10, struct msm_vfe_stats_stream_cfg_cmd)
|
||||
|
||||
#define VIDIOC_MSM_ISP_RELEASE_STATS_STREAM \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+11, \
|
||||
struct msm_vfe_stats_stream_release_cmd)
|
||||
|
||||
#define VIDIOC_MSM_ISP_REG_UPDATE_CMD \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+12, enum msm_vfe_input_src)
|
||||
|
||||
#define VIDIOC_MSM_ISP_UPDATE_STREAM \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+13, struct msm_vfe_axi_stream_update_cmd)
|
||||
|
||||
#define VIDIOC_MSM_VFE_REG_LIST_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+14, struct msm_vfe_cfg_cmd_list)
|
||||
|
||||
#define VIDIOC_MSM_ISP_SMMU_ATTACH \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+15, struct msm_vfe_smmu_attach_cmd)
|
||||
|
||||
#define VIDIOC_MSM_ISP_UPDATE_STATS_STREAM \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+16, struct msm_vfe_axi_stream_update_cmd)
|
||||
|
||||
#define VIDIOC_MSM_ISP_AXI_HALT \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+17, struct msm_vfe_axi_halt_cmd)
|
||||
|
||||
#define VIDIOC_MSM_ISP_AXI_RESET \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+18, struct msm_vfe_axi_reset_cmd)
|
||||
|
||||
#define VIDIOC_MSM_ISP_AXI_RESTART \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+19, struct msm_vfe_axi_restart_cmd)
|
||||
|
||||
#define VIDIOC_MSM_ISP_FETCH_ENG_START \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+20, struct msm_vfe_fetch_eng_start)
|
||||
|
||||
#define VIDIOC_MSM_ISP_DEQUEUE_BUF \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+21, struct msm_isp_qbuf_info)
|
||||
|
||||
#define VIDIOC_MSM_ISP_SET_DUAL_HW_MASTER_SLAVE \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+22, struct msm_isp_set_dual_hw_ms_cmd)
|
||||
|
||||
#define VIDIOC_MSM_ISP_MAP_BUF_START_FE \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+23, struct msm_vfe_fetch_eng_start)
|
||||
|
||||
#define VIDIOC_MSM_ISP_UNMAP_BUF \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE+24, struct msm_isp_unmap_buf_req)
|
||||
|
||||
#endif /* __MSMB_ISP__ */
|
||||
|
|
@ -1,5 +1,9 @@
|
|||
#ifndef MSM_CAM_ISPIF_H
|
||||
#define MSM_CAM_ISPIF_H
|
||||
#ifndef UAPI_MSMB_ISPIF_H
|
||||
#define UAPI_MSMB_ISPIF_H
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/ioctl.h>
|
||||
#include <linux/videodev2.h>
|
||||
|
||||
#define CSID_VERSION_V20 0x02000011
|
||||
#define CSID_VERSION_V22 0x02001000
|
||||
|
|
@ -122,4 +126,5 @@ struct ispif_cfg_data {
|
|||
#define VIDIOC_MSM_ISPIF_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE, struct ispif_cfg_data)
|
||||
|
||||
#endif /* MSM_CAM_ISPIF_H */
|
||||
#endif
|
||||
|
||||
254
include/uapi/media/msmb_pproc.h
Normal file
254
include/uapi/media/msmb_pproc.h
Normal file
|
|
@ -0,0 +1,254 @@
|
|||
#ifndef __UAPI_MSMB_PPROC_H
|
||||
#define __UAPI_MSMB_PPROC_H
|
||||
|
||||
#include <linux/videodev2.h>
|
||||
#include <linux/types.h>
|
||||
#include <media/msmb_generic_buf_mgr.h>
|
||||
|
||||
/* Should be same as VIDEO_MAX_PLANES in videodev2.h */
|
||||
#define MAX_PLANES VIDEO_MAX_PLANES
|
||||
/* PARTIAL_FRAME_STRIPE_COUNT must be even */
|
||||
#define PARTIAL_FRAME_STRIPE_COUNT 4
|
||||
|
||||
#define MAX_NUM_CPP_STRIPS 8
|
||||
#define MSM_CPP_MAX_NUM_PLANES 3
|
||||
#define MSM_CPP_MIN_FRAME_LENGTH 13
|
||||
#define MSM_CPP_MAX_FRAME_LENGTH 4096
|
||||
#define MSM_CPP_MAX_FW_NAME_LEN 32
|
||||
#define MAX_FREQ_TBL 10
|
||||
|
||||
enum msm_cpp_frame_type {
|
||||
MSM_CPP_OFFLINE_FRAME,
|
||||
MSM_CPP_REALTIME_FRAME,
|
||||
};
|
||||
|
||||
enum msm_vpe_frame_type {
|
||||
MSM_VPE_OFFLINE_FRAME,
|
||||
MSM_VPE_REALTIME_FRAME,
|
||||
};
|
||||
|
||||
struct msm_cpp_buffer_info_t {
|
||||
int32_t fd;
|
||||
uint32_t index;
|
||||
uint32_t offset;
|
||||
uint8_t native_buff;
|
||||
uint8_t processed_divert;
|
||||
uint32_t identity;
|
||||
};
|
||||
|
||||
struct msm_cpp_stream_buff_info_t {
|
||||
uint32_t identity;
|
||||
uint32_t num_buffs;
|
||||
struct msm_cpp_buffer_info_t *buffer_info;
|
||||
};
|
||||
|
||||
enum msm_cpp_batch_mode_t {
|
||||
BATCH_MODE_NONE,
|
||||
BATCH_MODE_VIDEO,
|
||||
BATCH_MODE_PREVIEW
|
||||
};
|
||||
|
||||
struct msm_cpp_batch_info_t {
|
||||
enum msm_cpp_batch_mode_t batch_mode;
|
||||
uint32_t batch_size;
|
||||
uint32_t intra_plane_offset[MAX_PLANES];
|
||||
uint32_t pick_preview_idx;
|
||||
uint32_t cont_idx;
|
||||
};
|
||||
|
||||
struct msm_cpp_frame_info_t {
|
||||
int32_t frame_id;
|
||||
struct timeval timestamp;
|
||||
uint32_t inst_id;
|
||||
uint32_t identity;
|
||||
uint32_t client_id;
|
||||
enum msm_cpp_frame_type frame_type;
|
||||
uint32_t num_strips;
|
||||
uint32_t msg_len;
|
||||
uint32_t *cpp_cmd_msg;
|
||||
int src_fd;
|
||||
int dst_fd;
|
||||
struct timeval in_time, out_time;
|
||||
void __user *cookie;
|
||||
int32_t *status;
|
||||
int32_t duplicate_output;
|
||||
uint32_t duplicate_identity;
|
||||
uint32_t feature_mask;
|
||||
uint8_t we_disable;
|
||||
struct msm_cpp_buffer_info_t input_buffer_info;
|
||||
struct msm_cpp_buffer_info_t output_buffer_info[8];
|
||||
struct msm_cpp_buffer_info_t duplicate_buffer_info;
|
||||
struct msm_cpp_buffer_info_t tnr_scratch_buffer_info[2];
|
||||
uint32_t reserved;
|
||||
uint8_t partial_frame_indicator;
|
||||
/* the followings are used only for partial_frame type
|
||||
* and is only used for offline frame processing and
|
||||
* only if payload big enough and need to be split into partial_frame
|
||||
* if first_payload, kernel acquires output buffer
|
||||
* first payload must have the last stripe
|
||||
* buffer addresses from 0 to last_stripe_index are updated.
|
||||
* kernel updates payload with msg_len and stripe_info
|
||||
* kernel sends top level, plane level, then only stripes
|
||||
* starting with first_stripe_index and
|
||||
* ends with last_stripe_index
|
||||
* kernel then sends trailing flag at frame done,
|
||||
* if last payload, kernel queues the output buffer to HAL
|
||||
*/
|
||||
uint8_t first_payload;
|
||||
uint8_t last_payload;
|
||||
uint32_t first_stripe_index;
|
||||
uint32_t last_stripe_index;
|
||||
uint32_t stripe_info_offset;
|
||||
uint32_t stripe_info;
|
||||
struct msm_cpp_batch_info_t batch_info;
|
||||
};
|
||||
|
||||
struct msm_cpp_pop_stream_info_t {
|
||||
int32_t frame_id;
|
||||
uint32_t identity;
|
||||
};
|
||||
|
||||
struct cpp_hw_info {
|
||||
uint32_t cpp_hw_version;
|
||||
uint32_t cpp_hw_caps;
|
||||
unsigned long freq_tbl[MAX_FREQ_TBL];
|
||||
uint32_t freq_tbl_count;
|
||||
};
|
||||
|
||||
struct msm_vpe_frame_strip_info {
|
||||
uint32_t src_w;
|
||||
uint32_t src_h;
|
||||
uint32_t dst_w;
|
||||
uint32_t dst_h;
|
||||
uint32_t src_x;
|
||||
uint32_t src_y;
|
||||
uint32_t phase_step_x;
|
||||
uint32_t phase_step_y;
|
||||
uint32_t phase_init_x;
|
||||
uint32_t phase_init_y;
|
||||
};
|
||||
|
||||
struct msm_vpe_buffer_info_t {
|
||||
int32_t fd;
|
||||
uint32_t index;
|
||||
uint32_t offset;
|
||||
uint8_t native_buff;
|
||||
uint8_t processed_divert;
|
||||
};
|
||||
|
||||
struct msm_vpe_stream_buff_info_t {
|
||||
uint32_t identity;
|
||||
uint32_t num_buffs;
|
||||
struct msm_vpe_buffer_info_t *buffer_info;
|
||||
};
|
||||
|
||||
struct msm_vpe_frame_info_t {
|
||||
int32_t frame_id;
|
||||
struct timeval timestamp;
|
||||
uint32_t inst_id;
|
||||
uint32_t identity;
|
||||
uint32_t client_id;
|
||||
enum msm_vpe_frame_type frame_type;
|
||||
struct msm_vpe_frame_strip_info strip_info;
|
||||
unsigned long src_fd;
|
||||
unsigned long dst_fd;
|
||||
struct ion_handle *src_ion_handle;
|
||||
struct ion_handle *dest_ion_handle;
|
||||
unsigned long src_phyaddr;
|
||||
unsigned long dest_phyaddr;
|
||||
unsigned long src_chroma_plane_offset;
|
||||
unsigned long dest_chroma_plane_offset;
|
||||
struct timeval in_time, out_time;
|
||||
void *cookie;
|
||||
|
||||
struct msm_vpe_buffer_info_t input_buffer_info;
|
||||
struct msm_vpe_buffer_info_t output_buffer_info;
|
||||
};
|
||||
|
||||
struct msm_pproc_queue_buf_info {
|
||||
struct msm_buf_mngr_info buff_mgr_info;
|
||||
uint8_t is_buf_dirty;
|
||||
};
|
||||
|
||||
struct msm_cpp_clock_settings_t {
|
||||
unsigned long clock_rate;
|
||||
uint64_t avg;
|
||||
uint64_t inst;
|
||||
};
|
||||
|
||||
#define VIDIOC_MSM_CPP_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_GET_EVENTPAYLOAD \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_GET_INST_INFO \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_LOAD_FIRMWARE \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_GET_HW_INFO \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_FLUSH_QUEUE \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_ENQUEUE_STREAM_BUFF_INFO \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_DEQUEUE_STREAM_BUFF_INFO \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_VPE_CFG \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_VPE_TRANSACTION_SETUP \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 9, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_VPE_GET_EVENTPAYLOAD \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 10, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_VPE_GET_INST_INFO \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 11, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_VPE_ENQUEUE_STREAM_BUFF_INFO \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 12, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_VPE_DEQUEUE_STREAM_BUFF_INFO \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 13, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_QUEUE_BUF \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 14, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_APPEND_STREAM_BUFF_INFO \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 15, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_SET_CLOCK \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 16, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_POP_STREAM_BUFFER \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 17, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_IOMMU_ATTACH \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 18, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_IOMMU_DETACH \
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 19, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
#define VIDIOC_MSM_CPP_DELETE_STREAM_BUFF\
|
||||
_IOWR('V', BASE_VIDIOC_PRIVATE + 20, struct msm_camera_v4l2_ioctl_t)
|
||||
|
||||
|
||||
#define V4L2_EVENT_CPP_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 0)
|
||||
#define V4L2_EVENT_VPE_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 1)
|
||||
|
||||
struct msm_camera_v4l2_ioctl_t {
|
||||
uint32_t id;
|
||||
size_t len;
|
||||
int32_t trans_code;
|
||||
void __user *ioctl_ptr;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
Loading…
Add table
Reference in a new issue