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mdss: hdmi: update qfprom offsets

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QFPROM offsets have changed on targets with
new HDMI core. Check for the version and
update the offsets respectively.

Change-Id: Ie017571c9291a060c5911b4ba3bc5399d2317c01
Signed-off-by: Casey Piper <cpiper@codeaurora.org>
This commit is contained in:
Casey Piper 2015-03-03 16:06:10 -08:00 • committed by David Keitel
parent 0d82ce80de
commit 54528ec56c
3 changed files with 35 additions and 18 deletions
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15
drivers/video/fbdev/msm/mdss_hdmi_hdcp.c
View file

@ -281,10 +281,17 @@ static int hdmi_hdcp_authentication_part1(struct hdmi_hdcp_ctrl *hdcp_ctrl)
io = hdcp_ctrl->init_data.core_io;
/* Fetch aksv from QFPROM, this info should be public. */
qfprom_aksv_lsb = DSS_REG_R(hdcp_ctrl->init_data.qfprom_io,
HDCP_KSV_LSB);
qfprom_aksv_msb = DSS_REG_R(hdcp_ctrl->init_data.qfprom_io,
HDCP_KSV_MSB);
if (hdcp_ctrl->init_data.hdmi_tx_ver < HDMI_TX_VERSION_4) {
qfprom_aksv_lsb = DSS_REG_R(hdcp_ctrl->init_data.qfprom_io,
HDCP_KSV_LSB);
qfprom_aksv_msb = DSS_REG_R(hdcp_ctrl->init_data.qfprom_io,
HDCP_KSV_MSB);
} else {
qfprom_aksv_lsb = DSS_REG_R(hdcp_ctrl->init_data.qfprom_io,
HDCP_KSV_LSB + HDCP_KSV_VERSION_4);
qfprom_aksv_msb = DSS_REG_R(hdcp_ctrl->init_data.qfprom_io,
HDCP_KSV_MSB + HDCP_KSV_VERSION_4);
}
aksv[0] = qfprom_aksv_lsb & 0xFF;
aksv[1] = (qfprom_aksv_lsb >> 8) & 0xFF;

32
drivers/video/fbdev/msm/mdss_hdmi_tx.c
View file

@ -80,9 +80,6 @@
#define HDMI_TX_3_MAX_PCLK_RATE 297000
#define HDMI_TX_4_MAX_PCLK_RATE 600000
#define HDMI_TX_VERSION_4 4
#define HDMI_TX_VERSION_3 3
/* Enable HDCP by default */
static bool hdcp_feature_on = true;
@ -1400,7 +1397,7 @@ static void hdmi_tx_hpd_int_work(struct work_struct *work)
static int hdmi_tx_check_capability(struct hdmi_tx_ctrl *hdmi_ctrl)
{
u32 hdmi_disabled, hdcp_disabled;
u32 hdmi_disabled, hdcp_disabled, reg_val;
struct dss_io_data *io = NULL;
if (!hdmi_ctrl) {
@ -1414,11 +1411,18 @@ static int hdmi_tx_check_capability(struct hdmi_tx_ctrl *hdmi_ctrl)
return -EINVAL;
}
hdcp_disabled = DSS_REG_R_ND(io,
QFPROM_RAW_FEAT_CONFIG_ROW0_LSB) & BIT(31);
if (hdmi_ctrl->hdmi_tx_ver < HDMI_TX_VERSION_4) {
hdcp_disabled = DSS_REG_R_ND(io,
QFPROM_RAW_FEAT_CONFIG_ROW0_LSB) & BIT(31);
hdmi_disabled = DSS_REG_R_ND(io,
QFPROM_RAW_FEAT_CONFIG_ROW0_MSB) & BIT(0);
hdmi_disabled = DSS_REG_R_ND(io,
QFPROM_RAW_FEAT_CONFIG_ROW0_MSB) & BIT(0);
} else {
reg_val = DSS_REG_R_ND(io,
QFPROM_RAW_FEAT_CONFIG_ROW0_LSB + QFPROM_RAW_VERSION_4);
hdcp_disabled = reg_val & BIT(12);
hdmi_disabled = reg_val & BIT(13);
}
DEV_DBG("%s: Features <HDMI:%s, HDCP:%s>\n", __func__,
hdmi_disabled ? "OFF" : "ON", hdcp_disabled ? "OFF" : "ON");
@ -4468,12 +4472,6 @@ static int hdmi_tx_probe(struct platform_device *pdev)
goto failed_res_init;
}
rc = hdmi_tx_dev_init(hdmi_ctrl);
if (rc) {
DEV_ERR("%s: FAILED: hdmi_tx_dev_init. rc=%d\n", __func__, rc);
goto failed_dev_init;
}
rc = hdmi_tx_get_version(hdmi_ctrl);
if (rc) {
DEV_ERR("%s: FAILED: hdmi_tx_get_version. rc=%d\n",
@ -4481,6 +4479,12 @@ static int hdmi_tx_probe(struct platform_device *pdev)
goto failed_reg_panel;
}
rc = hdmi_tx_dev_init(hdmi_ctrl);
if (rc) {
DEV_ERR("%s: FAILED: hdmi_tx_dev_init. rc=%d\n", __func__, rc);
goto failed_dev_init;
}
rc = hdmi_tx_register_panel(hdmi_ctrl);
if (rc) {
DEV_ERR("%s: FAILED: register_panel. rc=%d\n", __func__, rc);

6
drivers/video/fbdev/msm/mdss_hdmi_util.h
View file

@ -242,8 +242,10 @@
/* QFPROM Registers for HDMI/HDCP */
#define QFPROM_RAW_FEAT_CONFIG_ROW0_LSB (0x000000F8)
#define QFPROM_RAW_FEAT_CONFIG_ROW0_MSB (0x000000FC)
#define QFPROM_RAW_VERSION_4 (0x000000A8)
#define HDCP_KSV_LSB (0x000060D8)
#define HDCP_KSV_MSB (0x000060DC)
#define HDCP_KSV_VERSION_4 (0x00000014)
#define TOP_AND_BOTTOM 0x10
#define FRAME_PACKING 0x20
@ -255,6 +257,10 @@
/* TX major version that supports scrambling */
#define HDMI_TX_SCRAMBLER_MIN_TX_VERSION 0x04
/* TX major versions */
#define HDMI_TX_VERSION_4 4
#define HDMI_TX_VERSION_3 3
/* HDMI SCDC register offsets */
#define HDMI_SCDC_UPDATE_0 0x10
#define HDMI_SCDC_UPDATE_1 0x11