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cnss2: cnss api update for genoa pcie

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cnss api update for genoa pcie to pass the memory information for
read index update.

Change-Id: Ic6a96bef1dfacdc78bc127cc2570e148e9cd4baf
CRs-fixed: 2272072
Signed-off-by: Jayachandran Sreekumaran <jsreekum@codeaurora.org>
This commit is contained in:
Jayachandran Sreekumaran 2018-07-03 14:11:54 +05:30
parent 11ee621aea
commit 54f161d263
1 changed files with 7 additions and 0 deletions
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7
include/net/cnss2.h
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@ -115,6 +115,11 @@ struct cnss_shadow_reg_v2_cfg {
u32 addr;
};
struct cnss_rri_over_ddr_cfg {
u32 base_addr_low;
u32 base_addr_high;
};
struct cnss_wlan_enable_cfg {
u32 num_ce_tgt_cfg;
struct cnss_ce_tgt_pipe_cfg *ce_tgt_cfg;
@ -124,6 +129,8 @@ struct cnss_wlan_enable_cfg {
struct cnss_shadow_reg_cfg *shadow_reg_cfg;
u32 num_shadow_reg_v2_cfg;
struct cnss_shadow_reg_v2_cfg *shadow_reg_v2_cfg;
bool rri_over_ddr_cfg_valid;
struct cnss_rri_over_ddr_cfg rri_over_ddr_cfg;
};
enum cnss_driver_mode {