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ARM: at91/pm: rename function name: at91_slow_clock() --> at91_pm_suspend_sram_fn()

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As the file name is renamed, rename the function name at91_slow_clock()
--> at91_pm_suspend_sram_fn(), rename the function handler's name at the
same time.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Tested-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
[nicolas.ferre@atmel.com: little update of the commit message]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This commit is contained in:
Wenyou Yang 2015-03-09 11:51:09 +08:00 • committed by Nicolas Ferre
parent 828b98fa38
commit 5726a8b968
2 changed files with 25 additions and 28 deletions
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25
arch/arm/mach-at91/pm.c
View file

@ -120,13 +120,12 @@ int at91_suspend_entering_slow_clock(void)
} }
EXPORT_SYMBOL(at91_suspend_entering_slow_clock); EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
static void (*at91_suspend_sram_fn)(void __iomem *pmc, void __iomem *ramc0,
static void (*slow_clock)(void __iomem *pmc, void __iomem *ramc0,
void __iomem *ramc1, int memctrl); void __iomem *ramc1, int memctrl);
extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0, extern void at91_pm_suspend_in_sram(void __iomem *pmc, void __iomem *ramc0,
void __iomem *ramc1, int memctrl); void __iomem *ramc1, int memctrl);
extern u32 at91_slow_clock_sz; extern u32 at91_pm_suspend_in_sram_sz;
static void at91_pm_suspend(suspend_state_t state) static void at91_pm_suspend(suspend_state_t state)
{ {
@ -135,7 +134,7 @@ static void at91_pm_suspend(suspend_state_t state)
pm_data |= (state == PM_SUSPEND_MEM) ? pm_data |= (state == PM_SUSPEND_MEM) ?
AT91_PM_MODE(AT91_PM_SLOW_CLOCK) : 0; AT91_PM_MODE(AT91_PM_SLOW_CLOCK) : 0;
slow_clock(at91_pmc_base, at91_ramc_base[0], at91_suspend_sram_fn(at91_pmc_base, at91_ramc_base[0],
at91_ramc_base[1], pm_data); at91_ramc_base[1], pm_data);
} }
@ -278,21 +277,23 @@ static void __init at91_pm_sram_init(void)
return; return;
} }
sram_base = gen_pool_alloc(sram_pool, at91_slow_clock_sz); sram_base = gen_pool_alloc(sram_pool, at91_pm_suspend_in_sram_sz);
if (!sram_base) { if (!sram_base) {
pr_warn("%s: unable to alloc ocram!\n", __func__); pr_warn("%s: unable to alloc sram!\n", __func__);
return; return;
} }
sram_pbase = gen_pool_virt_to_phys(sram_pool, sram_base); sram_pbase = gen_pool_virt_to_phys(sram_pool, sram_base);
slow_clock = __arm_ioremap_exec(sram_pbase, at91_slow_clock_sz, false); at91_suspend_sram_fn = __arm_ioremap_exec(sram_pbase,
if (!slow_clock) { at91_pm_suspend_in_sram_sz, false);
if (!at91_suspend_sram_fn) {
pr_warn("SRAM: Could not map\n"); pr_warn("SRAM: Could not map\n");
return; return;
} }
/* Copy the slow_clock handler to SRAM */ /* Copy the pm suspend handler to SRAM */
slow_clock = fncpy(slow_clock, &at91_slow_clock, at91_slow_clock_sz); at91_suspend_sram_fn = fncpy(at91_suspend_sram_fn,
&at91_pm_suspend_in_sram, at91_pm_suspend_in_sram_sz);
} }
static void __init at91_pm_init(void) static void __init at91_pm_init(void)
@ -302,7 +303,7 @@ static void __init at91_pm_init(void)
if (at91_cpuidle_device.dev.platform_data) if (at91_cpuidle_device.dev.platform_data)
platform_device_register(&at91_cpuidle_device); platform_device_register(&at91_cpuidle_device);
if (slow_clock) if (at91_suspend_sram_fn)
suspend_set_ops(&at91_pm_ops); suspend_set_ops(&at91_pm_ops);
else else
pr_info("AT91: PM not supported, due to no SRAM allocated\n"); pr_info("AT91: PM not supported, due to no SRAM allocated\n");

26
arch/arm/mach-at91/pm_suspend.S
View file

@ -55,23 +55,19 @@ tmp2 .req r5
.arm .arm
/* void at91_slow_clock(void __iomem *pmc, void __iomem *sdramc, /*
* void at91_pm_suspend_in_sram(void __iomem *pmc, void __iomem *sdramc,
* void __iomem *ramc1, int memctrl) * void __iomem *ramc1, int memctrl)
* @input param:
* @r0: base address of AT91_PMC
* @r1: base address of SDRAM Controller (SDRAM, DDRSDR, or AT91_SYS)
* @r2: base address of second SDRAM Controller or 0 if not present
* @r3: pm information
*/ */
ENTRY(at91_slow_clock) ENTRY(at91_pm_suspend_in_sram)
/* Save registers on stack */ /* Save registers on stack */
stmfd sp!, {r4 - r12, lr} stmfd sp!, {r4 - r12, lr}
/*
* Register usage:
* R0 = Base address of AT91_PMC
* R1 = Base address of RAM Controller (SDRAM, DDRSDR, or AT91_SYS)
* R2 = Base address of second RAM Controller or 0 if not present
* R3 = Memory controller
* R4 = temporary register
* R5 = temporary register
*/
/* Drain write buffer */ /* Drain write buffer */
mov tmp1, #0 mov tmp1, #0
mcr p15, 0, tmp1, c7, c10, 4 mcr p15, 0, tmp1, c7, c10, 4
@ -170,7 +166,7 @@ skip_enable_main_clock:
/* Restore registers, and return */ /* Restore registers, and return */
ldmfd sp!, {r4 - r12, pc} ldmfd sp!, {r4 - r12, pc}
ENDPROC(at91_slow_clock) ENDPROC(at91_pm_suspend_in_sram)
/* /*
* void at91_sramc_self_refresh(unsigned int is_active) * void at91_sramc_self_refresh(unsigned int is_active)
@ -320,5 +316,5 @@ ENDPROC(at91_sramc_self_refresh)
.saved_sam9_mdr1: .saved_sam9_mdr1:
.word 0 .word 0
ENTRY(at91_slow_clock_sz) ENTRY(at91_pm_suspend_in_sram_sz)
.word .-at91_slow_clock .word .-at91_pm_suspend_in_sram