irqchip: versatile-fpga: add support for arm,versatile-sic
The secondary controller on ARM Versatile AB and PB is similar to other ARM platforms, but has a pass-thru register to connect some interrupts directly to interrupt inputs on the primary interrupt controller. The PIC_ENABLES register needs to be configured for proper operation when the matching node is arm,versatile-sic. Add the the necessary IRQCHIP_DECLARE as well. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Arnd Bergmann <arnd@arndb.de> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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@ -28,6 +28,8 @@
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#define FIQ_ENABLE_SET 0x28
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#define FIQ_ENABLE_SET 0x28
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#define FIQ_ENABLE_CLEAR 0x2C
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#define FIQ_ENABLE_CLEAR 0x2C
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#define PIC_ENABLES 0x20 /* set interrupt pass through bits */
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/**
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/**
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* struct fpga_irq_data - irq data container for the FPGA IRQ controller
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* struct fpga_irq_data - irq data container for the FPGA IRQ controller
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* @base: memory offset in virtual memory
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* @base: memory offset in virtual memory
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@ -213,7 +215,16 @@ int __init fpga_irq_of_init(struct device_node *node,
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writel(clear_mask, base + IRQ_ENABLE_CLEAR);
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writel(clear_mask, base + IRQ_ENABLE_CLEAR);
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writel(clear_mask, base + FIQ_ENABLE_CLEAR);
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writel(clear_mask, base + FIQ_ENABLE_CLEAR);
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/*
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* On Versatile AB/PB, some secondary interrupts have a direct
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* pass-thru to the primary controller for IRQs 20 and 22-31 which need
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* to be enabled. See section 3.10 of the Versatile AB user guide.
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*/
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if (of_device_is_compatible(node, "arm,versatile-sic"))
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writel(0xffd00000, base + PIC_ENABLES);
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return 0;
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return 0;
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}
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}
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IRQCHIP_DECLARE(arm_fpga, "arm,versatile-fpga-irq", fpga_irq_of_init);
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IRQCHIP_DECLARE(arm_fpga, "arm,versatile-fpga-irq", fpga_irq_of_init);
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IRQCHIP_DECLARE(arm_fpga_sic, "arm,versatile-sic", fpga_irq_of_init);
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#endif
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#endif
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