[PATCH] ARM: 2745/1: Fix IXP4xx debug macros
Patch from Deepak Saxena Current IXP4xx debug macros do not work in the small window between the MMU being enabled and the call to map_io() b/c the standard peripheral mapping is not properly setup for use with the low-level debug code. This patch creates a new section-aligned mapping for the UART specifically for use with the debug macros. Signed-off-by: Deepak Saxena Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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3 changed files with 19 additions and 0 deletions
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@ -141,7 +141,15 @@ static struct map_desc ixp4xx_io_desc[] __initdata = {
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.physical = IXP4XX_PCI_CFG_BASE_PHYS,
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.physical = IXP4XX_PCI_CFG_BASE_PHYS,
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.length = IXP4XX_PCI_CFG_REGION_SIZE,
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.length = IXP4XX_PCI_CFG_REGION_SIZE,
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.type = MT_DEVICE
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.type = MT_DEVICE
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},
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#ifdef CONFIG_DEBUG_LL
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{ /* Debug UART mapping */
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.virtual = IXP4XX_DEBUG_UART_BASE_VIRT,
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.physical = IXP4XX_DEBUG_UART_BASE_PHYS,
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.length = IXP4XX_DEBUG_UART_REGION_SIZE,
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.type = MT_DEVICE
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}
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}
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#endif
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};
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};
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void __init ixp4xx_map_io(void)
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void __init ixp4xx_map_io(void)
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@ -14,6 +14,7 @@
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mrc p15, 0, \rx, c1, c0
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1 @ MMU enabled?
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tst \rx, #1 @ MMU enabled?
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moveq \rx, #0xc8000000
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moveq \rx, #0xc8000000
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orrne \rx, \rx, #0x00b00000
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movne \rx, #0xff000000
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movne \rx, #0xff000000
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add \rx,\rx,#3 @ Uart regs are at off set of 3 if
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add \rx,\rx,#3 @ Uart regs are at off set of 3 if
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@ byte writes used - Big Endian.
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@ byte writes used - Big Endian.
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@ -69,6 +69,16 @@
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#define IXP4XX_PERIPHERAL_BASE_VIRT (0xFFBF2000)
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#define IXP4XX_PERIPHERAL_BASE_VIRT (0xFFBF2000)
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#define IXP4XX_PERIPHERAL_REGION_SIZE (0x0000C000)
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#define IXP4XX_PERIPHERAL_REGION_SIZE (0x0000C000)
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/*
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* Debug UART
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*
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* This is basically a remap of UART1 into a region that is section
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* aligned so that it * can be used with the low-level debug code.
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*/
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#define IXP4XX_DEBUG_UART_BASE_PHYS (0xC8000000)
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#define IXP4XX_DEBUG_UART_BASE_VIRT (0xffb00000)
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#define IXP4XX_DEBUG_UART_REGION_SIZE (0x00001000)
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#define IXP4XX_EXP_CS0_OFFSET 0x00
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#define IXP4XX_EXP_CS0_OFFSET 0x00
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#define IXP4XX_EXP_CS1_OFFSET 0x04
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#define IXP4XX_EXP_CS1_OFFSET 0x04
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#define IXP4XX_EXP_CS2_OFFSET 0x08
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#define IXP4XX_EXP_CS2_OFFSET 0x08
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