FROMLIST: arm64: tls: Avoid unconditional zeroing of tpidrro_el0 for native tasks
When unmapping the kernel at EL0, we use tpidrro_el0 as a scratch register during exception entry from native tasks and subsequently zero it in the kernel_ventry macro. We can therefore avoid zeroing tpidrro_el0 in the context-switch path for native tasks using the entry trampoline. Reviewed-by: Mark Rutland <mark.rutland@arm.com> Tested-by: Laura Abbott <labbott@redhat.com> Tested-by: Shanker Donthineni <shankerd@codeaurora.org> Signed-off-by: Will Deacon <will.deacon@arm.com> (cherry picked from git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git commit 18011eac28c7cb31c87b86b7d0e5b01894405c7f) Change-Id: Ief7b4099f055420a7a23c8dcf497269192f5fb58 [ghackmann@google.com: adjust context] Signed-off-by: Greg Hackmann <ghackmann@google.com> Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
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1 changed files with 6 additions and 8 deletions
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@ -376,19 +376,17 @@ int copy_thread(unsigned long clone_flags, unsigned long stack_start,
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static void tls_thread_switch(struct task_struct *next)
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{
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unsigned long tpidr, tpidrro;
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unsigned long tpidr;
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asm("mrs %0, tpidr_el0" : "=r" (tpidr));
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*task_user_tls(current) = tpidr;
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tpidr = *task_user_tls(next);
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tpidrro = is_compat_thread(task_thread_info(next)) ?
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next->thread.tp_value : 0;
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if (is_compat_thread(task_thread_info(next)))
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write_sysreg(next->thread.tp_value, tpidrro_el0);
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else if (!arm64_kernel_unmapped_at_el0())
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write_sysreg(0, tpidrro_el0);
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asm(
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" msr tpidr_el0, %0\n"
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" msr tpidrro_el0, %1"
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: : "r" (tpidr), "r" (tpidrro));
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write_sysreg(*task_user_tls(next), tpidr_el0);
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}
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/* Restore the UAO state depending on next's addr_limit */
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