From a9fe6f36abc1b6c11dccf499333caefc7a2f38e2 Mon Sep 17 00:00:00 2001 From: Ajay Singh Parmar Date: Fri, 5 Aug 2016 15:59:31 -0700 Subject: [PATCH] ARM: dts: msm: add hdcp support on msmcobalt v1 Add qfprom and hdcp register addresses to display port device so that it can run the hdcp 1.x protocol. Change-Id: Ib28eb08cc3c8a45a0e87ae1c4f84c904e66652f6 Signed-off-by: Ajay Singh Parmar --- arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi b/arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi index 6025d9b54351..afb03bc3e4f4 100644 --- a/arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi +++ b/arch/arm/boot/dts/qcom/msmcobalt-mdss.dtsi @@ -456,8 +456,11 @@ reg = <0xc990000 0xa84>, <0xc011000 0x910>, - <0x1fcb200 0x050>; - reg-names = "dp_ctrl", "dp_phy", "tcsr_regs"; + <0x1fcb200 0x050>, + <0x780000 0x621c>, + <0xc9e1000 0x02c>; + reg-names = "dp_ctrl", "dp_phy", "tcsr_regs", + "qfprom_physical","hdcp_physical"; clocks = <&clock_mmss clk_mmss_mnoc_ahb_clk>, <&clock_mmss clk_mmss_mdss_ahb_clk>,