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drm/i915/bxt: Enable PTE encoding

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The caching options for page table entries have remained the same as
Cherryview. This patch fixes it so the right code path is taken on BXT.

v2: Fix up commit message (Mike)

Signed-off-by: Sumit Singh <sumit.k.singh@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Sumit Singh 2015-03-17 11:39:31 +02:00 • committed by Daniel Vetter
parent 31d4dcf705
commit 5a4e33a34f
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/i915/i915_gem_gtt.c
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@ -1687,7 +1687,7 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
if (INTEL_INFO(dev)->gen >= 8) {
if (IS_CHERRYVIEW(dev))
if (IS_CHERRYVIEW(dev) || IS_BROXTON(dev))
chv_setup_private_ppat(dev_priv);
else
bdw_setup_private_ppat(dev_priv);
@ -2375,7 +2375,7 @@ static int gen8_gmch_probe(struct drm_device *dev,
*gtt_total = (gtt_size / sizeof(gen8_pte_t)) << PAGE_SHIFT;
if (IS_CHERRYVIEW(dev))
if (IS_CHERRYVIEW(dev) || IS_BROXTON(dev))
chv_setup_private_ppat(dev_priv);
else
bdw_setup_private_ppat(dev_priv);