From c2fd04161e8c002708bfb6d3308f5ca21d2a3e7e Mon Sep 17 00:00:00 2001 From: Deepak Katragadda Date: Fri, 30 Sep 2016 16:51:50 -0700 Subject: [PATCH] clk: msm: clock-osm: Fix check to write to the LLM OVERRIDE register On MSMCOBALT v2, the qcom,llm-sw-overr flag is no longer needed. This causes an issue where the corresponding array in code is not filled up but the check to make the writes to the llm register still succeeds. This leads to us writing 0 to the register erroneously multiple times. Fix this check. CRs-Fixed: 1074141 Change-Id: I2dd529a78d06ac08a34546df39cb01ad4c6cb3d5 Signed-off-by: Deepak Katragadda --- drivers/clk/msm/clock-osm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/msm/clock-osm.c b/drivers/clk/msm/clock-osm.c index 68274765a6c1..c5ec2ed7318d 100644 --- a/drivers/clk/msm/clock-osm.c +++ b/drivers/clk/msm/clock-osm.c @@ -460,7 +460,7 @@ static int clk_osm_set_rate(struct clk *c, unsigned long rate) } pr_debug("rate: %lu --> index %d\n", rate, index); - if (cpuclk->llm_sw_overr) { + if (cpuclk->llm_sw_overr[0]) { clk_osm_write_reg(cpuclk, cpuclk->llm_sw_overr[0], LLM_SW_OVERRIDE_REG); clk_osm_write_reg(cpuclk, cpuclk->llm_sw_overr[1], @@ -471,7 +471,7 @@ static int clk_osm_set_rate(struct clk *c, unsigned long rate) /* Choose index and send request to OSM hardware */ clk_osm_write_reg(cpuclk, index, DCVS_PERF_STATE_DESIRED_REG); - if (cpuclk->llm_sw_overr) { + if (cpuclk->llm_sw_overr[0]) { udelay(1); clk_osm_write_reg(cpuclk, cpuclk->llm_sw_overr[2], LLM_SW_OVERRIDE_REG);