drm/msm: Add timestamp counter

In the confusion of adding the perfcounter API the timestamp query
was broken. Convert the query over to the perfcounter API to avoid
confusion.

Change-Id: Ic0dedbad590489a643e8aa6d678bf19f732c06dd
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
This commit is contained in:
Jordan Crouse 2017-06-28 09:55:12 -06:00
parent 84200abc78
commit 5c91d8529c
2 changed files with 10 additions and 2 deletions

View file

@ -774,6 +774,9 @@ static int a5xx_hw_init(struct msm_gpu *gpu)
gpu_write(gpu, REG_A5XX_TPL1_ADDR_MODE_CNTL, 0x1); gpu_write(gpu, REG_A5XX_TPL1_ADDR_MODE_CNTL, 0x1);
gpu_write(gpu, REG_A5XX_RBBM_SECVID_TSB_ADDR_MODE_CNTL, 0x1); gpu_write(gpu, REG_A5XX_RBBM_SECVID_TSB_ADDR_MODE_CNTL, 0x1);
a5xx_gpu->timestamp_counter = adreno_get_counter(gpu,
MSM_COUNTER_GROUP_CP, 0, NULL, NULL);
/* Load the GPMU firmware before starting the HW init */ /* Load the GPMU firmware before starting the HW init */
a5xx_gpmu_ucode_init(gpu); a5xx_gpmu_ucode_init(gpu);
@ -1218,8 +1221,11 @@ static int a5xx_pm_suspend(struct msm_gpu *gpu)
static int a5xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value) static int a5xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)
{ {
*value = gpu_read64(gpu, REG_A5XX_RBBM_PERFCTR_CP_0_LO, struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
REG_A5XX_RBBM_PERFCTR_CP_0_HI); struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
*value = adreno_read_counter(gpu, MSM_COUNTER_GROUP_CP,
a5xx_gpu->timestamp_counter);
return 0; return 0;
} }

View file

@ -56,6 +56,8 @@ struct a5xx_gpu {
struct a5xx_smmu_info *smmu_info; struct a5xx_smmu_info *smmu_info;
struct drm_gem_object *smmu_info_bo; struct drm_gem_object *smmu_info_bo;
uint64_t smmu_info_iova; uint64_t smmu_info_iova;
int timestamp_counter;
}; };
#define to_a5xx_gpu(x) container_of(x, struct a5xx_gpu, base) #define to_a5xx_gpu(x) container_of(x, struct a5xx_gpu, base)