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iommu/arm-smmu: return 0 on error in ATOS

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Currently, we return garbage when iova_to_phys fails when we're using
hardware translation features (ATOS). iova_to_phys should return 0 when
it fails. Fix this.

Change-Id: I3bfefce7315e43a684c7c29c4fa7ef5960182ea8
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
This commit is contained in:
Mitchel Humpherys 2014-09-30 16:14:14 -07:00 • committed by David Keitel
parent 26f0709162
commit 5ce5498b66
1 changed files with 6 additions and 4 deletions
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10
drivers/iommu/arm-smmu.c
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@ -1823,12 +1823,12 @@ static phys_addr_t arm_smmu_iova_to_phys_hard(struct iommu_domain *domain,
cb_base = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx); cb_base = ARM_SMMU_CB_BASE(smmu) + ARM_SMMU_CB(smmu, cfg->cbndx);
if (smmu->version == 1) { if (smmu->version == 1) {
u32 reg = iova & ~0xFFF; u32 reg = iova & ~0xfff;
writel_relaxed(reg, cb_base + ARM_SMMU_CB_ATS1PR_LO); writel_relaxed(reg, cb_base + ARM_SMMU_CB_ATS1PR_LO);
} else { } else {
u32 reg = iova & ~0xFFF; u32 reg = iova & ~0xfff;
writel_relaxed(reg, cb_base + ARM_SMMU_CB_ATS1PR_LO); writel_relaxed(reg, cb_base + ARM_SMMU_CB_ATS1PR_LO);
reg = (iova & ~0xFFF) >> 32; reg = (iova & ~0xfff) >> 32;
writel_relaxed(reg, cb_base + ARM_SMMU_CB_ATS1PR_HI); writel_relaxed(reg, cb_base + ARM_SMMU_CB_ATS1PR_HI);
} }
@ -1847,8 +1847,10 @@ static phys_addr_t arm_smmu_iova_to_phys_hard(struct iommu_domain *domain,
if (phys & CB_PAR_F) { if (phys & CB_PAR_F) {
dev_err(dev, "translation fault on %s!\n", dev_name(dev)); dev_err(dev, "translation fault on %s!\n", dev_name(dev));
dev_err(dev, "PAR = 0x%llx\n", phys); dev_err(dev, "PAR = 0x%llx\n", phys);
phys = 0;
} else {
phys = (phys & 0xfffffff000ULL) | (iova & 0x00000fff);
} }
phys = (phys & 0xFFFFFFF000ULL) | (iova & 0x00000FFF);
arm_smmu_disable_clocks(smmu); arm_smmu_disable_clocks(smmu);
return phys; return phys;