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msm: mdss: ensure clocks are on till pixel transfer is completed

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When pixel transfer is going on, there is a race condition during
which pixel clock can get turned off due to early clock gating
before CMD_MDP interrupt is triggered which can cause interrupt
storm. This change ensures CMD_MDP interrupt is received before
turning off clocks.

Change-Id: I33b664334912584170c12733329051b067c3f1da
Signed-off-by: Ashish Garg <ashigarg@codeaurora.org>
This commit is contained in:
Ashish Garg 2017-05-23 14:45:55 +05:30
parent 60be71604a
commit 5d1a271056
1 changed files with 8 additions and 1 deletions
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9
drivers/video/fbdev/msm/mdss_dsi_host.c
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@ -165,7 +165,14 @@ void mdss_dsi_clk_req(struct mdss_dsi_ctrl_pdata *ctrl,
MDSS_XLOG(ctrl->ndx, enable, ctrl->mdp_busy, current->pid,
client);
if (enable == 0) {
/*
* ensure that before going into ecg or turning
* off the clocks, cmd_mdp_busy is not true. During a
* race condition, clocks are turned off and so the
* isr for cmd_mdp_busy does not get cleared in hw.
*/
if (enable == MDSS_DSI_CLK_OFF ||
enable == MDSS_DSI_CLK_EARLY_GATE) {
/* need wait before disable */
mutex_lock(&ctrl->cmd_mutex);
mdss_dsi_cmd_mdp_busy(ctrl);