staging: comedi: ni_stc.h: tidy up G_Command_Register
Rename the CamelCase and define the G0 and G1 registers to add clarity to the mio_regmap tables. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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2 changed files with 7 additions and 5 deletions
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@ -318,8 +318,8 @@ static const struct mio_regmap m_series_stc_write_regmap[] = {
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[NISTC_INTB_ACK_REG] = { 0x106, 2 },
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[NISTC_INTB_ACK_REG] = { 0x106, 2 },
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[NISTC_AI_CMD2_REG] = { 0x108, 2 },
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[NISTC_AI_CMD2_REG] = { 0x108, 2 },
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[NISTC_AO_CMD2_REG] = { 0x10a, 2 },
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[NISTC_AO_CMD2_REG] = { 0x10a, 2 },
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[G_Command_Register(0)] = { 0x10c, 2 },
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[NISTC_G0_CMD_REG] = { 0x10c, 2 },
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[G_Command_Register(1)] = { 0x10e, 2 },
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[NISTC_G1_CMD_REG] = { 0x10e, 2 },
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[AI_Command_1_Register] = { 0x110, 2 },
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[AI_Command_1_Register] = { 0x110, 2 },
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[AO_Command_1_Register] = { 0x112, 2 },
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[AO_Command_1_Register] = { 0x112, 2 },
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/*
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/*
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@ -3720,8 +3720,8 @@ static void init_ao_67xx(struct comedi_device *dev, struct comedi_subdevice *s)
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static const struct mio_regmap ni_gpct_to_stc_regmap[] = {
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static const struct mio_regmap ni_gpct_to_stc_regmap[] = {
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[NITIO_G0_AUTO_INC] = { G_Autoincrement_Register(0), 2 },
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[NITIO_G0_AUTO_INC] = { G_Autoincrement_Register(0), 2 },
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[NITIO_G1_AUTO_INC] = { G_Autoincrement_Register(1), 2 },
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[NITIO_G1_AUTO_INC] = { G_Autoincrement_Register(1), 2 },
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[NITIO_G0_CMD] = { G_Command_Register(0), 2 },
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[NITIO_G0_CMD] = { NISTC_G0_CMD_REG, 2 },
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[NITIO_G1_CMD] = { G_Command_Register(1), 2 },
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[NITIO_G1_CMD] = { NISTC_G1_CMD_REG, 2 },
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[NITIO_G0_HW_SAVE] = { G_HW_Save_Register(0), 4 },
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[NITIO_G0_HW_SAVE] = { G_HW_Save_Register(0), 4 },
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[NITIO_G1_HW_SAVE] = { G_HW_Save_Register(1), 4 },
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[NITIO_G1_HW_SAVE] = { G_HW_Save_Register(1), 4 },
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[NITIO_G0_SW_SAVE] = { G_Save_Register(0), 4 },
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[NITIO_G0_SW_SAVE] = { G_Save_Register(0), 4 },
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@ -126,6 +126,9 @@
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#define NISTC_AO_CMD2_UPDATE2_PULSE BIT(1)
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#define NISTC_AO_CMD2_UPDATE2_PULSE BIT(1)
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#define NISTC_AO_CMD2_START1_PULSE BIT(0)
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#define NISTC_AO_CMD2_START1_PULSE BIT(0)
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#define NISTC_G0_CMD_REG 6
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#define NISTC_G1_CMD_REG 7
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#define AI_Status_1_Register 2
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#define AI_Status_1_Register 2
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#define Interrupt_A_St 0x8000
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#define Interrupt_A_St 0x8000
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#define AI_FIFO_Full_St 0x4000
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#define AI_FIFO_Full_St 0x4000
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@ -599,7 +602,6 @@ static unsigned AO_UPDATE_Output_Select(enum ao_update_output_selection
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#define AI_External_Gate_Select(a) ((a) & 0x1f)
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#define AI_External_Gate_Select(a) ((a) & 0x1f)
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#define G_Autoincrement_Register(a) (68+(a))
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#define G_Autoincrement_Register(a) (68+(a))
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#define G_Command_Register(a) (6+(a))
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#define G_HW_Save_Register(a) (8+(a)*2)
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#define G_HW_Save_Register(a) (8+(a)*2)
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#define G_HW_Save_Register_High(a) (8+(a)*2)
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#define G_HW_Save_Register_High(a) (8+(a)*2)
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#define G_HW_Save_Register_Low(a) (9+(a)*2)
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#define G_HW_Save_Register_Low(a) (9+(a)*2)
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