evie/android_kernel_oneplus_msm8998
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cnss2: Expose PCIe window register lock related APIs

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The register window needs to be configed properly before accessing
any larger than 4K range PCIe registers. Expose the lock to WLAN
driver to avoid race condition when both drivers try to config it.

Change-Id: I94ccd963d4fd0a9715330d2e5733346ccd993ae1
Signed-off-by: Yue Ma <yuem@codeaurora.org>
This commit is contained in:
Yue Ma 2019-10-17 12:30:26 -07:00
parent dd4645c977
commit 5ff3c8e366
2 changed files with 16 additions and 0 deletions
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13
drivers/net/wireless/cnss2/pci.c
View file

@ -56,6 +56,7 @@
#ifdef CONFIG_PCI_MSM
static DEFINE_SPINLOCK(pci_link_down_lock);
#endif
static DEFINE_SPINLOCK(pci_reg_window_lock);
static unsigned int pci_link_down_panic;
module_param(pci_link_down_panic, uint, 0600);
@ -268,6 +269,18 @@ int cnss_pci_is_device_down(struct device *dev)
}
EXPORT_SYMBOL(cnss_pci_is_device_down);
void cnss_pci_lock_reg_window(struct device *dev, unsigned long *flags)
{
spin_lock_bh(&pci_reg_window_lock);
}
EXPORT_SYMBOL(cnss_pci_lock_reg_window);
void cnss_pci_unlock_reg_window(struct device *dev, unsigned long *flags)
{
spin_unlock_bh(&pci_reg_window_lock);
}
EXPORT_SYMBOL(cnss_pci_unlock_reg_window);
int cnss_pci_recovery_update_status(struct cnss_pci_data *pci_priv)
{
struct cnss_plat_data *plat_priv;

3
include/net/cnss2.h
View file

@ -245,6 +245,9 @@ extern void cnss_request_pm_qos(struct device *dev, u32 qos_val);
extern void cnss_remove_pm_qos(struct device *dev);
extern void cnss_lock_pm_sem(struct device *dev);
extern void cnss_release_pm_sem(struct device *dev);
extern void cnss_pci_lock_reg_window(struct device *dev, unsigned long *flags);
extern void cnss_pci_unlock_reg_window(struct device *dev,
unsigned long *flags);
extern int cnss_auto_suspend(struct device *dev);
extern int cnss_auto_resume(struct device *dev);
extern int cnss_pci_is_drv_connected(struct device *dev);