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clk: qcom: Remove few graphics clock for sdm660

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The gcc_gpu_bimc_gfx_src_clk and gcc_gpu_snoc_dvm_gfx_clk need
to left at their default state of ON. Remove controlling them
from the linux clock driver to avoid disabling them during
late_init.

Change-Id: Iefc033998bf87fcc98dfaa1b7321d9cc33dedd5e
Signed-off-by: Taniya Das <tdas@codeaurora.org>
This commit is contained in:
Taniya Das 2017-01-16 17:06:29 +05:30
parent a51b7f6000
commit 60fd13b746
2 changed files with 1 additions and 35 deletions
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32
drivers/clk/qcom/gcc-sdm660.c
View file

@ -1735,19 +1735,6 @@ static struct clk_branch gcc_gpu_bimc_gfx_clk = {
},
};
static struct clk_branch gcc_gpu_bimc_gfx_src_clk = {
.halt_reg = 0x7100c,
.halt_check = BRANCH_HALT,
.clkr = {
.enable_reg = 0x7100c,
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "gcc_gpu_bimc_gfx_src_clk",
.ops = &clk_branch2_ops,
},
},
};
static struct clk_branch gcc_gpu_cfg_ahb_clk = {
.halt_reg = 0x71004,
.halt_check = BRANCH_VOTED,
@ -1807,19 +1794,6 @@ static struct clk_branch gcc_gpu_gpll0_div_clk = {
},
};
static struct clk_branch gcc_gpu_snoc_dvm_gfx_clk = {
.halt_reg = 0x71018,
.halt_check = BRANCH_HALT,
.clkr = {
.enable_reg = 0x71018,
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "gcc_gpu_snoc_dvm_gfx_clk",
.ops = &clk_branch2_ops,
},
},
};
static struct clk_branch gcc_hmss_ahb_clk = {
.halt_reg = 0x48000,
.halt_check = BRANCH_HALT_VOTED,
@ -2647,11 +2621,9 @@ static struct clk_regmap *gcc_660_clocks[] = {
[GCC_GP2_CLK] = &gcc_gp2_clk.clkr,
[GCC_GP3_CLK] = &gcc_gp3_clk.clkr,
[GCC_GPU_BIMC_GFX_CLK] = &gcc_gpu_bimc_gfx_clk.clkr,
[GCC_GPU_BIMC_GFX_SRC_CLK] = &gcc_gpu_bimc_gfx_src_clk.clkr,
[GCC_GPU_CFG_AHB_CLK] = &gcc_gpu_cfg_ahb_clk.clkr,
[GCC_GPU_GPLL0_CLK] = &gcc_gpu_gpll0_clk.clkr,
[GCC_GPU_GPLL0_DIV_CLK] = &gcc_gpu_gpll0_div_clk.clkr,
[GCC_GPU_SNOC_DVM_GFX_CLK] = &gcc_gpu_snoc_dvm_gfx_clk.clkr,
[GCC_HMSS_AHB_CLK] = &gcc_hmss_ahb_clk.clkr,
[GCC_HMSS_DVM_BUS_CLK] = &gcc_hmss_dvm_bus_clk.clkr,
[GCC_HMSS_RBCPR_CLK] = &gcc_hmss_rbcpr_clk.clkr,
@ -2890,9 +2862,7 @@ static const char *const debug_mux_parent_names[] = {
"gcc_gp2_clk",
"gcc_gp3_clk",
"gcc_gpu_bimc_gfx_clk",
"gcc_gpu_bimc_gfx_src_clk",
"gcc_gpu_cfg_ahb_clk",
"gcc_gpu_snoc_dvm_gfx_clk",
"gcc_hmss_ahb_clk",
"gcc_hmss_dvm_bus_clk",
"gcc_hmss_rbcpr_clk",
@ -3071,9 +3041,7 @@ static struct clk_debug_mux gcc_debug_mux = {
{ "gcc_gp2_clk", 0x0E0 },
{ "gcc_gp3_clk", 0x0E1 },
{ "gcc_gpu_bimc_gfx_clk", 0x13F },
{ "gcc_gpu_bimc_gfx_src_clk", 0x13E },
{ "gcc_gpu_cfg_ahb_clk", 0x13B },
{ "gcc_gpu_snoc_dvm_gfx_clk", 0x141 },
{ "gcc_hmss_ahb_clk", 0x0BA },
{ "gcc_hmss_dvm_bus_clk", 0x0BF },
{ "gcc_hmss_rbcpr_clk", 0x0BC },

4
include/dt-bindings/clock/qcom,gcc-sdm660.h
View file

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016, The Linux Foundation. All rights reserved.
* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -77,11 +77,9 @@
#define GCC_GP2_CLK 62
#define GCC_GP3_CLK 63
#define GCC_GPU_BIMC_GFX_CLK 64
#define GCC_GPU_BIMC_GFX_SRC_CLK 65
#define GCC_GPU_CFG_AHB_CLK 66
#define GCC_GPU_GPLL0_CLK 67
#define GCC_GPU_GPLL0_DIV_CLK 68
#define GCC_GPU_SNOC_DVM_GFX_CLK 69
#define GCC_HMSS_AHB_CLK 70
#define GCC_HMSS_DVM_BUS_CLK 71
#define GCC_HMSS_RBCPR_CLK 72