evie/android_kernel_oneplus_msm8998
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Merge "ARM: dts: msm: blsp and sdhci switch to virtual clock on msm8996 vplatform"

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Linux Build Service Account 2017-12-15 14:14:36 -08:00 • committed by Gerrit - the friendly Code Review server
commit 62d6ead3ee
2 changed files with 15 additions and 10 deletions
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16
arch/arm/boot/dts/qcom/vplatform-lfv-msm8996-blsp.dtsi
View file

@ -36,8 +36,8 @@
pinctrl-0 = <&spi_9_active>;
pinctrl-1 = <&spi_9_sleep>;
clock-names = "iface_clk", "core_clk";
clocks = <&clock_gcc clk_gcc_blsp2_ahb_clk>,
<&clock_gcc clk_gcc_blsp2_qup3_spi_apps_clk>;
clocks = <&clock_virt clk_gcc_blsp2_ahb_clk>,
<&clock_virt clk_gcc_blsp2_qup3_spi_apps_clk>;
status = "disabled";
};
@ -54,8 +54,8 @@
qcom,clk-freq-out = <400000>;
qcom,clk-freq-in = <19200000>;
clock-names = "iface_clk", "core_clk";
clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>,
<&clock_gcc clk_gcc_blsp1_qup6_i2c_apps_clk>;
clocks = <&clock_virt clk_gcc_blsp1_ahb_clk>,
<&clock_virt clk_gcc_blsp1_qup6_i2c_apps_clk>;
pinctrl-names = "i2c_active", "i2c_sleep";
pinctrl-0 = <&i2c_6_active>;
pinctrl-1 = <&i2c_6_sleep>;
@ -75,8 +75,8 @@
qcom,clk-freq-out = <400000>;
qcom,clk-freq-in = <19200000>;
clock-names = "iface_clk", "core_clk";
clocks = <&clock_gcc clk_gcc_blsp2_ahb_clk>,
<&clock_gcc clk_gcc_blsp2_qup2_i2c_apps_clk>;
clocks = <&clock_virt clk_gcc_blsp2_ahb_clk>,
<&clock_virt clk_gcc_blsp2_qup2_i2c_apps_clk>;
pinctrl-names = "i2c_active", "i2c_sleep";
pinctrl-0 = <&i2c_8_active>;
pinctrl-1 = <&i2c_8_sleep>;
@ -99,8 +99,8 @@
qcom,bam-rx-ep-pipe-index = <3>;
qcom,master-id = <86>;
clock-names = "core_clk", "iface_clk";
clocks = <&clock_gcc clk_gcc_blsp1_uart2_apps_clk>,
<&clock_gcc clk_gcc_blsp1_ahb_clk>;
clocks = <&clock_virt clk_gcc_blsp1_uart2_apps_clk>,
<&clock_virt clk_gcc_blsp1_ahb_clk>;
pinctrl-names = "sleep", "default";
pinctrl-0 = <&blsp1_uart2_sleep>;
pinctrl-1 = <&blsp1_uart2_active>;

9
arch/arm/boot/dts/qcom/vplatform-lfv-msm8996.dtsi
View file

@ -96,8 +96,8 @@
interrupt-names = "hc_irq", "pwr_irq";
clock-names = "iface_clk", "core_clk";
clocks = <&clock_gcc clk_gcc_sdcc2_ahb_clk>,
<&clock_gcc clk_gcc_sdcc2_apps_clk>;
clocks = <&clock_virt clk_gcc_sdcc2_ahb_clk>,
<&clock_virt clk_gcc_sdcc2_apps_clk>;
qcom,large-address-bus;
qcom,bus-width = <4>;
@ -696,6 +696,11 @@
qcom,pipe-attr-ee;
};
clock_virt: qcom,virtclk-frontend@0 {
compatible = "qcom,virtclk-frontend-8996";
#clock-cells = <1>;
};
clock_gcc: qcom,gcc@300000 {
compatible = "qcom,dummycc";
#clock-cells = <1>;