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ARM: zImage: __armv3_mpu_cache_flush: respect should-be-zero specification

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Probably the register content for cache operations is "don't care" in
practice, but as r1 is explicitly zeroed, use that one.

Acked-by: Eric Miao <eric.miao@canonical.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
This commit is contained in:
Uwe Kleine-König 2010-01-26 22:18:09 +01:00
parent 4a8d57a54f
commit 63fa71872b
1 changed files with 1 additions and 1 deletions
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2
arch/arm/boot/compressed/head.S
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@ -994,7 +994,7 @@ no_cache_id:
__armv3_mmu_cache_flush: __armv3_mmu_cache_flush:
__armv3_mpu_cache_flush: __armv3_mpu_cache_flush:
mov r1, #0 mov r1, #0
mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3 mcr p15, 0, r1, c7, c0, 0 @ invalidate whole cache v3
mov pc, lr mov pc, lr
/* /*