evie/android_kernel_oneplus_msm8998
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radeon: Call pci_clear_master() instead of open-coding it.

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Reported-by: Ben Hutchings <ben@decadent.org.uk>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Michel Dänzer 2012-01-12 16:04:11 +01:00 • committed by Dave Airlie
parent 9f821c675a
commit 642ce5251b
2 changed files with 3 additions and 14 deletions
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4
drivers/gpu/drm/radeon/r100.c
View file

@ -2186,7 +2186,6 @@ bool r100_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
void r100_bm_disable(struct radeon_device *rdev) void r100_bm_disable(struct radeon_device *rdev)
{ {
u32 tmp; u32 tmp;
u16 tmp16;
/* disable bus mastering */ /* disable bus mastering */
tmp = RREG32(R_000030_BUS_CNTL); tmp = RREG32(R_000030_BUS_CNTL);
@ -2197,8 +2196,7 @@ void r100_bm_disable(struct radeon_device *rdev)
WREG32(R_000030_BUS_CNTL, (tmp & 0xFFFFFFFF) | 0x00000040); WREG32(R_000030_BUS_CNTL, (tmp & 0xFFFFFFFF) | 0x00000040);
tmp = RREG32(RADEON_BUS_CNTL); tmp = RREG32(RADEON_BUS_CNTL);
mdelay(1); mdelay(1);
pci_read_config_word(rdev->pdev, 0x4, &tmp16); pci_clear_master(rdev->pdev);
pci_write_config_word(rdev->pdev, 0x4, tmp16 & 0xFFFB);
mdelay(1); mdelay(1);
} }

13
drivers/gpu/drm/radeon/rs600.c
View file

@ -322,16 +322,6 @@ void rs600_hpd_fini(struct radeon_device *rdev)
} }
} }
void rs600_bm_disable(struct radeon_device *rdev)
{
u16 tmp;
/* disable bus mastering */
pci_read_config_word(rdev->pdev, 0x4, &tmp);
pci_write_config_word(rdev->pdev, 0x4, tmp & 0xFFFB);
mdelay(1);
}
int rs600_asic_reset(struct radeon_device *rdev) int rs600_asic_reset(struct radeon_device *rdev)
{ {
struct rv515_mc_save save; struct rv515_mc_save save;
@ -355,7 +345,8 @@ int rs600_asic_reset(struct radeon_device *rdev)
WREG32(RADEON_CP_RB_CNTL, tmp); WREG32(RADEON_CP_RB_CNTL, tmp);
pci_save_state(rdev->pdev); pci_save_state(rdev->pdev);
/* disable bus mastering */ /* disable bus mastering */
rs600_bm_disable(rdev); pci_clear_master(rdev->pdev);
mdelay(1);
/* reset GA+VAP */ /* reset GA+VAP */
WREG32(R_0000F0_RBBM_SOFT_RESET, S_0000F0_SOFT_RESET_VAP(1) | WREG32(R_0000F0_RBBM_SOFT_RESET, S_0000F0_SOFT_RESET_VAP(1) |
S_0000F0_SOFT_RESET_GA(1)); S_0000F0_SOFT_RESET_GA(1));