msm: mdss: move per pipe mdp clk calc to a separate function
Separate the per pipe mdp clock calculation from the bandwidth calculation within the function that computes the pipe performance. Change-Id: I40cb9c786bf32523cbc5982a494e439f586cc43f Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
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1 changed files with 44 additions and 23 deletions
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@ -472,6 +472,47 @@ static inline u32 get_panel_xres(struct mdss_panel_info *pinfo)
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return xres;
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return xres;
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}
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}
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static u32 get_pipe_mdp_clk_rate(struct mdss_mdp_pipe *pipe,
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struct mdss_rect src, struct mdss_rect dst,
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u32 fps, u32 v_total, u32 flags)
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{
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struct mdss_mdp_mixer *mixer;
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u32 rate, src_h;
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mixer = pipe->mixer_left;
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src_h = src.h >> pipe->vert_deci;
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if (mixer->rotator_mode) {
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rate = pipe->src.w * pipe->src.h * fps;
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rate /= 4; /* block mode fetch at 4 pix/clk */
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} else {
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rate = dst.w;
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if (src_h > dst.h)
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rate = (rate * src_h) / dst.h;
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rate *= v_total * fps;
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/* pipes decoding BWC content have different clk requirement */
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if (pipe->bwc_mode && !pipe->src_fmt->is_yuv &&
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pipe->src_fmt->bpp == 4) {
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u32 bwc_rate =
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mult_frac((src.w * src_h * fps), v_total, dst.h << 1);
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pr_debug("src: w:%d h:%d fps:%d vtotal:%d dst h:%d\n",
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src.w, src_h, fps, v_total, dst.h);
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pr_debug("pipe%d: bwc_rate=%d normal_rate=%d\n",
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pipe->num, bwc_rate, rate);
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rate = max(bwc_rate, rate);
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}
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}
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if (flags & PERF_CALC_PIPE_APPLY_CLK_FUDGE)
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rate = mdss_mdp_clk_fudge_factor(mixer, rate);
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return rate;
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}
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/**
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/**
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* mdss_mdp_perf_calc_pipe() - calculate performance numbers required by pipe
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* mdss_mdp_perf_calc_pipe() - calculate performance numbers required by pipe
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* @pipe: Source pipe struct containing updated pipe params
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* @pipe: Source pipe struct containing updated pipe params
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@ -501,7 +542,7 @@ int mdss_mdp_perf_calc_pipe(struct mdss_mdp_pipe *pipe,
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{
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{
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struct mdss_mdp_mixer *mixer;
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struct mdss_mdp_mixer *mixer;
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int fps = DEFAULT_FRAME_RATE;
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int fps = DEFAULT_FRAME_RATE;
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u32 quota, rate, v_total = 0, src_h, xres = 0, h_total = 0;
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u32 quota, v_total = 0, src_h, xres = 0, h_total = 0;
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struct mdss_rect src, dst;
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struct mdss_rect src, dst;
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bool is_fbc = false;
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bool is_fbc = false;
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struct mdss_mdp_prefill_params prefill_params;
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struct mdss_mdp_prefill_params prefill_params;
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@ -570,27 +611,9 @@ int mdss_mdp_perf_calc_pipe(struct mdss_mdp_pipe *pipe,
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quota *= pipe->src_fmt->bpp;
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quota *= pipe->src_fmt->bpp;
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if (mixer->rotator_mode) {
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if (mixer->rotator_mode) {
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rate = pipe->src.w * pipe->src.h * fps;
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rate /= 4; /* block mode fetch at 4 pix/clk */
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quota *= 2; /* bus read + write */
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quota *= 2; /* bus read + write */
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} else {
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} else {
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rate = dst.w;
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if (src_h > dst.h)
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rate = (rate * src_h) / dst.h;
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rate *= v_total * fps;
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/* pipes decoding BWC content have different clk requirement */
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if (pipe->bwc_mode && !pipe->src_fmt->is_yuv &&
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pipe->src_fmt->bpp == 4) {
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u32 bwc_rate =
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mult_frac((src.w * src_h * fps), v_total, dst.h << 1);
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pr_debug("src: w:%d h:%d fps:%d vtotal:%d dst h:%d\n",
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src.w, src_h, fps, v_total, dst.h);
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pr_debug("pipe%d: bwc_rate=%d normal_rate=%d\n",
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pipe->num, bwc_rate, rate);
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rate = max(bwc_rate, rate);
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}
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quota = mult_frac(quota, v_total, dst.h);
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quota = mult_frac(quota, v_total, dst.h);
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if (!mixer->ctl->is_video_mode)
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if (!mixer->ctl->is_video_mode)
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@ -598,10 +621,8 @@ int mdss_mdp_perf_calc_pipe(struct mdss_mdp_pipe *pipe,
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}
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}
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perf->bw_overlap = quota;
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perf->bw_overlap = quota;
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if (flags & PERF_CALC_PIPE_APPLY_CLK_FUDGE)
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perf->mdp_clk_rate = get_pipe_mdp_clk_rate(pipe, src, dst,
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perf->mdp_clk_rate = mdss_mdp_clk_fudge_factor(mixer, rate);
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fps, v_total, flags);
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else
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perf->mdp_clk_rate = rate;
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if (mixer->ctl->intf_num == MDSS_MDP_NO_INTF ||
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if (mixer->ctl->intf_num == MDSS_MDP_NO_INTF ||
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mdata->disable_prefill ||
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mdata->disable_prefill ||
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