diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile index 8da2bf963b57..9ae7b7e2ba71 100644 --- a/arch/powerpc/boot/Makefile +++ b/arch/powerpc/boot/Makefile @@ -346,7 +346,7 @@ install: $(CONFIGURE) $(addprefix $(obj)/, $(image-y)) clean-files += $(image-) $(initrd-) cuImage.* dtbImage.* treeImage.* \ zImage zImage.initrd zImage.chrp zImage.coff zImage.holly \ zImage.iseries zImage.miboot zImage.pmac zImage.pseries \ - otheros.bld *.dtb + simpleImage.* otheros.bld *.dtb # clean up files cached by wrapper clean-kernel := vmlinux.strip vmlinux.bin diff --git a/arch/powerpc/boot/mktree.c b/arch/powerpc/boot/mktree.c index 45d06a8c7cd1..c2baae0a3d89 100644 --- a/arch/powerpc/boot/mktree.c +++ b/arch/powerpc/boot/mktree.c @@ -42,7 +42,7 @@ int main(int argc, char *argv[]) { int in_fd, out_fd; int nblks, i; - uint cksum, *cp; + unsigned int cksum, *cp; struct stat st; boot_block_t bt; @@ -90,7 +90,7 @@ int main(int argc, char *argv[]) cksum = 0; cp = (void *)&bt; - for (i=0; ioprofile_cpu_type = old.oprofile_cpu_type; t->oprofile_type = old.oprofile_type; } diff --git a/arch/powerpc/kernel/machine_kexec.c b/arch/powerpc/kernel/machine_kexec.c index d59e2b1bdcba..bb3d893a8353 100644 --- a/arch/powerpc/kernel/machine_kexec.c +++ b/arch/powerpc/kernel/machine_kexec.c @@ -125,8 +125,8 @@ void __init reserve_crashkernel(void) /* Crash kernel trumps memory limit */ if (memory_limit && memory_limit <= crashk_res.end) { memory_limit = crashk_res.end + 1; - printk("Adjusted memory limit for crashkernel, now 0x%lx\n", - memory_limit); + printk("Adjusted memory limit for crashkernel, now 0x%llx\n", + (unsigned long long)memory_limit); } printk(KERN_INFO "Reserving %ldMB of memory at %ldMB " diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c index 9c69e7e145c5..4fee63cb53ff 100644 --- a/arch/powerpc/kernel/pci-common.c +++ b/arch/powerpc/kernel/pci-common.c @@ -1366,12 +1366,17 @@ static void __init pcibios_allocate_resources(int pass) for_each_pci_dev(dev) { pci_read_config_word(dev, PCI_COMMAND, &command); - for (idx = 0; idx < 6; idx++) { + for (idx = 0; idx <= PCI_ROM_RESOURCE; idx++) { r = &dev->resource[idx]; if (r->parent) /* Already allocated */ continue; if (!r->flags || (r->flags & IORESOURCE_UNSET)) continue; /* Not assigned at all */ + /* We only allocate ROMs on pass 1 just in case they + * have been screwed up by firmware + */ + if (idx == PCI_ROM_RESOURCE ) + disabled = 1; if (r->flags & IORESOURCE_IO) disabled = !(command & PCI_COMMAND_IO); else @@ -1382,17 +1387,19 @@ static void __init pcibios_allocate_resources(int pass) if (pass) continue; r = &dev->resource[PCI_ROM_RESOURCE]; - if (r->flags & IORESOURCE_ROM_ENABLE) { + if (r->flags) { /* Turn the ROM off, leave the resource region, * but keep it unregistered. */ u32 reg; - pr_debug("PCI: Switching off ROM of %s\n", - pci_name(dev)); - r->flags &= ~IORESOURCE_ROM_ENABLE; pci_read_config_dword(dev, dev->rom_base_reg, ®); - pci_write_config_dword(dev, dev->rom_base_reg, - reg & ~PCI_ROM_ADDRESS_ENABLE); + if (reg & PCI_ROM_ADDRESS_ENABLE) { + pr_debug("PCI: Switching off ROM of %s\n", + pci_name(dev)); + r->flags &= ~IORESOURCE_ROM_ENABLE; + pci_write_config_dword(dev, dev->rom_base_reg, + reg & ~PCI_ROM_ADDRESS_ENABLE); + } } } } diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c index be574fc0d92f..96edb6f8babb 100644 --- a/arch/powerpc/kernel/pci_64.c +++ b/arch/powerpc/kernel/pci_64.c @@ -64,7 +64,7 @@ static u32 get_int_prop(struct device_node *np, const char *name, u32 def) return def; } -static unsigned int pci_parse_of_flags(u32 addr0) +static unsigned int pci_parse_of_flags(u32 addr0, int bridge) { unsigned int flags = 0; @@ -75,8 +75,17 @@ static unsigned int pci_parse_of_flags(u32 addr0) if (addr0 & 0x40000000) flags |= IORESOURCE_PREFETCH | PCI_BASE_ADDRESS_MEM_PREFETCH; + /* Note: We don't know whether the ROM has been left enabled + * by the firmware or not. We mark it as disabled (ie, we do + * not set the IORESOURCE_ROM_ENABLE flag) for now rather than + * do a config space read, it will be force-enabled if needed + */ + if (!bridge && (addr0 & 0xff) == 0x30) + flags |= IORESOURCE_READONLY; } else if (addr0 & 0x01000000) flags = IORESOURCE_IO | PCI_BASE_ADDRESS_SPACE_IO; + if (flags) + flags |= IORESOURCE_SIZEALIGN; return flags; } @@ -95,7 +104,7 @@ static void pci_parse_of_addrs(struct device_node *node, struct pci_dev *dev) return; pr_debug(" parse addresses (%d bytes) @ %p\n", proplen, addrs); for (; proplen >= 20; proplen -= 20, addrs += 5) { - flags = pci_parse_of_flags(addrs[0]); + flags = pci_parse_of_flags(addrs[0], 0); if (!flags) continue; base = of_read_number(&addrs[1], 2); @@ -293,7 +302,7 @@ void __devinit of_scan_pci_bridge(struct device_node *node, } i = 1; for (; len >= 32; len -= 32, ranges += 8) { - flags = pci_parse_of_flags(ranges[0]); + flags = pci_parse_of_flags(ranges[0], 1); size = of_read_number(&ranges[6], 2); if (flags == 0 || size == 0) continue; diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c index 5ec6a9e23933..ce01ff2474da 100644 --- a/arch/powerpc/kernel/prom.c +++ b/arch/powerpc/kernel/prom.c @@ -426,7 +426,7 @@ static int __init early_parse_mem(char *p) return 1; memory_limit = PAGE_ALIGN(memparse(p, &p)); - DBG("memory limit = 0x%lx\n", memory_limit); + DBG("memory limit = 0x%llx\n", (unsigned long long)memory_limit); return 0; } @@ -1160,7 +1160,7 @@ static inline void __init phyp_dump_reserve_mem(void) {} void __init early_init_devtree(void *params) { - unsigned long limit; + phys_addr_t limit; DBG(" -> early_init_devtree(%p)\n", params); @@ -1204,7 +1204,7 @@ void __init early_init_devtree(void *params) limit = memory_limit; if (! limit) { - unsigned long memsize; + phys_addr_t memsize; /* Ensure that total memory size is page-aligned, because * otherwise mark_bootmem() gets upset. */ @@ -1218,7 +1218,7 @@ void __init early_init_devtree(void *params) lmb_analyze(); lmb_dump_all(); - DBG("Phys. mem: %lx\n", lmb_phys_mem_size()); + DBG("Phys. mem: %llx\n", lmb_phys_mem_size()); /* We may need to relocate the flat tree, do it now. * FIXME .. and the initrd too? */ diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c index f668fa9ba804..d0602a76bf7f 100644 --- a/arch/powerpc/mm/mem.c +++ b/arch/powerpc/mm/mem.c @@ -57,7 +57,7 @@ int init_bootmem_done; int mem_init_done; -unsigned long memory_limit; +phys_addr_t memory_limit; #ifdef CONFIG_HIGHMEM pte_t *kmap_pte; diff --git a/arch/powerpc/oprofile/op_model_power4.c b/arch/powerpc/oprofile/op_model_power4.c index 3e3d91f536e0..80774092db77 100644 --- a/arch/powerpc/oprofile/op_model_power4.c +++ b/arch/powerpc/oprofile/op_model_power4.c @@ -26,6 +26,7 @@ static unsigned long reset_value[OP_MAX_COUNTER]; static int oprofile_running; +static int use_slot_nums; /* mmcr values are set in power4_reg_setup, used in power4_cpu_setup */ static u32 mmcr0_val; @@ -61,6 +62,12 @@ static int power4_reg_setup(struct op_counter_config *ctr, else mmcr0_val |= MMCR0_PROBLEM_DISABLE; + if (__is_processor(PV_POWER4) || __is_processor(PV_POWER4p) || + __is_processor(PV_970) || __is_processor(PV_970FX) || + __is_processor(PV_970MP) || __is_processor(PV_970GX) || + __is_processor(PV_POWER5) || __is_processor(PV_POWER5p)) + use_slot_nums = 1; + return 0; } @@ -206,7 +213,7 @@ static unsigned long get_pc(struct pt_regs *regs) mmcra = mfspr(SPRN_MMCRA); - if (mmcra & MMCRA_SAMPLE_ENABLE) { + if (use_slot_nums && (mmcra & MMCRA_SAMPLE_ENABLE)) { slot = ((mmcra & MMCRA_SLOT) >> MMCRA_SLOT_SHIFT); if (slot > 1) pc += 4 * (slot - 1); diff --git a/arch/powerpc/platforms/40x/Kconfig b/arch/powerpc/platforms/40x/Kconfig index 14e027f5be66..f39c953d5353 100644 --- a/arch/powerpc/platforms/40x/Kconfig +++ b/arch/powerpc/platforms/40x/Kconfig @@ -153,6 +153,7 @@ config 405GPR config XILINX_VIRTEX bool + select DEFAULT_UIMAGE config XILINX_VIRTEX_II_PRO bool diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig index bf5c7ff2e6e5..0d83a6a0397d 100644 --- a/arch/powerpc/platforms/44x/Kconfig +++ b/arch/powerpc/platforms/44x/Kconfig @@ -246,6 +246,7 @@ config IBM440EP_ERR42 # Xilinx specific config options. config XILINX_VIRTEX bool + select DEFAULT_UIMAGE # Xilinx Virtex 5 FXT FPGA architecture, selected by a Xilinx board above config XILINX_VIRTEX_5_FXT diff --git a/arch/powerpc/platforms/cell/ras.c b/arch/powerpc/platforms/cell/ras.c index 5f961c464cc4..296b5268754e 100644 --- a/arch/powerpc/platforms/cell/ras.c +++ b/arch/powerpc/platforms/cell/ras.c @@ -122,12 +122,23 @@ static int __init cbe_ptcal_enable_on_node(int nid, int order) area->nid = nid; area->order = order; - area->pages = alloc_pages_node(area->nid, GFP_KERNEL, area->order); + area->pages = alloc_pages_node(area->nid, GFP_KERNEL | GFP_THISNODE, + area->order); - if (!area->pages) + if (!area->pages) { + printk(KERN_WARNING "%s: no page on node %d\n", + __func__, area->nid); goto out_free_area; + } - addr = __pa(page_address(area->pages)); + /* + * We move the ptcal area to the middle of the allocated + * page, in order to avoid prefetches in memcpy and similar + * functions stepping on it. + */ + addr = __pa(page_address(area->pages)) + (PAGE_SIZE >> 1); + printk(KERN_DEBUG "%s: enabling PTCAL on node %d address=0x%016lx\n", + __func__, area->nid, addr); ret = -EIO; if (rtas_call(ptcal_start_tok, 3, 1, NULL, area->nid, diff --git a/arch/powerpc/platforms/iseries/iommu.c b/arch/powerpc/platforms/iseries/iommu.c index ff43f1fd8343..40219823d9b0 100644 --- a/arch/powerpc/platforms/iseries/iommu.c +++ b/arch/powerpc/platforms/iseries/iommu.c @@ -174,9 +174,10 @@ static struct iommu_table *iommu_table_find(struct iommu_table * tbl) } -void iommu_devnode_init_iSeries(struct pci_dev *pdev, struct device_node *dn) +static void pci_dma_dev_setup_iseries(struct pci_dev *pdev) { struct iommu_table *tbl; + struct device_node *dn = pdev->sysdata; struct pci_dn *pdn = PCI_DN(dn); const u32 *lsn = of_get_property(dn, "linux,logical-slot-number", NULL); @@ -194,6 +195,8 @@ void iommu_devnode_init_iSeries(struct pci_dev *pdev, struct device_node *dn) kfree(tbl); pdev->dev.archdata.dma_data = pdn->iommu_table; } +#else +#define pci_dma_dev_setup_iseries NULL #endif static struct iommu_table veth_iommu_table; @@ -251,5 +254,6 @@ void iommu_init_early_iSeries(void) ppc_md.tce_build = tce_build_iSeries; ppc_md.tce_free = tce_free_iSeries; + ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_iseries; set_pci_dma_ops(&dma_iommu_ops); } diff --git a/arch/powerpc/platforms/iseries/pci.c b/arch/powerpc/platforms/iseries/pci.c index 02a634faedbe..21cddc30220b 100644 --- a/arch/powerpc/platforms/iseries/pci.c +++ b/arch/powerpc/platforms/iseries/pci.c @@ -444,7 +444,6 @@ void __init iSeries_pcibios_fixup_resources(struct pci_dev *pdev) pdev->sysdata = node; allocate_device_bars(pdev); iseries_device_information(pdev, bus, *sub_bus); - iommu_devnode_init_iSeries(pdev, node); } /* diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c index afe8dbc964aa..5c64ccd402e2 100644 --- a/arch/powerpc/sysdev/fsl_soc.c +++ b/arch/powerpc/sysdev/fsl_soc.c @@ -208,52 +208,6 @@ static int __init of_add_fixed_phys(void) arch_initcall(of_add_fixed_phys); #endif /* CONFIG_FIXED_PHY */ -#ifdef CONFIG_PPC_83xx -static int __init mpc83xx_wdt_init(void) -{ - struct resource r; - struct device_node *np; - struct platform_device *dev; - u32 freq = fsl_get_sys_freq(); - int ret; - - np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt"); - - if (!np) { - ret = -ENODEV; - goto nodev; - } - - memset(&r, 0, sizeof(r)); - - ret = of_address_to_resource(np, 0, &r); - if (ret) - goto err; - - dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1); - if (IS_ERR(dev)) { - ret = PTR_ERR(dev); - goto err; - } - - ret = platform_device_add_data(dev, &freq, sizeof(freq)); - if (ret) - goto unreg; - - of_node_put(np); - return 0; - -unreg: - platform_device_unregister(dev); -err: - of_node_put(np); -nodev: - return ret; -} - -arch_initcall(mpc83xx_wdt_init); -#endif - static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type) { if (!phy_type) diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index 21b956701596..0efc12d1a3d7 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c @@ -1057,13 +1057,6 @@ struct mpic * __init mpic_alloc(struct device_node *node, memset(mpic, 0, sizeof(struct mpic)); mpic->name = name; - mpic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR, - isu_size, &mpic_host_ops, - flags & MPIC_LARGE_VECTORS ? 2048 : 256); - if (mpic->irqhost == NULL) - return NULL; - - mpic->irqhost->host_data = mpic; mpic->hc_irq = mpic_irq_chip; mpic->hc_irq.typename = name; if (flags & MPIC_PRIMARY) @@ -1213,6 +1206,15 @@ struct mpic * __init mpic_alloc(struct device_node *node, mpic->isu_shift = 1 + __ilog2(mpic->isu_size - 1); mpic->isu_mask = (1 << mpic->isu_shift) - 1; + mpic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR, + isu_size ? isu_size : mpic->num_sources, + &mpic_host_ops, + flags & MPIC_LARGE_VECTORS ? 2048 : 256); + if (mpic->irqhost == NULL) + return NULL; + + mpic->irqhost->host_data = mpic; + /* Display version */ switch (greg_feature & MPIC_GREG_FEATURE_VERSION_MASK) { case 1: diff --git a/arch/powerpc/sysdev/xilinx_intc.c b/arch/powerpc/sysdev/xilinx_intc.c index a22e1a2df1af..c658b413c9b4 100644 --- a/arch/powerpc/sysdev/xilinx_intc.c +++ b/arch/powerpc/sysdev/xilinx_intc.c @@ -41,8 +41,32 @@ static struct irq_host *master_irqhost; +#define XILINX_INTC_MAXIRQS (32) + +/* The following table allows the interrupt type, edge or level, + * to be cached after being read from the device tree until the interrupt + * is mapped + */ +static int xilinx_intc_typetable[XILINX_INTC_MAXIRQS]; + +/* Map the interrupt type from the device tree to the interrupt types + * used by the interrupt subsystem + */ +static unsigned char xilinx_intc_map_senses[] = { + IRQ_TYPE_EDGE_RISING, + IRQ_TYPE_EDGE_FALLING, + IRQ_TYPE_LEVEL_HIGH, + IRQ_TYPE_LEVEL_LOW, +}; + /* - * IRQ Chip operations + * The interrupt controller is setup such that it doesn't work well with + * the level interrupt handler in the kernel because the handler acks the + * interrupt before calling the application interrupt handler. To deal with + * that, we use 2 different irq chips so that different functions can be + * used for level and edge type interrupts. + * + * IRQ Chip common (across level and edge) operations */ static void xilinx_intc_mask(unsigned int virq) { @@ -52,15 +76,54 @@ static void xilinx_intc_mask(unsigned int virq) out_be32(regs + XINTC_CIE, 1 << irq); } -static void xilinx_intc_unmask(unsigned int virq) +static int xilinx_intc_set_type(unsigned int virq, unsigned int flow_type) +{ + struct irq_desc *desc = get_irq_desc(virq); + + desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); + desc->status |= flow_type & IRQ_TYPE_SENSE_MASK; + if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) + desc->status |= IRQ_LEVEL; + return 0; +} + +/* + * IRQ Chip level operations + */ +static void xilinx_intc_level_unmask(unsigned int virq) { int irq = virq_to_hw(virq); void * regs = get_irq_chip_data(virq); pr_debug("unmask: %d\n", irq); out_be32(regs + XINTC_SIE, 1 << irq); + + /* ack level irqs because they can't be acked during + * ack function since the handle_level_irq function + * acks the irq before calling the inerrupt handler + */ + out_be32(regs + XINTC_IAR, 1 << irq); } -static void xilinx_intc_ack(unsigned int virq) +static struct irq_chip xilinx_intc_level_irqchip = { + .typename = "Xilinx Level INTC", + .mask = xilinx_intc_mask, + .mask_ack = xilinx_intc_mask, + .unmask = xilinx_intc_level_unmask, + .set_type = xilinx_intc_set_type, +}; + +/* + * IRQ Chip edge operations + */ +static void xilinx_intc_edge_unmask(unsigned int virq) +{ + int irq = virq_to_hw(virq); + void *regs = get_irq_chip_data(virq); + pr_debug("unmask: %d\n", irq); + out_be32(regs + XINTC_SIE, 1 << irq); +} + +static void xilinx_intc_edge_ack(unsigned int virq) { int irq = virq_to_hw(virq); void * regs = get_irq_chip_data(virq); @@ -68,27 +131,60 @@ static void xilinx_intc_ack(unsigned int virq) out_be32(regs + XINTC_IAR, 1 << irq); } -static struct irq_chip xilinx_intc_irqchip = { - .typename = "Xilinx INTC", +static struct irq_chip xilinx_intc_edge_irqchip = { + .typename = "Xilinx Edge INTC", .mask = xilinx_intc_mask, - .unmask = xilinx_intc_unmask, - .ack = xilinx_intc_ack, + .unmask = xilinx_intc_edge_unmask, + .ack = xilinx_intc_edge_ack, + .set_type = xilinx_intc_set_type, }; /* * IRQ Host operations */ + +/** + * xilinx_intc_xlate - translate virq# from device tree interrupts property + */ +static int xilinx_intc_xlate(struct irq_host *h, struct device_node *ct, + u32 *intspec, unsigned int intsize, + irq_hw_number_t *out_hwirq, + unsigned int *out_flags) +{ + if ((intsize < 2) || (intspec[0] >= XILINX_INTC_MAXIRQS)) + return -EINVAL; + + /* keep a copy of the interrupt type til the interrupt is mapped + */ + xilinx_intc_typetable[intspec[0]] = xilinx_intc_map_senses[intspec[1]]; + + /* Xilinx uses 2 interrupt entries, the 1st being the h/w + * interrupt number, the 2nd being the interrupt type, edge or level + */ + *out_hwirq = intspec[0]; + *out_flags = xilinx_intc_map_senses[intspec[1]]; + + return 0; +} static int xilinx_intc_map(struct irq_host *h, unsigned int virq, irq_hw_number_t irq) { set_irq_chip_data(virq, h->host_data); - set_irq_chip_and_handler(virq, &xilinx_intc_irqchip, handle_level_irq); - set_irq_type(virq, IRQ_TYPE_NONE); + + if (xilinx_intc_typetable[irq] == IRQ_TYPE_LEVEL_HIGH || + xilinx_intc_typetable[irq] == IRQ_TYPE_LEVEL_LOW) { + set_irq_chip_and_handler(virq, &xilinx_intc_level_irqchip, + handle_level_irq); + } else { + set_irq_chip_and_handler(virq, &xilinx_intc_edge_irqchip, + handle_edge_irq); + } return 0; } static struct irq_host_ops xilinx_intc_ops = { .map = xilinx_intc_map, + .xlate = xilinx_intc_xlate, }; struct irq_host * __init @@ -116,7 +212,8 @@ xilinx_intc_init(struct device_node *np) out_be32(regs + XINTC_MER, 0x3UL); /* Turn on the Master Enable. */ /* Allocate and initialize an irq_host structure. */ - irq = irq_alloc_host(np, IRQ_HOST_MAP_LINEAR, 32, &xilinx_intc_ops, -1); + irq = irq_alloc_host(np, IRQ_HOST_MAP_LINEAR, XILINX_INTC_MAXIRQS, + &xilinx_intc_ops, -1); if (!irq) panic(__FILE__ ": Cannot allocate IRQ host\n"); irq->host_data = regs; diff --git a/drivers/serial/nwpserial.c b/drivers/serial/nwpserial.c index 32f3eaf0d262..9e150b19d726 100644 --- a/drivers/serial/nwpserial.c +++ b/drivers/serial/nwpserial.c @@ -145,11 +145,13 @@ static irqreturn_t nwpserial_interrupt(int irq, void *dev_id) ch = dcr_read(up->dcr_host, UART_RX); if (up->port.ignore_status_mask != NWPSERIAL_STATUS_RXVALID) tty_insert_flip_char(tty, ch, TTY_NORMAL); - } while (dcr_read(up->dcr_host, UART_RX) & UART_LSR_DR); + } while (dcr_read(up->dcr_host, UART_LSR) & UART_LSR_DR); tty_flip_buffer_push(tty); ret = IRQ_HANDLED; + /* clear interrupt */ + dcr_write(up->dcr_host, UART_IIR, 1); out: spin_unlock(&up->port.lock); return ret;