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gpio: pxa: add PXA1928 gpio type support

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Add support for PXA1928 GPIOs. The PXA1928 adds a 6th bank from previous
generations.

Signed-off-by: Jing Xiang <jxiang@marvell.com>
Signed-off-by: Xiangzhan Meng <mengxzh@marvell.com>
[robh: ported to 3.19 from vendor kernel]
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Rob Herring 2015-01-26 22:46:06 -06:00 • committed by Linus Walleij
parent 9948004986
commit 684bba2ff8
1 changed files with 15 additions and 2 deletions
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17
drivers/gpio/gpio-pxa.c
View file

@ -41,9 +41,12 @@
* BANK 4 - 0x0104 0x0110 0x011C 0x0128 0x0134 0x0140 0x014C * BANK 4 - 0x0104 0x0110 0x011C 0x0128 0x0134 0x0140 0x014C
* BANK 5 - 0x0108 0x0114 0x0120 0x012C 0x0138 0x0144 0x0150 * BANK 5 - 0x0108 0x0114 0x0120 0x012C 0x0138 0x0144 0x0150
* *
* BANK 6 - 0x0200 0x020C 0x0218 0x0224 0x0230 0x023C 0x0248
*
* NOTE: * NOTE:
* BANK 3 is only available on PXA27x and later processors. * BANK 3 is only available on PXA27x and later processors.
* BANK 4 and 5 are only available on PXA935 * BANK 4 and 5 are only available on PXA935, PXA1928
* BANK 6 is only available on PXA1928
*/ */
#define GPLR_OFFSET 0x00 #define GPLR_OFFSET 0x00
@ -56,7 +59,8 @@
#define GAFR_OFFSET 0x54 #define GAFR_OFFSET 0x54
#define ED_MASK_OFFSET 0x9C /* GPIO edge detection for AP side */ #define ED_MASK_OFFSET 0x9C /* GPIO edge detection for AP side */
#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : ((n) > 5 ? 0x200 : 0x100) \
+ (((n) % 3) << 2))
int pxa_last_gpio; int pxa_last_gpio;
static int irq_base; static int irq_base;
@ -92,6 +96,7 @@ enum pxa_gpio_type {
PXA93X_GPIO, PXA93X_GPIO,
MMP_GPIO = 0x10, MMP_GPIO = 0x10,
MMP2_GPIO, MMP2_GPIO,
PXA1928_GPIO,
}; };
struct pxa_gpio_id { struct pxa_gpio_id {
@ -139,6 +144,11 @@ static struct pxa_gpio_id mmp2_id = {
.gpio_nums = 192, .gpio_nums = 192,
}; };
static struct pxa_gpio_id pxa1928_id = {
.type = PXA1928_GPIO,
.gpio_nums = 224,
};
#define for_each_gpio_chip(i, c) \ #define for_each_gpio_chip(i, c) \
for (i = 0, c = &pxa_gpio_chips[0]; i <= pxa_last_gpio; i += 32, c++) for (i = 0, c = &pxa_gpio_chips[0]; i <= pxa_last_gpio; i += 32, c++)
@ -486,6 +496,7 @@ static int pxa_gpio_nums(struct platform_device *pdev)
case PXA93X_GPIO: case PXA93X_GPIO:
case MMP_GPIO: case MMP_GPIO:
case MMP2_GPIO: case MMP2_GPIO:
case PXA1928_GPIO:
gpio_type = pxa_id->type; gpio_type = pxa_id->type;
count = pxa_id->gpio_nums - 1; count = pxa_id->gpio_nums - 1;
break; break;
@ -505,6 +516,7 @@ static const struct of_device_id pxa_gpio_dt_ids[] = {
{ .compatible = "marvell,pxa93x-gpio", .data = &pxa93x_id, }, { .compatible = "marvell,pxa93x-gpio", .data = &pxa93x_id, },
{ .compatible = "marvell,mmp-gpio", .data = &mmp_id, }, { .compatible = "marvell,mmp-gpio", .data = &mmp_id, },
{ .compatible = "marvell,mmp2-gpio", .data = &mmp2_id, }, { .compatible = "marvell,mmp2-gpio", .data = &mmp2_id, },
{ .compatible = "marvell,pxa1928-gpio", .data = &pxa1928_id, },
{} {}
}; };
@ -666,6 +678,7 @@ static const struct platform_device_id gpio_id_table[] = {
{ "pxa93x-gpio", (unsigned long)&pxa93x_id }, { "pxa93x-gpio", (unsigned long)&pxa93x_id },
{ "mmp-gpio", (unsigned long)&mmp_id }, { "mmp-gpio", (unsigned long)&mmp_id },
{ "mmp2-gpio", (unsigned long)&mmp2_id }, { "mmp2-gpio", (unsigned long)&mmp2_id },
{ "pxa1928-gpio", (unsigned long)&pxa1928_id },
{ }, { },
}; };