iwlwifi: move prph handling into the transport
New transports may handle it internally for better performance. Also move the tracing inside PRPH access which will make the output more readable: iwlwifi_dev_ioread_prph32: Read 0x0 from SCD_AGGR_SEL (32-bit) instead of the corresponding accesses to HBUS_TARG_PRPH_*. Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Signed-off-by: Johannes Berg <johannes.berg@intel.com>
This commit is contained in:
parent
b7998c8b44
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6a06b6c131
5 changed files with 90 additions and 25 deletions
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@ -133,6 +133,40 @@ TRACE_EVENT(iwlwifi_dev_iowrite32,
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__get_str(dev), __entry->offs, __entry->val)
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__get_str(dev), __entry->offs, __entry->val)
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);
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);
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TRACE_EVENT(iwlwifi_dev_iowrite_prph32,
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TP_PROTO(const struct device *dev, u32 offs, u32 val),
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TP_ARGS(dev, offs, val),
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TP_STRUCT__entry(
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DEV_ENTRY
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__field(u32, offs)
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__field(u32, val)
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),
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TP_fast_assign(
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DEV_ASSIGN;
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__entry->offs = offs;
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__entry->val = val;
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),
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TP_printk("[%s] write PRPH[%#x] = %#x)",
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__get_str(dev), __entry->offs, __entry->val)
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);
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TRACE_EVENT(iwlwifi_dev_ioread_prph32,
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TP_PROTO(const struct device *dev, u32 offs, u32 val),
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TP_ARGS(dev, offs, val),
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TP_STRUCT__entry(
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DEV_ENTRY
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__field(u32, offs)
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__field(u32, val)
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),
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TP_fast_assign(
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DEV_ASSIGN;
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__entry->offs = offs;
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__entry->val = val;
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),
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TP_printk("[%s] read PRPH[%#x] = %#x",
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__get_str(dev), __entry->offs, __entry->val)
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);
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TRACE_EVENT(iwlwifi_dev_irq,
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TRACE_EVENT(iwlwifi_dev_irq,
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TP_PROTO(const struct device *dev),
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TP_PROTO(const struct device *dev),
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TP_ARGS(dev),
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TP_ARGS(dev),
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@ -214,84 +214,84 @@ int iwl_poll_direct_bit(struct iwl_trans *trans, u32 addr, u32 mask,
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}
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}
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EXPORT_SYMBOL_GPL(iwl_poll_direct_bit);
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EXPORT_SYMBOL_GPL(iwl_poll_direct_bit);
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static inline u32 __iwl_read_prph(struct iwl_trans *trans, u32 reg)
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static inline u32 __iwl_read_prph(struct iwl_trans *trans, u32 ofs)
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{
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{
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iwl_write32(trans, HBUS_TARG_PRPH_RADDR, reg | (3 << 24));
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u32 val = iwl_trans_read_prph(trans, ofs);
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return iwl_read32(trans, HBUS_TARG_PRPH_RDAT);
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trace_iwlwifi_dev_ioread_prph32(trans->dev, ofs, val);
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return val;
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}
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}
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static inline void __iwl_write_prph(struct iwl_trans *trans, u32 addr, u32 val)
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static inline void __iwl_write_prph(struct iwl_trans *trans, u32 ofs, u32 val)
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{
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{
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iwl_write32(trans, HBUS_TARG_PRPH_WADDR,
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trace_iwlwifi_dev_iowrite_prph32(trans->dev, ofs, val);
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((addr & 0x0000FFFF) | (3 << 24)));
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iwl_trans_write_prph(trans, ofs, val);
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iwl_write32(trans, HBUS_TARG_PRPH_WDAT, val);
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}
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}
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u32 iwl_read_prph(struct iwl_trans *trans, u32 reg)
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u32 iwl_read_prph(struct iwl_trans *trans, u32 ofs)
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{
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{
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unsigned long flags;
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unsigned long flags;
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u32 val;
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u32 val;
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spin_lock_irqsave(&trans->reg_lock, flags);
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spin_lock_irqsave(&trans->reg_lock, flags);
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iwl_grab_nic_access(trans);
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iwl_grab_nic_access(trans);
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val = __iwl_read_prph(trans, reg);
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val = __iwl_read_prph(trans, ofs);
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iwl_release_nic_access(trans);
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iwl_release_nic_access(trans);
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spin_unlock_irqrestore(&trans->reg_lock, flags);
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spin_unlock_irqrestore(&trans->reg_lock, flags);
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return val;
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return val;
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}
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}
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EXPORT_SYMBOL_GPL(iwl_read_prph);
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EXPORT_SYMBOL_GPL(iwl_read_prph);
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void iwl_write_prph(struct iwl_trans *trans, u32 addr, u32 val)
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void iwl_write_prph(struct iwl_trans *trans, u32 ofs, u32 val)
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{
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{
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unsigned long flags;
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unsigned long flags;
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spin_lock_irqsave(&trans->reg_lock, flags);
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spin_lock_irqsave(&trans->reg_lock, flags);
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if (likely(iwl_grab_nic_access(trans))) {
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if (likely(iwl_grab_nic_access(trans))) {
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__iwl_write_prph(trans, addr, val);
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__iwl_write_prph(trans, ofs, val);
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iwl_release_nic_access(trans);
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iwl_release_nic_access(trans);
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}
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}
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spin_unlock_irqrestore(&trans->reg_lock, flags);
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spin_unlock_irqrestore(&trans->reg_lock, flags);
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}
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}
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EXPORT_SYMBOL_GPL(iwl_write_prph);
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EXPORT_SYMBOL_GPL(iwl_write_prph);
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void iwl_set_bits_prph(struct iwl_trans *trans, u32 reg, u32 mask)
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void iwl_set_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask)
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{
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{
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unsigned long flags;
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unsigned long flags;
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spin_lock_irqsave(&trans->reg_lock, flags);
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spin_lock_irqsave(&trans->reg_lock, flags);
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if (likely(iwl_grab_nic_access(trans))) {
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if (likely(iwl_grab_nic_access(trans))) {
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__iwl_write_prph(trans, reg,
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__iwl_write_prph(trans, ofs,
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__iwl_read_prph(trans, reg) | mask);
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__iwl_read_prph(trans, ofs) | mask);
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iwl_release_nic_access(trans);
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iwl_release_nic_access(trans);
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}
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}
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spin_unlock_irqrestore(&trans->reg_lock, flags);
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spin_unlock_irqrestore(&trans->reg_lock, flags);
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}
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}
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EXPORT_SYMBOL_GPL(iwl_set_bits_prph);
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EXPORT_SYMBOL_GPL(iwl_set_bits_prph);
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void iwl_set_bits_mask_prph(struct iwl_trans *trans, u32 reg,
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void iwl_set_bits_mask_prph(struct iwl_trans *trans, u32 ofs,
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u32 bits, u32 mask)
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u32 bits, u32 mask)
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{
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{
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unsigned long flags;
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unsigned long flags;
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spin_lock_irqsave(&trans->reg_lock, flags);
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spin_lock_irqsave(&trans->reg_lock, flags);
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if (likely(iwl_grab_nic_access(trans))) {
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if (likely(iwl_grab_nic_access(trans))) {
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__iwl_write_prph(trans, reg,
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__iwl_write_prph(trans, ofs,
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(__iwl_read_prph(trans, reg) & mask) | bits);
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(__iwl_read_prph(trans, ofs) & mask) | bits);
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iwl_release_nic_access(trans);
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iwl_release_nic_access(trans);
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}
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}
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spin_unlock_irqrestore(&trans->reg_lock, flags);
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spin_unlock_irqrestore(&trans->reg_lock, flags);
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}
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}
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EXPORT_SYMBOL_GPL(iwl_set_bits_mask_prph);
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EXPORT_SYMBOL_GPL(iwl_set_bits_mask_prph);
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void iwl_clear_bits_prph(struct iwl_trans *trans, u32 reg, u32 mask)
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void iwl_clear_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask)
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{
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{
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unsigned long flags;
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unsigned long flags;
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u32 val;
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u32 val;
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spin_lock_irqsave(&trans->reg_lock, flags);
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spin_lock_irqsave(&trans->reg_lock, flags);
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if (likely(iwl_grab_nic_access(trans))) {
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if (likely(iwl_grab_nic_access(trans))) {
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val = __iwl_read_prph(trans, reg);
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val = __iwl_read_prph(trans, ofs);
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__iwl_write_prph(trans, reg, (val & ~mask));
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__iwl_write_prph(trans, ofs, (val & ~mask));
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iwl_release_nic_access(trans);
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iwl_release_nic_access(trans);
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}
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}
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spin_unlock_irqrestore(&trans->reg_lock, flags);
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spin_unlock_irqrestore(&trans->reg_lock, flags);
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@ -69,12 +69,12 @@ u32 iwl_read_direct32(struct iwl_trans *trans, u32 reg);
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void iwl_write_direct32(struct iwl_trans *trans, u32 reg, u32 value);
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void iwl_write_direct32(struct iwl_trans *trans, u32 reg, u32 value);
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u32 iwl_read_prph(struct iwl_trans *trans, u32 reg);
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u32 iwl_read_prph(struct iwl_trans *trans, u32 ofs);
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void iwl_write_prph(struct iwl_trans *trans, u32 addr, u32 val);
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void iwl_write_prph(struct iwl_trans *trans, u32 ofs, u32 val);
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void iwl_set_bits_prph(struct iwl_trans *trans, u32 reg, u32 mask);
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void iwl_set_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask);
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void iwl_set_bits_mask_prph(struct iwl_trans *trans, u32 reg,
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void iwl_set_bits_mask_prph(struct iwl_trans *trans, u32 ofs,
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u32 bits, u32 mask);
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u32 bits, u32 mask);
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void iwl_clear_bits_prph(struct iwl_trans *trans, u32 reg, u32 mask);
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void iwl_clear_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask);
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void _iwl_read_targ_mem_dwords(struct iwl_trans *trans, u32 addr,
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void _iwl_read_targ_mem_dwords(struct iwl_trans *trans, u32 addr,
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void *buf, int dwords);
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void *buf, int dwords);
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@ -385,6 +385,8 @@ struct iwl_trans;
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* @write8: write a u8 to a register at offset ofs from the BAR
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* @write8: write a u8 to a register at offset ofs from the BAR
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* @write32: write a u32 to a register at offset ofs from the BAR
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* @write32: write a u32 to a register at offset ofs from the BAR
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* @read32: read a u32 register at offset ofs from the BAR
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* @read32: read a u32 register at offset ofs from the BAR
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* @read_prph: read a DWORD from a periphery register
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* @write_prph: write a DWORD to a periphery register
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* @configure: configure parameters required by the transport layer from
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* @configure: configure parameters required by the transport layer from
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* the op_mode. May be called several times before start_fw, can't be
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* the op_mode. May be called several times before start_fw, can't be
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* called after that.
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* called after that.
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@ -420,6 +422,8 @@ struct iwl_trans_ops {
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void (*write8)(struct iwl_trans *trans, u32 ofs, u8 val);
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void (*write8)(struct iwl_trans *trans, u32 ofs, u8 val);
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void (*write32)(struct iwl_trans *trans, u32 ofs, u32 val);
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void (*write32)(struct iwl_trans *trans, u32 ofs, u32 val);
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u32 (*read32)(struct iwl_trans *trans, u32 ofs);
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u32 (*read32)(struct iwl_trans *trans, u32 ofs);
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u32 (*read_prph)(struct iwl_trans *trans, u32 ofs);
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void (*write_prph)(struct iwl_trans *trans, u32 ofs, u32 val);
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void (*configure)(struct iwl_trans *trans,
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void (*configure)(struct iwl_trans *trans,
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const struct iwl_trans_config *trans_cfg);
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const struct iwl_trans_config *trans_cfg);
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void (*set_pmi)(struct iwl_trans *trans, bool state);
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void (*set_pmi)(struct iwl_trans *trans, bool state);
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@ -664,6 +668,17 @@ static inline u32 iwl_trans_read32(struct iwl_trans *trans, u32 ofs)
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return trans->ops->read32(trans, ofs);
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return trans->ops->read32(trans, ofs);
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}
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}
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static inline u32 iwl_trans_read_prph(struct iwl_trans *trans, u32 ofs)
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{
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return trans->ops->read_prph(trans, ofs);
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}
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static inline void iwl_trans_write_prph(struct iwl_trans *trans, u32 ofs,
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u32 val)
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{
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return trans->ops->write_prph(trans, ofs, val);
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}
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static inline void iwl_trans_set_pmi(struct iwl_trans *trans, bool state)
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static inline void iwl_trans_set_pmi(struct iwl_trans *trans, bool state)
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{
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{
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trans->ops->set_pmi(trans, state);
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trans->ops->set_pmi(trans, state);
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@ -668,6 +668,20 @@ static u32 iwl_trans_pcie_read32(struct iwl_trans *trans, u32 ofs)
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return readl(IWL_TRANS_GET_PCIE_TRANS(trans)->hw_base + ofs);
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return readl(IWL_TRANS_GET_PCIE_TRANS(trans)->hw_base + ofs);
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}
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}
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static u32 iwl_trans_pcie_read_prph(struct iwl_trans *trans, u32 reg)
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{
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iwl_trans_pcie_write32(trans, HBUS_TARG_PRPH_RADDR, reg | (3 << 24));
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return iwl_trans_pcie_read32(trans, HBUS_TARG_PRPH_RDAT);
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}
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static void iwl_trans_pcie_write_prph(struct iwl_trans *trans, u32 addr,
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u32 val)
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{
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iwl_trans_pcie_write32(trans, HBUS_TARG_PRPH_WADDR,
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((addr & 0x0000FFFF) | (3 << 24)));
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iwl_trans_pcie_write32(trans, HBUS_TARG_PRPH_WDAT, val);
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}
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static void iwl_trans_pcie_configure(struct iwl_trans *trans,
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static void iwl_trans_pcie_configure(struct iwl_trans *trans,
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const struct iwl_trans_config *trans_cfg)
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const struct iwl_trans_config *trans_cfg)
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{
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{
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@ -1223,6 +1237,8 @@ static const struct iwl_trans_ops trans_ops_pcie = {
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.write8 = iwl_trans_pcie_write8,
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.write8 = iwl_trans_pcie_write8,
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.write32 = iwl_trans_pcie_write32,
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.write32 = iwl_trans_pcie_write32,
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.read32 = iwl_trans_pcie_read32,
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.read32 = iwl_trans_pcie_read32,
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.read_prph = iwl_trans_pcie_read_prph,
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.write_prph = iwl_trans_pcie_write_prph,
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.configure = iwl_trans_pcie_configure,
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.configure = iwl_trans_pcie_configure,
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.set_pmi = iwl_trans_pcie_set_pmi,
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.set_pmi = iwl_trans_pcie_set_pmi,
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};
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};
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